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Updated to v4.3.8_12406.20140929

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This commit is contained in:
CGarces
2017-05-11 20:35:20 +02:00
parent 1387cf623d
commit 9dde4572b4
229 changed files with 35553 additions and 24316 deletions
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73
include/rtw_mp.h
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@@ -53,6 +53,7 @@
#define MPT_GET_THERMAL_METER 33
#endif
#define RTWPRIV_VER_INFO 1
#define MAX_MP_XMITBUF_SZ 2048
#define NR_MP_XMITFRAME 8
@@ -347,6 +348,10 @@ enum {
CTA_TEST,
MP_DISABLE_BT_COEXIST,
MP_PwrCtlDM,
MP_GETVER,
#ifdef CONFIG_WOWLAN
MP_WOW_ENABLE,
#endif
#ifdef CONFIG_AP_WOWLAN
MP_AP_WOW_ENABLE,
#endif
@@ -379,7 +384,7 @@ struct mp_priv
u32 rx_pktcount_filter_out;
u32 rx_crcerrpktcount;
u32 rx_pktloss;
BOOLEAN rx_bindicatePkt;
struct recv_stat rxstat;
//RF/BB relative
@@ -471,14 +476,6 @@ typedef struct _MP_FIRMWARE {
u8 szFwBuffer[0x8000];
#endif
u32 ulFwLength;
#ifdef CONFIG_EMBEDDED_FWIMG
u8* szBTFwBuffer;
u8 myBTFwBuffer[0x8000];
#else
u8 szBTFwBuffer[0x8000];
#endif
u32 ulBTFwLength;
} RT_MP_FIRMWARE, *PRT_MP_FIRMWARE;
@@ -568,27 +565,63 @@ typedef enum _MPT_RATE_INDEX
MPT_RATE_MCS13,
MPT_RATE_MCS14,
MPT_RATE_MCS15, /* 27 */
MPT_RATE_MCS16,
MPT_RATE_MCS17, // #29
MPT_RATE_MCS18,
MPT_RATE_MCS19,
MPT_RATE_MCS20,
MPT_RATE_MCS21,
MPT_RATE_MCS22, // #34
MPT_RATE_MCS23,
MPT_RATE_MCS24,
MPT_RATE_MCS25,
MPT_RATE_MCS26,
MPT_RATE_MCS27, // #39
MPT_RATE_MCS28, // #40
MPT_RATE_MCS29, // #41
MPT_RATE_MCS30, // #42
MPT_RATE_MCS31, // #43
/* VHT rate. Total: 20*/
MPT_RATE_VHT1SS_MCS0 = 100,// To reserve MCS16~MCS31, the index starts from #100.
MPT_RATE_VHT1SS_MCS1, // #101
MPT_RATE_VHT1SS_MCS0,// #44
MPT_RATE_VHT1SS_MCS1, // #
MPT_RATE_VHT1SS_MCS2,
MPT_RATE_VHT1SS_MCS3,
MPT_RATE_VHT1SS_MCS4,
MPT_RATE_VHT1SS_MCS5,
MPT_RATE_VHT1SS_MCS6, // #106
MPT_RATE_VHT1SS_MCS6, // #
MPT_RATE_VHT1SS_MCS7,
MPT_RATE_VHT1SS_MCS8,
MPT_RATE_VHT1SS_MCS9,
MPT_RATE_VHT2SS_MCS0,
MPT_RATE_VHT2SS_MCS1, // #111
MPT_RATE_VHT1SS_MCS9, //#53
MPT_RATE_VHT2SS_MCS0, //#54
MPT_RATE_VHT2SS_MCS1,
MPT_RATE_VHT2SS_MCS2,
MPT_RATE_VHT2SS_MCS3,
MPT_RATE_VHT2SS_MCS4,
MPT_RATE_VHT2SS_MCS5,
MPT_RATE_VHT2SS_MCS6, // #116
MPT_RATE_VHT2SS_MCS6,
MPT_RATE_VHT2SS_MCS7,
MPT_RATE_VHT2SS_MCS8,
MPT_RATE_VHT2SS_MCS9,
MPT_RATE_VHT2SS_MCS9, //#63
MPT_RATE_VHT3SS_MCS0,
MPT_RATE_VHT3SS_MCS1,
MPT_RATE_VHT3SS_MCS2,
MPT_RATE_VHT3SS_MCS3,
MPT_RATE_VHT3SS_MCS4,
MPT_RATE_VHT3SS_MCS5,
MPT_RATE_VHT3SS_MCS6, // #126
MPT_RATE_VHT3SS_MCS7,
MPT_RATE_VHT3SS_MCS8,
MPT_RATE_VHT3SS_MCS9,
MPT_RATE_VHT4SS_MCS0,
MPT_RATE_VHT4SS_MCS1, // #131
MPT_RATE_VHT4SS_MCS2,
MPT_RATE_VHT4SS_MCS3,
MPT_RATE_VHT4SS_MCS4,
MPT_RATE_VHT4SS_MCS5,
MPT_RATE_VHT4SS_MCS6, // #136
MPT_RATE_VHT4SS_MCS7,
MPT_RATE_VHT4SS_MCS8,
MPT_RATE_VHT4SS_MCS9,
MPT_RATE_LAST
}MPT_RATE_E, *PMPT_RATE_E;
@@ -681,6 +714,9 @@ typedef enum _MPT_TXPWR_DEF{
#elif defined(CONFIG_RTL8723B)
#define REG_RF_BB_GAIN_OFFSET 0x7f
#define RF_GAIN_OFFSET_MASK 0xfffff
#elif defined(CONFIG_RTL8188E)
#define REG_RF_BB_GAIN_OFFSET 0x55
#define RF_GAIN_OFFSET_MASK 0xfffff
#else
#define REG_RF_BB_GAIN_OFFSET 0x55
#define RF_GAIN_OFFSET_MASK 0xfffff
@@ -783,11 +819,12 @@ extern u8 Hal_ReadRFThermalMeter(PADAPTER pAdapter);
extern void Hal_SetCCKContinuousTx(PADAPTER pAdapter, u8 bStart);
extern void Hal_SetOFDMContinuousTx(PADAPTER pAdapter, u8 bStart);
extern void Hal_ProSetCrystalCap (PADAPTER pAdapter , u32 CrystalCapVal);
extern void _rtw_mp_xmit_priv(struct xmit_priv *pxmitpriv);
//extern void _rtw_mp_xmit_priv(struct xmit_priv *pxmitpriv);
extern void MP_PHY_SetRFPathSwitch(PADAPTER pAdapter ,BOOLEAN bMain);
extern ULONG mpt_ProQueryCalTxPower(PADAPTER pAdapter,u8 RfPath);
extern void MPT_PwrCtlDM(PADAPTER padapter, u32 bstart);
extern u8 MptToMgntRate(u32 MptRateIdx);
extern u8 rtw_mpRateParseFunc(PADAPTER pAdapter, u8 *targetStr);
#endif //_RTW_MP_H_