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Updated to v4.3.8_12406.20140929

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This commit is contained in:
CGarces 2017-05-11 20:35:20 +02:00
parent 1387cf623d
commit 9dde4572b4
229 changed files with 35553 additions and 24316 deletions
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208
Makefile
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@ -53,10 +53,17 @@ CONFIG_TRAFFIC_PROTECT = y
CONFIG_LOAD_PHY_PARA_FROM_FILE = y
CONFIG_CALIBRATE_TX_POWER_BY_REGULATORY = n
CONFIG_CALIBRATE_TX_POWER_TO_MAX = n
CONFIG_ODM_ADAPTIVITY = n
CONFIG_RTW_ADAPTIVITY_EN = disable
CONFIG_RTW_ADAPTIVITY_MODE = normal
CONFIG_SKIP_SIGNAL_SCALE_MAPPING = n
CONFIG_80211W = n
CONFIG_REDUCE_TX_CPU_LOADING = n
CONFIG_BR_EXT = y
CONFIG_ANTENNA_DIVERSITY = n
######################## Wake On Lan ##########################
CONFIG_WOWLAN = n
CONFIG_GPIO_WAKEUP = n
CONFIG_WAKEUP_GPIO_IDX = default
CONFIG_PNO_SUPPORT = n
CONFIG_PNO_SET_DEBUG = n
CONFIG_AP_WOWLAN = n
@ -91,7 +98,6 @@ CONFIG_PLATFORM_ARM_URBETTER = n
CONFIG_PLATFORM_ARM_TI_PANDA = n
CONFIG_PLATFORM_MIPS_JZ4760 = n
CONFIG_PLATFORM_DMP_PHILIPS = n
CONFIG_PLATFORM_TI_DM365 = n
CONFIG_PLATFORM_MSTAR_TITANIA12 = n
CONFIG_PLATFORM_MSTAR = n
CONFIG_PLATFORM_SZEBOOK = n
@ -104,6 +110,10 @@ CONFIG_PLATFORM_ACTIONS_ATV5201 = n
CONFIG_PLATFORM_ARM_RTD299X = n
CONFIG_PLATFORM_ARM_SPREADTRUM_6820 = n
CONFIG_PLATFORM_ARM_SPREADTRUM_8810 = n
CONFIG_PLATFORM_ARM_WMT = n
CONFIG_PLATFORM_TI_DM365 = n
CONFIG_PLATFORM_MOZART = n
CONFIG_PLATFORM_RTK119X = n
###############################################################
CONFIG_DRVEXT_MODULE = n
@ -156,16 +166,28 @@ _HAL_INTFS_FILES := hal/hal_intf.o \
hal/hal_com.o \
hal/hal_com_phycfg.o \
hal/hal_phy.o \
hal/hal_dm.o \
hal/hal_btcoex.o \
hal/hal_hci/hal_$(HCI_NAME).o \
hal/led/hal_$(HCI_NAME)_led.o
_OUTSRC_FILES := hal/OUTSRC/odm_debug.o \
hal/OUTSRC/odm_AntDiv.o\
hal/OUTSRC/odm_interface.o\
hal/OUTSRC/odm_HWConfig.o\
hal/OUTSRC/odm.o\
hal/OUTSRC/HalPhyRf.o
hal/OUTSRC/HalPhyRf.o\
hal/OUTSRC/odm_EdcaTurboCheck.o\
hal/OUTSRC/odm_DIG.o\
hal/OUTSRC/odm_PathDiv.o\
hal/OUTSRC/odm_RaInfo.o\
hal/OUTSRC/odm_DynamicBBPowerSaving.o\
hal/OUTSRC/odm_PowerTracking.o\
hal/OUTSRC/odm_DynamicTxPower.o\
hal/OUTSRC/PhyDM_Adaptivity.o\
hal/OUTSRC/odm_CfoTracking.o\
hal/OUTSRC/odm_NoiseMonitor.o\
hal/OUTSRC/odm_ACS.o
EXTRA_CFLAGS += -I$(src)/platform
_PLATFORM_FILES := platform/platform_ops.o
@ -183,10 +205,11 @@ _OUTSRC_FILES += hal/OUTSRC-BTCoexist/HalBtc8188c2Ant.o \
hal/OUTSRC-BTCoexist/HalBtc8812a1Ant.o \
hal/OUTSRC-BTCoexist/HalBtc8812a2Ant.o \
hal/OUTSRC-BTCoexist/HalBtc8821a1Ant.o \
hal/OUTSRC-BTCoexist/HalBtc8821a2Ant.o
hal/OUTSRC-BTCoexist/HalBtc8821a2Ant.o \
hal/OUTSRC-BTCoexist/HalBtc8821aCsr2Ant.o
endif
########### HAL_RTL8192C #################################
########### HAL_RTL8192C #################################
ifeq ($(CONFIG_RTL8192C), y)
RTL871X = rtl8192c
@ -211,7 +234,7 @@ _HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \
hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \
hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_led.o \
hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_xmit.o \
hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_recv.o
hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_recv.o
_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o
@ -271,7 +294,7 @@ endif
_OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/odm_RTL8192D.o\
hal/OUTSRC/$(RTL871X)/HalDMOutSrc8192D_CE.o
ifeq ($(CONFIG_USB_HCI), y)
_OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/Hal8192DUFWImg_CE.o \
hal/OUTSRC/$(RTL871X)/Hal8192DUPHYImg_CE.o \
@ -308,7 +331,7 @@ _HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \
hal/$(RTL871X)/Hal8723PwrSeq.o\
hal/$(RTL871X)/$(RTL871X)_xmit.o \
hal/$(RTL871X)/$(RTL871X)_sreset.o
_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \
hal/$(RTL871X)/$(RTL871X)_phycfg.o \
hal/$(RTL871X)/$(RTL871X)_rf6052.o \
@ -319,7 +342,7 @@ _HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \
hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_led.o \
hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_xmit.o \
hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_recv.o
ifeq ($(CONFIG_SDIO_HCI), y)
_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o
else
@ -370,6 +393,10 @@ ifeq ($(CONFIG_SDIO_HCI), y)
MODULE_NAME = 8189es
endif
ifeq ($(CONFIG_GSPI_HCI), y)
MODULE_NAME = 8189es
endif
ifeq ($(CONFIG_USB_HCI), y)
MODULE_NAME = 8188eu
endif
@ -407,7 +434,7 @@ endif
ifeq ($(CONFIG_MP_INCLUDED), y)
_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_mp.o
endif
endif
#hal/OUTSRC/$(RTL871X)/Hal8188EFWImg_CE.o
_OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/HalHWImg8188E_MAC.o\
@ -530,10 +557,6 @@ _OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/HalHWImg8812A_FW.o\
hal/OUTSRC/$(RTL871X)/HalHWImg8812A_MAC.o\
hal/OUTSRC/$(RTL871X)/HalHWImg8812A_BB.o\
hal/OUTSRC/$(RTL871X)/HalHWImg8812A_RF.o\
hal/OUTSRC/$(RTL871X)/HalHWImg8812A_TestChip_FW.o\
hal/OUTSRC/$(RTL871X)/HalHWImg8812A_TestChip_MAC.o\
hal/OUTSRC/$(RTL871X)/HalHWImg8812A_TestChip_BB.o\
hal/OUTSRC/$(RTL871X)/HalHWImg8812A_TestChip_RF.o\
hal/OUTSRC/$(RTL871X)/HalPhyRf_8812A.o\
hal/OUTSRC/$(RTL871X)/odm_RegConfig8812A.o\
hal/OUTSRC/$(RTL871X)/odm_RTL8812A.o
@ -561,14 +584,12 @@ _OUTSRC_FILES += hal/OUTSRC/rtl8821a/HalHWImg8821A_FW.o\
hal/OUTSRC/rtl8821a/HalHWImg8821A_MAC.o\
hal/OUTSRC/rtl8821a/HalHWImg8821A_BB.o\
hal/OUTSRC/rtl8821a/HalHWImg8821A_RF.o\
hal/OUTSRC/rtl8821a/HalHWImg8821A_TestChip_MAC.o\
hal/OUTSRC/rtl8821a/HalHWImg8821A_TestChip_BB.o\
hal/OUTSRC/rtl8821a/HalHWImg8821A_TestChip_RF.o\
hal/OUTSRC/rtl8812a/HalPhyRf_8812A.o\
hal/OUTSRC/rtl8821a/HalPhyRf_8821A.o\
hal/OUTSRC/rtl8821a/odm_RegConfig8821A.o\
hal/OUTSRC/rtl8821a/odm_RTL8821A.o
endif
hal/OUTSRC/rtl8821a/odm_RTL8821A.o\
hal/OUTSRC/rtl8821a/PhyDM_IQK_8821A.o
endif
endif
@ -599,7 +620,7 @@ _HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \
hal/$(RTL871X)/$(RTL871X)_dm.o \
hal/$(RTL871X)/$(RTL871X)_rxdesc.o \
hal/$(RTL871X)/$(RTL871X)_cmd.o \
_HAL_INTFS_FILES += \
hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \
@ -628,14 +649,14 @@ _OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/HalHWImg8723B_BB.o\
endif
########### AUTO_CFG #################################
########### AUTO_CFG #################################
ifeq ($(CONFIG_AUTOCFG_CP), y)
ifeq ($(CONFIG_MULTIDRV), y)
ifeq ($(CONFIG_MULTIDRV), y)
$(shell cp $(TopDIR)/autoconf_multidrv_$(HCI_NAME)_linux.h $(TopDIR)/include/autoconf.h)
else
ifeq ($(CONFIG_RTL8188E)$(CONFIG_SDIO_HCI),yy)
ifeq ($(CONFIG_RTL8188E)$(CONFIG_SDIO_HCI),yy)
$(shell cp $(TopDIR)/autoconf_rtl8189e_$(HCI_NAME)_linux.h $(TopDIR)/include/autoconf.h)
else
$(shell cp $(TopDIR)/autoconf_$(RTL871X)_$(HCI_NAME)_linux.h $(TopDIR)/include/autoconf.h)
@ -689,6 +710,14 @@ endif
ifeq ($(CONFIG_EFUSE_CONFIG_FILE), y)
EXTRA_CFLAGS += -DCONFIG_EFUSE_CONFIG_FILE
ifeq ($(MODULE_NAME), 8189es)
EXTRA_CFLAGS += -DEFUSE_MAP_PATH=\"/system/etc/wifi/wifi_efuse_8189e.map\"
else ifeq ($(MODULE_NAME), 8723bs)
EXTRA_CFLAGS += -DEFUSE_MAP_PATH=\"/system/etc/wifi/wifi_efuse_8723bs.map\"
else
EXTRA_CFLAGS += -DEFUSE_MAP_PATH=\"/system/etc/wifi/wifi_efuse_$(MODULE_NAME).map\"
endif
EXTRA_CFLAGS += -DWIFIMAC_PATH=\"/data/wifimac.txt\"
endif
ifeq ($(CONFIG_EXT_CLK), y)
@ -701,6 +730,8 @@ endif
ifeq ($(CONFIG_LOAD_PHY_PARA_FROM_FILE), y)
EXTRA_CFLAGS += -DCONFIG_LOAD_PHY_PARA_FROM_FILE
#EXTRA_CFLAGS += -DREALTEK_CONFIG_PATH=\"/lib/firmware/\"
EXTRA_CFLAGS += -DREALTEK_CONFIG_PATH=\"\"
endif
ifeq ($(CONFIG_CALIBRATE_TX_POWER_BY_REGULATORY), y)
@ -711,8 +742,24 @@ ifeq ($(CONFIG_CALIBRATE_TX_POWER_TO_MAX), y)
EXTRA_CFLAGS += -DCONFIG_CALIBRATE_TX_POWER_TO_MAX
endif
ifeq ($(CONFIG_ODM_ADAPTIVITY), y)
EXTRA_CFLAGS += -DCONFIG_ODM_ADAPTIVITY
ifeq ($(CONFIG_RTW_ADAPTIVITY_EN), disable)
EXTRA_CFLAGS += -DCONFIG_RTW_ADAPTIVITY_EN=0
else ifeq ($(CONFIG_RTW_ADAPTIVITY_EN), enable)
EXTRA_CFLAGS += -DCONFIG_RTW_ADAPTIVITY_EN=1
endif
ifeq ($(CONFIG_RTW_ADAPTIVITY_MODE), normal)
EXTRA_CFLAGS += -DCONFIG_RTW_ADAPTIVITY_MODE=0
else ifeq ($(CONFIG_RTW_ADAPTIVITY_MODE), carrier_sense)
EXTRA_CFLAGS += -DCONFIG_RTW_ADAPTIVITY_MODE=1
endif
ifeq ($(CONFIG_SKIP_SIGNAL_SCALE_MAPPING), y)
EXTRA_CFLAGS += -DCONFIG_SKIP_SIGNAL_SCALE_MAPPING
endif
ifeq ($(CONFIG_80211W), y)
EXTRA_CFLAGS += -DCONFIG_IEEE80211W
endif
ifeq ($(CONFIG_WOWLAN), y)
@ -740,12 +787,31 @@ ifeq ($(CONFIG_GPIO_WAKEUP), y)
EXTRA_CFLAGS += -DCONFIG_GPIO_WAKEUP
endif
ifneq ($(CONFIG_WAKEUP_GPIO_IDX), default)
EXTRA_CFLAGS += -DWAKEUP_GPIO_IDX=$(CONFIG_WAKEUP_GPIO_IDX)
endif
ifeq ($(CONFIG_RTW_SDIO_PM_KEEP_POWER), y)
ifeq ($(CONFIG_SDIO_HCI), y)
EXTRA_CFLAGS += -DCONFIG_RTW_SDIO_PM_KEEP_POWER
endif
endif
ifeq ($(CONFIG_REDUCE_TX_CPU_LOADING), y)
EXTRA_CFLAGS += -DCONFIG_REDUCE_TX_CPU_LOADING
endif
ifeq ($(CONFIG_BR_EXT), y)
BR_NAME = br0
EXTRA_CFLAGS += -DCONFIG_BR_EXT
EXTRA_CFLAGS += '-DCONFIG_BR_EXT_BRNAME="'$(BR_NAME)'"'
endif
ifeq ($(CONFIG_ANTENNA_DIVERSITY), y)
EXTRA_CFLAGS += -DCONFIG_ANTENNA_DIVERSITY
endif
ifeq ($(CONFIG_PLATFORM_I386_PC), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
SUBARCH := $(shell uname -m | sed -e s/i.86/i386/)
@ -913,7 +979,7 @@ KSRC ?= /lib/modules/2.6.31-770-g0e46b52/source
endif
ifeq ($(CONFIG_PLATFORM_FS_MX61), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
ARCH := arm
CROSS_COMPILE := /home/share/CusEnv/FreeScale/arm-eabi-4.4.3/bin/arm-eabi-
KSRC ?= /home/share/CusEnv/FreeScale/FS_kernel_env
@ -931,10 +997,24 @@ endif
ifeq ($(CONFIG_PLATFORM_TI_DM365), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_TI_DM365
EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_RX
EXTRA_CFLAGS += -DCONFIG_SINGLE_XMIT_BUF -DCONFIG_SINGLE_RECV_BUF
ARCH := arm
CROSS_COMPILE := /home/cnsd4/Appro/mv_pro_5.0/montavista/pro/devkit/arm/v5t_le/bin/arm_v5t_le-
#CROSS_COMPILE := /home/cnsd4/Appro/mv_pro_5.0/montavista/pro/devkit/arm/v5t_le/bin/arm_v5t_le-
#KSRC := /home/cnsd4/Appro/mv_pro_5.0/montavista/pro/devkit/lsp/ti-davinci/linux-dm365
CROSS_COMPILE := /opt/montavista/pro5.0/devkit/arm/v5t_le/bin/arm-linux-
KSRC:= /home/vivotek/lsp/DM365/kernel_platform/kernel/linux-2.6.18
KERNELOUTPUT := ${PRODUCTDIR}/tmp
KVER := 2.6.18
KSRC := /home/cnsd4/Appro/mv_pro_5.0/montavista/pro/devkit/lsp/ti-davinci/linux-dm365
endif
ifeq ($(CONFIG_PLATFORM_MOZART), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_MOZART
ARCH := arm
CROSS_COMPILE := /home/vivotek/lsp/mozart3v2/Mozart3e_Toolchain/build_arm_nofpu/usr/bin/arm-linux-
KVER := $(shell uname -r)
KSRC:= /opt/Vivotek/lsp/mozart3v2/kernel_platform/kernel/mozart_kernel-1.17
KERNELOUTPUT := /home/pink/sample/ODM/IP8136W-VINT/tmp/kernel
endif
ifeq ($(CONFIG_PLATFORM_TEGRA3_CARDHU), y)
@ -1016,6 +1096,7 @@ MODULE_NAME := wlan
endif
ifeq ($(CONFIG_PLATFORM_ARM_RK3066), y)
EXTRA_CFLAGS += -DCONFIG_PLATFORM_ARM_RK3066
EXTRA_CFLAGS += -DRTW_ENABLE_WIFI_CONTROL_FUNC
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE
@ -1060,7 +1141,7 @@ endif
ifeq ($(CONFIG_PLATFORM_SZEBOOK), y)
EXTRA_CFLAGS += -DCONFIG_BIG_ENDIAN
ARCH:=arm
CROSS_COMPILE:=/opt/crosstool2/bin/armeb-unknown-linux-gnueabi-
CROSS_COMPILE:=/opt/crosstool2/bin/armeb-unknown-linux-gnueabi-
KVER:= 2.6.31.6
KSRC:= ../code/linux-2.6.31.6-2020/
endif
@ -1184,13 +1265,17 @@ _PLATFORM_FILES += platform/platform_ARM_SUNnI_sdio.o
endif
ARCH := arm
CROSS_COMPILE := /home/android_sdk/Allwinner/a23/android-jb42/lichee/out/android/common/buildroot/external-toolchain/bin/arm-linux-gnueabi-
KVER := 3.4.39
KSRC :=/home/android_sdk/Allwinner/a23/android-jb42/lichee/linux-3.4
# ===Cross compile setting for Android 4.2 SDK ===
#CROSS_COMPILE := /home/android_sdk/Allwinner/a23/android-jb42/lichee/out/android/common/buildroot/external-toolchain/bin/arm-linux-gnueabi-
#KSRC :=/home/android_sdk/Allwinner/a23/android-jb42/lichee/linux-3.4
# ===Cross compile setting for Android 4.4 SDK ===
CROSS_COMPILE := /home/android_sdk/Allwinner/a23/android-kk44/lichee/out/android/common/buildroot/external-toolchain/bin/arm-linux-gnueabi-
KSRC :=/home/android_sdk/Allwinner/a23/android-kk44/lichee/linux-3.4
endif
ifeq ($(CONFIG_PLATFORM_ACTIONS_ATV5201), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ACTIONS_ATV5201
EXTRA_CFLAGS += -DCONFIG_SDIO_DISABLE_RXFIFO_POLLING_LOOP
ARCH := mips
CROSS_COMPILE := mipsel-linux-gnu-
KVER := $(KERNEL_VER)
@ -1236,7 +1321,53 @@ _PLATFORM_FILES += platform/platform_sprd_sdio.o
endif
endif
ifeq ($(CONFIG_MULTIDRV), y)
ifeq ($(CONFIG_PLATFORM_ARM_WMT), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE
EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT
EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS
ifeq ($(CONFIG_SDIO_HCI), y)
_PLATFORM_FILES += platform/platform_ARM_WMT_sdio.o
endif
ARCH := arm
CROSS_COMPILE := /home/android_sdk/WonderMedia/wm8880-android4.4/toolchain/arm_201103_gcc4.5.2/mybin/arm_1103_le-
KSRC := /home/android_sdk/WonderMedia/wm8880-android4.4/kernel4.4/
MODULE_NAME :=8189es_kk
endif
ifeq ($(CONFIG_PLATFORM_RTK119X), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
#EXTRA_CFLAGS += -DCONFIG_PLATFORM_ARM_SUN7I
EXTRA_CFLAGS += -DCONFIG_TRAFFIC_PROTECT
# default setting for Android 4.1, 4.2
EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE
EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT
#EXTRA_CFLAGS += -DCONFIG_P2P_IPS -DCONFIG_QOS_OPTIMIZATION
EXTRA_CFLAGS += -DCONFIG_QOS_OPTIMIZATION
#EXTRA_CFLAGS += -DCONFIG_#PLATFORM_OPS
ifeq ($(CONFIG_USB_HCI), y)
EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX
#_PLATFORM_FILES += platform/platform_ARM_SUNxI_usb.o
endif
ifeq ($(CONFIG_SDIO_HCI), y)
_PLATFORM_FILES += platform/platform_ARM_SUNnI_sdio.o
endif
ARCH := arm
# ==== Cross compile setting for Android 4.4 SDK =====
#CROSS_COMPILE := arm-linux-gnueabihf-
KVER := 3.10.24
#KSRC :=/home/android_sdk/Allwinner/a20/android-kitkat44/lichee/linux-3.4
CROSS_COMPILE := /home/realtek/software_phoenix/phoenix/toolchain/usr/local/arm-2013.11/bin/arm-linux-gnueabihf-
KSRC := /home/realtek/software_phoenix/linux-kernel
MODULE_NAME := 8192eu
endif
ifeq ($(CONFIG_MULTIDRV), y)
ifeq ($(CONFIG_SDIO_HCI), y)
MODULE_NAME := rtw_sdio
@ -1253,6 +1384,7 @@ endif
endif
USER_MODULE_NAME ?=
ifneq ($(USER_MODULE_NAME),)
MODULE_NAME := $(USER_MODULE_NAME)
endif
@ -1292,7 +1424,7 @@ $(MODULE_NAME)-$(CONFIG_INTEL_WIDI) += core/rtw_intel_widi.o
$(MODULE_NAME)-$(CONFIG_WAPI_SUPPORT) += core/rtw_wapi.o \
core/rtw_wapi_sms4.o
$(MODULE_NAME)-y += $(_OS_INTFS_FILES)
$(MODULE_NAME)-y += $(_HAL_INTFS_FILES)
$(MODULE_NAME)-y += $(_OUTSRC_FILES)
@ -1342,7 +1474,7 @@ config_r:
clean:
cd hal/OUTSRC/ ; rm -fr */*.mod.c */*.mod */*.o */.*.cmd */*.ko
cd hal/OUTSRC/ ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko
cd hal/OUTSRC/ ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko
cd hal/led ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko
cd hal ; rm -fr */*/*.mod.c */*/*.mod */*/*.o */*/.*.cmd */*/*.ko
cd hal ; rm -fr */*.mod.c */*.mod */*.o */.*.cmd */*.ko

25
core/efuse/rtw_efuse.c
View File

@ -433,7 +433,8 @@ efuse_OneByteRead(
u32 tmpidx = 0;
u8 bResult;
u8 readbyte;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
//DBG_871X("===> EFUSE_OneByteRead(), addr = %x\n", addr);
//DBG_871X("===> EFUSE_OneByteRead() start, 0x34 = 0x%X\n", rtw_read32(pAdapter, EFUSE_TEST));
@ -442,9 +443,12 @@ efuse_OneByteRead(
bResult = Efuse_Read1ByteFromFakeContent(pAdapter, addr, data);
return bResult;
}
if( IS_HARDWARE_TYPE_8723B(pAdapter) ||
(IS_HARDWARE_TYPE_8192E(pAdapter) && IS_VENDOR_8192E_B_CUT(pAdapter)))
(IS_HARDWARE_TYPE_8192E(pAdapter) && (!IS_A_CUT(pHalData->VersionID))) ||
//(IS_HARDWARE_TYPE_8188E(pAdapter) && ((IS_I_CUT(pHalData->VersionID)) || (IS_J_CUT(pHalData->VersionID))))
(IS_VENDOR_8188E_I_CUT_SERIES(pAdapter))
)
{
// <20130121, Kordan> For SMIC EFUSE specificatoin.
//0x34[11]: SW force PGMEN input of efuse to high. (for the bank selected by 0x34[9:8])
@ -495,7 +499,8 @@ efuse_OneByteWrite(
u8 tmpidx = 0;
u8 bResult=_FALSE;
u32 efuseValue = 0;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
//DBG_871X("===> EFUSE_OneByteWrite(), addr = %x data=%x\n", addr, data);
//DBG_871X("===> EFUSE_OneByteWrite() start, 0x34 = 0x%X\n", rtw_read32(pAdapter, EFUSE_TEST));
@ -517,7 +522,11 @@ efuse_OneByteWrite(
// <20130227, Kordan> 8192E MP chip A-cut had better not set 0x34[11] until B-Cut.
if (IS_HARDWARE_TYPE_8723B(pAdapter)||(IS_HARDWARE_TYPE_8192E(pAdapter) && IS_VENDOR_8192E_B_CUT(pAdapter)))
if ( IS_HARDWARE_TYPE_8723B(pAdapter) ||
(IS_HARDWARE_TYPE_8192E(pAdapter) && (!IS_A_CUT(pHalData->VersionID))) ||
//(IS_HARDWARE_TYPE_8188E(pAdapter) && ((IS_I_CUT(pHalData->VersionID)) || (IS_J_CUT(pHalData->VersionID))))
(IS_VENDOR_8188E_I_CUT_SERIES(pAdapter))
)
{
// <20130121, Kordan> For SMIC EFUSE specificatoin.
//0x34[11]: SW force PGMEN input of efuse to high. (for the bank selected by 0x34[9:8])
@ -548,7 +557,11 @@ efuse_OneByteWrite(
}
// disable Efuse program enable
if (IS_HARDWARE_TYPE_8723B(pAdapter))
if ( IS_HARDWARE_TYPE_8723B(pAdapter) ||
(IS_HARDWARE_TYPE_8192E(pAdapter) && (!IS_A_CUT(pHalData->VersionID))) ||
//(IS_HARDWARE_TYPE_8188E(pAdapter) && ((IS_I_CUT(pHalData->VersionID)) || (IS_J_CUT(pHalData->VersionID))))
(IS_VENDOR_8188E_I_CUT_SERIES(pAdapter))
)
{
PHY_SetMacReg(pAdapter, EFUSE_TEST, BIT(11), 0);
}

121
core/rtw_ap.c
View File

@ -71,9 +71,9 @@ void free_mlme_ap_info(_adapter *padapter)
//free bc/mc sta_info
psta = rtw_get_bcmc_stainfo(padapter);
_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
//_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
rtw_free_stainfo(padapter, psta);
_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
//_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
_rtw_spinlock_free(&pmlmepriv->bcn_update_lock);
@ -405,9 +405,9 @@ void expire_timeout_chk(_adapter *padapter)
_exit_critical_bh(&pstapriv->auth_list_lock, &irqL);
_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
//_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
rtw_free_stainfo(padapter, psta);
_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
//_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
_enter_critical_bh(&pstapriv->auth_list_lock, &irqL);
}
@ -877,8 +877,6 @@ void update_bmc_sta(_adapter *padapter)
if(psta)
{
psta->aid = 0;//default set to 0
//psta->mac_id = psta->aid+4;
psta->mac_id = psta->aid + 1;//mac_id=1 for bc/mc stainfo
pmlmeinfo->FW_sta_info[psta->mac_id].psta = psta;
@ -992,33 +990,46 @@ void update_sta_info_apmode(_adapter *padapter, struct sta_info *psta)
//check if sta supports rx ampdu
phtpriv_sta->ampdu_enable = phtpriv_ap->ampdu_enable;
//check if sta support s Short GI 20M
phtpriv_sta->rx_ampdu_min_spacing = (phtpriv_sta->ht_cap.ampdu_params_info&IEEE80211_HT_CAP_AMPDU_DENSITY)>>2;
// bwmode
if((phtpriv_sta->ht_cap.cap_info & phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SUP_WIDTH))
{
psta->bw_mode = CHANNEL_WIDTH_40;
}
else
{
psta->bw_mode = CHANNEL_WIDTH_20;
}
if(pmlmeext->cur_bwmode < psta->bw_mode)
{
psta->bw_mode = pmlmeext->cur_bwmode;
}
phtpriv_sta->ch_offset = pmlmeext->cur_ch_offset;
//check if sta support s Short GI 20M
if((phtpriv_sta->ht_cap.cap_info & phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SGI_20))
{
phtpriv_sta->sgi_20m = _TRUE;
}
//check if sta support s Short GI 40M
//check if sta support s Short GI 40M
if((phtpriv_sta->ht_cap.cap_info & phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SGI_40))
{
phtpriv_sta->sgi_40m = _TRUE;
}
// bwmode
if((phtpriv_sta->ht_cap.cap_info & phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SUP_WIDTH))
{
phtpriv_sta->ch_offset = pmlmeext->cur_ch_offset;
psta->bw_mode = CHANNEL_WIDTH_40;
}
else
{
psta->bw_mode = CHANNEL_WIDTH_20;
if(psta->bw_mode == CHANNEL_WIDTH_40) //according to psta->bw_mode
phtpriv_sta->sgi_40m = _TRUE;
else
phtpriv_sta->sgi_40m = _FALSE;
}
psta->qos_option = _TRUE;
// B0 Config LDPC Coding Capability
if (TEST_FLAG(phtpriv_ap->ldpc_cap, LDPC_HT_ENABLE_TX) &&
GET_HT_CAPABILITY_ELE_LDPC_CAP((u8 *)(&phtpriv_sta->ht_cap)))
GET_HT_CAP_ELE_LDPC_CAP((u8 *)(&phtpriv_sta->ht_cap)))
{
SET_FLAG(cur_ldpc_cap, (LDPC_HT_ENABLE_TX | LDPC_HT_CAP_TX));
DBG_871X("Enable HT Tx LDPC for STA(%d)\n",psta->aid);
@ -1026,7 +1037,7 @@ void update_sta_info_apmode(_adapter *padapter, struct sta_info *psta)
// B7 B8 B9 Config STBC setting
if (TEST_FLAG(phtpriv_ap->stbc_cap, STBC_HT_ENABLE_TX) &&
GET_HT_CAPABILITY_ELE_RX_STBC((u8 *)(&phtpriv_sta->ht_cap)))
GET_HT_CAP_ELE_RX_STBC((u8 *)(&phtpriv_sta->ht_cap)))
{
SET_FLAG(cur_stbc_cap, (STBC_HT_ENABLE_TX | STBC_HT_CAP_TX) );
DBG_871X("Enable HT Tx STBC for STA(%d)\n",psta->aid);
@ -1720,9 +1731,14 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len)
if(p && ie_len>0)
{
u8 rf_type=0;
u8 max_rx_ampdu_factor=0;
HT_CAP_AMPDU_FACTOR max_rx_ampdu_factor=MAX_AMPDU_FACTOR_64K;
struct rtw_ieee80211_ht_cap *pht_cap = (struct rtw_ieee80211_ht_cap *)(p+2);
if (0) {
DBG_871X(FUNC_ADPT_FMT" HT_CAP_IE from upper layer:\n", FUNC_ADPT_ARG(padapter));
dump_ht_cap_ie_content(RTW_DBGDUMP, p+2, ie_len);
}
pHT_caps_ie=p;
ht_cap = _TRUE;
@ -1730,6 +1746,7 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len)
rtw_ht_use_default_setting(padapter);
/* Update HT Capabilities Info field */
if (pmlmepriv->htpriv.sgi_20m == _FALSE)
pht_cap->cap_info &= ~(IEEE80211_HT_CAP_SGI_20);
@ -1751,8 +1768,9 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len)
pht_cap->cap_info &= ~(IEEE80211_HT_CAP_RX_STBC_3R);
}
/* Update A-MPDU Parameters field */
pht_cap->ampdu_params_info &= ~(IEEE80211_HT_CAP_AMPDU_FACTOR|IEEE80211_HT_CAP_AMPDU_DENSITY);
if((psecuritypriv->wpa_pairwise_cipher & WPA_CIPHER_CCMP) ||
(psecuritypriv->wpa2_pairwise_cipher & WPA_CIPHER_CCMP))
{
@ -1766,11 +1784,25 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len)
rtw_hal_get_def_var(padapter, HW_VAR_MAX_RX_AMPDU_FACTOR, &max_rx_ampdu_factor);
pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_FACTOR & max_rx_ampdu_factor); //set Max Rx AMPDU size to 64K
rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
if(rf_type == RF_1T1R)
{
pht_cap->supp_mcs_set[0] = 0xff;
pht_cap->supp_mcs_set[1] = 0x0;
/* Update Supported MCS Set field */
{
int i;
rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
/* RX MCS Bitmask */
switch(rf_type)
{
case RF_1T1R:
case RF_1T2R: //?
set_mcs_rate_by_mask(HT_CAP_ELE_RX_MCS_MAP(pht_cap), MCS_RATE_1R);
break;
case RF_2T2R:
default:
set_mcs_rate_by_mask(HT_CAP_ELE_RX_MCS_MAP(pht_cap), MCS_RATE_2R);
}
for (i = 0; i < 10; i++)
*(HT_CAP_ELE_RX_MCS_MAP(pht_cap)+i) &= padapter->mlmeextpriv.default_supported_mcs_set[i];
}
#ifdef CONFIG_BEAMFORMING
@ -1800,7 +1832,11 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len)
#endif //CONFIG_BEAMFORMING
_rtw_memcpy(&pmlmepriv->htpriv.ht_cap, p+2, ie_len);
if (0) {
DBG_871X(FUNC_ADPT_FMT" HT_CAP_IE driver masked:\n", FUNC_ADPT_ARG(padapter));
dump_ht_cap_ie_content(RTW_DBGDUMP, p+2, ie_len);
}
}
//parsing HT_INFO_IE
@ -2363,7 +2399,7 @@ static void update_bcn_vendor_spec_ie(_adapter *padapter, u8*oui)
}
void update_beacon(_adapter *padapter, u8 ie_id, u8 *oui, u8 tx)
void _update_beacon(_adapter *padapter, u8 ie_id, u8 *oui, u8 tx, const char *tag)
{
_irqL irqL;
struct mlme_priv *pmlmepriv;
@ -2441,6 +2477,8 @@ void update_beacon(_adapter *padapter, u8 ie_id, u8 *oui, u8 tx)
if(tx)
{
//send_beacon(padapter);//send_beacon must execute on TSR level
if (0)
DBG_871X(FUNC_ADPT_FMT" ie_id:%u - %s\n", FUNC_ADPT_ARG(padapter), ie_id, tag);
set_tx_beacon_cmd(padapter);
}
#else
@ -2890,7 +2928,7 @@ u8 ap_free_sta(_adapter *padapter, struct sta_info *psta, bool active, u16 reaso
//report_del_sta_event(padapter, psta->hwaddr, reason);
//clear cam entry / key
rtw_clearstakey_cmd(padapter, (u8*)psta, (u8)rtw_get_camid(psta->mac_id), _TRUE);
rtw_clearstakey_cmd(padapter, psta, _TRUE);
_enter_critical_bh(&psta->lock, &irqL);
@ -2916,9 +2954,9 @@ u8 ap_free_sta(_adapter *padapter, struct sta_info *psta, bool active, u16 reaso
beacon_updated = bss_cap_update_on_sta_leave(padapter, psta);
_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
//_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
rtw_free_stainfo(padapter, psta);
_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
//_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
return beacon_updated;
@ -2973,12 +3011,10 @@ int rtw_sta_flush(_adapter *padapter)
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff};
DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(padapter->pnetdev));
if((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE)
return ret;
DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(padapter->pnetdev));
_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL);
phead = &pstapriv->asoc_list;
plist = get_next(phead);
@ -3129,13 +3165,14 @@ void rtw_ap_restore_network(_adapter *padapter)
if (psta == NULL) {
DBG_871X(FUNC_ADPT_FMT" sta_info is null\n", FUNC_ADPT_ARG(padapter));
} else if (psta->state &_FW_LINKED) {
rtw_sta_media_status_rpt(padapter, psta, 1);
Update_RA_Entry(padapter, psta);
//pairwise key
/* per sta pairwise key and settings */
if( (padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_) ||
(padapter->securitypriv.dot11PrivacyAlgrthm == _AES_))
{
rtw_setstakey_cmd(padapter, (unsigned char *)psta, _TRUE,_FALSE);
rtw_setstakey_cmd(padapter, psta, _TRUE,_FALSE);
}
}
}
@ -3178,13 +3215,14 @@ void start_ap_mode(_adapter *padapter)
for(i=0; i<NUM_STA; i++)
pstapriv->sta_aid[i] = NULL;
/* to avoid memory leak issue, don't set to NULL directly
pmlmepriv->wps_beacon_ie = NULL;
pmlmepriv->wps_probe_resp_ie = NULL;
pmlmepriv->wps_assoc_resp_ie = NULL;
pmlmepriv->p2p_beacon_ie = NULL;
pmlmepriv->p2p_probe_resp_ie = NULL;
*/
//for ACL
_rtw_init_listhead(&(pacl_list->acl_node_q.queue));
@ -3212,6 +3250,7 @@ void stop_ap_mode(_adapter *padapter)
pmlmepriv->update_bcn = _FALSE;
pmlmeext->bstart_bss = _FALSE;
padapter->netif_up = _FALSE;
//_rtw_spinlock_free(&pmlmepriv->bcn_update_lock);
//reset and init security priv , this can refine with rtw_reset_securitypriv
@ -3247,9 +3286,9 @@ void stop_ap_mode(_adapter *padapter)
rtw_free_all_stainfo(padapter);
psta = rtw_get_bcmc_stainfo(padapter);
_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
//_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
rtw_free_stainfo(padapter, psta);
_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
//_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
rtw_init_bcmc_stainfo(padapter);

4
core/rtw_beamforming.c
View File

@ -330,7 +330,7 @@ BOOLEAN issue_ht_ndpa_packet(PADAPTER Adapter, u8 *ra, CHANNEL_WIDTH bw, u8 qidx
update_mgntframe_attrib(Adapter, pattrib);
if (qidx == BCN_QUEUE_INX)
pattrib->qsel = 0x10;
pattrib->qsel = QSLT_BEACON;
pattrib->rate = MGN_MCS8;
pattrib->bwmode = bw;
pattrib->order = 1;
@ -412,7 +412,7 @@ BOOLEAN issue_vht_ndpa_packet(PADAPTER Adapter, u8 *ra, u16 aid, CHANNEL_WIDTH b
update_mgntframe_attrib(Adapter, pattrib);
if (qidx == BCN_QUEUE_INX)
pattrib->qsel = 0x10;
pattrib->qsel = QSLT_BEACON;
pattrib->rate = MGN_VHT2SS_MCS0;
pattrib->bwmode = bw;
pattrib->subtype = WIFI_NDPA;

77
core/rtw_br_ext.c
View File

@ -247,7 +247,7 @@ static int update_nd_link_layer_addr(unsigned char *data, int len, unsigned char
if (len >= 8) {
mac = scan_tlv(&data[8], len-8, 1, 1);
if (mac) {
_DEBUG_INFO("Router Solicitation, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n",
DBG_871X("Router Solicitation, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0],mac[1],mac[2],mac[3],mac[4],mac[5],
replace_mac[0],replace_mac[1],replace_mac[2],replace_mac[3],replace_mac[4],replace_mac[5]);
memcpy(mac, replace_mac, 6);
@ -259,7 +259,7 @@ static int update_nd_link_layer_addr(unsigned char *data, int len, unsigned char
if (len >= 16) {
mac = scan_tlv(&data[16], len-16, 1, 1);
if (mac) {
_DEBUG_INFO("Router Advertisement, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n",
DBG_871X("Router Advertisement, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0],mac[1],mac[2],mac[3],mac[4],mac[5],
replace_mac[0],replace_mac[1],replace_mac[2],replace_mac[3],replace_mac[4],replace_mac[5]);
memcpy(mac, replace_mac, 6);
@ -271,7 +271,7 @@ static int update_nd_link_layer_addr(unsigned char *data, int len, unsigned char
if (len >= 24) {
mac = scan_tlv(&data[24], len-24, 1, 1);
if (mac) {
_DEBUG_INFO("Neighbor Solicitation, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n",
DBG_871X("Neighbor Solicitation, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0],mac[1],mac[2],mac[3],mac[4],mac[5],
replace_mac[0],replace_mac[1],replace_mac[2],replace_mac[3],replace_mac[4],replace_mac[5]);
memcpy(mac, replace_mac, 6);
@ -283,7 +283,7 @@ static int update_nd_link_layer_addr(unsigned char *data, int len, unsigned char
if (len >= 24) {
mac = scan_tlv(&data[24], len-24, 2, 1);
if (mac) {
_DEBUG_INFO("Neighbor Advertisement, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n",
DBG_871X("Neighbor Advertisement, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0],mac[1],mac[2],mac[3],mac[4],mac[5],
replace_mac[0],replace_mac[1],replace_mac[2],replace_mac[3],replace_mac[4],replace_mac[5]);
memcpy(mac, replace_mac, 6);
@ -295,7 +295,7 @@ static int update_nd_link_layer_addr(unsigned char *data, int len, unsigned char
if (len >= 40) {
mac = scan_tlv(&data[40], len-40, 2, 1);
if (mac) {
_DEBUG_INFO("Redirect, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n",
DBG_871X("Redirect, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0],mac[1],mac[2],mac[3],mac[4],mac[5],
replace_mac[0],replace_mac[1],replace_mac[2],replace_mac[3],replace_mac[4],replace_mac[5]);
memcpy(mac, replace_mac, 6);
@ -439,7 +439,7 @@ static int __nat25_db_network_lookup_and_replace(_adapter *priv,
atomic_inc(&db->use_count);
#ifdef CL_IPV6_PASS
DEBUG_INFO("NAT25: Lookup M:%02x%02x%02x%02x%02x%02x N:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x"
DBG_871X("NAT25: Lookup M:%02x%02x%02x%02x%02x%02x N:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x"
"%02x%02x%02x%02x%02x%02x\n",
db->macAddr[0],
db->macAddr[1],
@ -465,7 +465,7 @@ static int __nat25_db_network_lookup_and_replace(_adapter *priv,
db->networkAddr[15],
db->networkAddr[16]);
#else
DEBUG_INFO("NAT25: Lookup M:%02x%02x%02x%02x%02x%02x N:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n",
DBG_871X("NAT25: Lookup M:%02x%02x%02x%02x%02x%02x N:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n",
db->macAddr[0],
db->macAddr[1],
db->macAddr[2],
@ -815,7 +815,7 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
//in class A, B, C, host address is all zero or all one is illegal
if (iph->saddr == 0)
return 0;
DEBUG_INFO("NAT25: Insert IP, SA=%08x, DA=%08x\n", iph->saddr, iph->daddr);
DBG_871X("NAT25: Insert IP, SA=%08x, DA=%08x\n", iph->saddr, iph->daddr);
__nat25_generate_ipv4_network_addr(networkAddr, &iph->saddr);
//record source IP address and , source mac address into db
__nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr);
@ -826,7 +826,7 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
case NAT25_LOOKUP:
{
DEBUG_INFO("NAT25: Lookup IP, SA=%08x, DA=%08x\n", iph->saddr, iph->daddr);
DBG_871X("NAT25: Lookup IP, SA=%08x, DA=%08x\n", iph->saddr, iph->daddr);
#ifdef SUPPORT_TX_MCAST2UNI
if (priv->pshare->rf_ft_var.mc2u_disable ||
((((OPMODE & (WIFI_STATION_STATE|WIFI_ASOC_STATE))
@ -840,12 +840,12 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
if (!__nat25_db_network_lookup_and_replace(priv, skb, networkAddr)) {
if (*((unsigned char *)&iph->daddr + 3) == 0xff) {
// L2 is unicast but L3 is broadcast, make L2 bacome broadcast
DEBUG_INFO("NAT25: Set DA as boardcast\n");
DBG_871X("NAT25: Set DA as boardcast\n");
memset(skb->data, 0xff, ETH_ALEN);
}
else {
// forward unknow IP packet to upper TCP/IP
DEBUG_INFO("NAT25: Replace DA with BR's MAC\n");
DBG_871X("NAT25: Replace DA with BR's MAC\n");
if ( (*(u32 *)priv->br_mac) == 0 && (*(u16 *)(priv->br_mac+4)) == 0 ) {
void netdev_br_init(struct net_device *netdev);
printk("Re-init netdev_br_init() due to br_mac==0!\n");
@ -885,7 +885,7 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
case NAT25_INSERT:
{
DEBUG_INFO("NAT25: Insert ARP, MAC=%02x%02x%02x%02x%02x%02x\n", arp_ptr[0],
DBG_871X("NAT25: Insert ARP, MAC=%02x%02x%02x%02x%02x%02x\n", arp_ptr[0],
arp_ptr[1], arp_ptr[2], arp_ptr[3], arp_ptr[4], arp_ptr[5]);
// change to ARP sender mac address to wlan STA address
@ -904,7 +904,7 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
case NAT25_LOOKUP:
{
DEBUG_INFO("NAT25: Lookup ARP\n");
DBG_871X("NAT25: Lookup ARP\n");
arp_ptr += arp->ar_hln;
sender = (unsigned int *)arp_ptr;
@ -930,8 +930,9 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
/*---------------------------------------------------*/
/* Handle IPX and Apple Talk frame */
/*---------------------------------------------------*/
else if((protocol == __constant_htons(ETH_P_IPX)) ||
(protocol <= __constant_htons(ETH_FRAME_LEN)))
else if((protocol == __constant_htons(ETH_P_IPX)) ||
(protocol == __constant_htons(ETH_P_ATALK)) ||
(protocol == __constant_htons(ETH_P_AARP)))
{
unsigned char ipx_header[2] = {0xFF, 0xFF};
struct ipxhdr *ipx = NULL;
@ -941,14 +942,14 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
if(protocol == __constant_htons(ETH_P_IPX))
{
DEBUG_INFO("NAT25: Protocol=IPX (Ethernet II)\n");
DBG_871X("NAT25: Protocol=IPX (Ethernet II)\n");
ipx = (struct ipxhdr *)framePtr;
}
else if(protocol <= __constant_htons(ETH_FRAME_LEN))
else //if(protocol <= __constant_htons(ETH_FRAME_LEN))
{
if(!memcmp(ipx_header, framePtr, 2))
{
DEBUG_INFO("NAT25: Protocol=IPX (Ethernet 802.3)\n");
DBG_871X("NAT25: Protocol=IPX (Ethernet 802.3)\n");
ipx = (struct ipxhdr *)framePtr;
}
else
@ -968,7 +969,7 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
{
framePtr += 5; // eliminate the SNAP header
DEBUG_INFO("NAT25: Protocol=IPX (Ethernet SNAP)\n");
DBG_871X("NAT25: Protocol=IPX (Ethernet SNAP)\n");
ipx = (struct ipxhdr *)framePtr;
}
else if(!memcmp(aarp_snap_id, framePtr, 5))
@ -996,18 +997,14 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
if(!memcmp(ipx_header, framePtr, 2))
{
DEBUG_INFO("NAT25: Protocol=IPX (Ethernet 802.2)\n");
DBG_871X("NAT25: Protocol=IPX (Ethernet 802.2)\n");
ipx = (struct ipxhdr *)framePtr;
}
else
return -1;
}
else
return -1;
}
}
else
return -1;
/* IPX */
if(ipx != NULL)
@ -1017,14 +1014,14 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
case NAT25_CHECK:
if(!memcmp(skb->data+ETH_ALEN, ipx->ipx_source.node, ETH_ALEN))
{
DEBUG_INFO("NAT25: Check IPX skb_copy\n");
DBG_871X("NAT25: Check IPX skb_copy\n");
return 0;
}
return -1;
case NAT25_INSERT:
{
DEBUG_INFO("NAT25: Insert IPX, Dest=%08x,%02x%02x%02x%02x%02x%02x,%04x Source=%08x,%02x%02x%02x%02x%02x%02x,%04x\n",
DBG_871X("NAT25: Insert IPX, Dest=%08x,%02x%02x%02x%02x%02x%02x,%04x Source=%08x,%02x%02x%02x%02x%02x%02x,%04x\n",
ipx->ipx_dest.net,
ipx->ipx_dest.node[0],
ipx->ipx_dest.node[1],
@ -1044,7 +1041,7 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
if(!memcmp(skb->data+ETH_ALEN, ipx->ipx_source.node, ETH_ALEN))
{
DEBUG_INFO("NAT25: Use IPX Net, and Socket as network addr\n");
DBG_871X("NAT25: Use IPX Net, and Socket as network addr\n");
__nat25_generate_ipx_network_addr_with_socket(networkAddr, &ipx->ipx_source.net, &ipx->ipx_source.sock);
@ -1066,7 +1063,7 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
{
if(!memcmp(GET_MY_HWADDR(priv), ipx->ipx_dest.node, ETH_ALEN))
{
DEBUG_INFO("NAT25: Lookup IPX, Modify Destination IPX Node addr\n");
DBG_871X("NAT25: Lookup IPX, Modify Destination IPX Node addr\n");
__nat25_generate_ipx_network_addr_with_socket(networkAddr, &ipx->ipx_dest.net, &ipx->ipx_dest.sock);
@ -1109,7 +1106,7 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
// change to AARP source mac address to wlan STA address
memcpy(ea->hw_src, GET_MY_HWADDR(priv), ETH_ALEN);
DEBUG_INFO("NAT25: Insert AARP, Source=%d,%d Destination=%d,%d\n",
DBG_871X("NAT25: Insert AARP, Source=%d,%d Destination=%d,%d\n",
ea->pa_src_net,
ea->pa_src_node,
ea->pa_dst_net,
@ -1125,7 +1122,7 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
case NAT25_LOOKUP:
{
DEBUG_INFO("NAT25: Lookup AARP, Source=%d,%d Destination=%d,%d\n",
DBG_871X("NAT25: Lookup AARP, Source=%d,%d Destination=%d,%d\n",
ea->pa_src_net,
ea->pa_src_node,
ea->pa_dst_net,
@ -1155,7 +1152,7 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
case NAT25_INSERT:
{
DEBUG_INFO("NAT25: Insert DDP, Source=%d,%d Destination=%d,%d\n",
DBG_871X("NAT25: Insert DDP, Source=%d,%d Destination=%d,%d\n",
ddp->deh_snet,
ddp->deh_snode,
ddp->deh_dnet,
@ -1171,7 +1168,7 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
case NAT25_LOOKUP:
{
DEBUG_INFO("NAT25: Lookup DDP, Source=%d,%d Destination=%d,%d\n",
DBG_871X("NAT25: Lookup DDP, Source=%d,%d Destination=%d,%d\n",
ddp->deh_snet,
ddp->deh_snode,
ddp->deh_dnet,
@ -1248,7 +1245,7 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
if(__nat25_add_pppoe_tag(skb, tag) < 0)
return -1;
DEBUG_INFO("NAT25: Insert PPPoE, forward %s packet\n",
DBG_871X("NAT25: Insert PPPoE, forward %s packet\n",
(ph->code == PADI_CODE ? "PADI" : "PADR"));
}
else { // not add relay tag
@ -1269,7 +1266,7 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
}
else // session phase
{
DEBUG_INFO("NAT25: Insert PPPoE, insert session packet to %s\n", skb->dev->name);
DBG_871X("NAT25: Insert PPPoE, insert session packet to %s\n", skb->dev->name);
__nat25_generate_pppoe_network_addr(networkAddr, skb->data, &(ph->sid));
@ -1327,7 +1324,7 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
if (offset > 0)
tag->tag_len = htons(tagLen-MAGIC_CODE_LEN-RTL_RELAY_TAG_LEN);
DEBUG_INFO("NAT25: Lookup PPPoE, forward %s Packet from %s\n",
DBG_871X("NAT25: Lookup PPPoE, forward %s Packet from %s\n",
(ph->code == PADO_CODE ? "PADO" : "PADS"), skb->dev->name);
}
else { // not add relay tag
@ -1342,7 +1339,7 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
else {
if(ph->sid != 0)
{
DEBUG_INFO("NAT25: Lookup PPPoE, lookup session packet from %s\n", skb->dev->name);
DBG_871X("NAT25: Lookup PPPoE, lookup session packet from %s\n", skb->dev->name);
__nat25_generate_pppoe_network_addr(networkAddr, skb->data+ETH_ALEN, &(ph->sid));
__nat25_db_network_lookup_and_replace(priv, skb, networkAddr);
@ -1426,7 +1423,7 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
case NAT25_INSERT:
{
DEBUG_INFO("NAT25: Insert IP, SA=%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x,"
DBG_871X("NAT25: Insert IP, SA=%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x,"
" DA=%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x\n",
iph->saddr.s6_addr16[0],iph->saddr.s6_addr16[1],iph->saddr.s6_addr16[2],iph->saddr.s6_addr16[3],
iph->saddr.s6_addr16[4],iph->saddr.s6_addr16[5],iph->saddr.s6_addr16[6],iph->saddr.s6_addr16[7],
@ -1455,7 +1452,7 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
return 0;
case NAT25_LOOKUP:
DEBUG_INFO("NAT25: Lookup IP, SA=%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x,"
DBG_871X("NAT25: Lookup IP, SA=%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x,"
" DA=%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x\n",
iph->saddr.s6_addr16[0],iph->saddr.s6_addr16[1],iph->saddr.s6_addr16[2],iph->saddr.s6_addr16[3],
iph->saddr.s6_addr16[4],iph->saddr.s6_addr16[5],iph->saddr.s6_addr16[6],iph->saddr.s6_addr16[7],
@ -1571,7 +1568,7 @@ void mac_clone(_adapter *priv, unsigned char *addr)
struct sockaddr sa;
memcpy(sa.sa_data, addr, ETH_ALEN);
DEBUG_INFO("MAC Clone: Addr=%02x%02x%02x%02x%02x%02x\n",
DBG_871X("MAC Clone: Addr=%02x%02x%02x%02x%02x%02x\n",
addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]);
rtl8192cd_set_hwaddr(priv->dev, &sa);
}
@ -1650,7 +1647,7 @@ void dhcp_flag_bcast(_adapter *priv, struct sk_buff *skb)
{
register int sum = 0;
DEBUG_INFO("DHCP: change flag of DHCP request to broadcast.\n");
DBG_871X("DHCP: change flag of DHCP request to broadcast.\n");
// or BROADCAST flag
dhcph->flags |= htons(BROADCAST_FLAG);
// recalculate checksum

6
core/rtw_bt_mp.c
View File

@ -107,10 +107,6 @@ mptbt_CheckC2hFrame(
return c2hStatus;
}
#if defined(CONFIG_RTL8723A)
extern s32 FillH2CCmd(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer);
#endif
BT_CTRL_STATUS
mptbt_SendH2c(
PADAPTER Adapter,
@ -140,7 +136,7 @@ mptbt_SendH2c(
pMptCtx->MptBtC2hEvent = _FALSE;
#if defined(CONFIG_RTL8723A)
FillH2CCmd(Adapter, 70, h2cCmdLen, (pu1Byte)pH2c);
rtw_hal_fill_h2c_cmd(Adapter, 70, h2cCmdLen, (pu1Byte)pH2c);
#elif defined(CONFIG_RTL8723B)
rtl8723b_set_FwBtMpOper_cmd(Adapter, pH2c->opCode, pH2c->opCodeVer, pH2c->reqNum, pH2c->buf);
#endif

63
core/rtw_btcoex.c
View File

@ -28,6 +28,16 @@ void rtw_btcoex_Initialize(PADAPTER padapter)
hal_btcoex_Initialize(padapter);
}
void rtw_btcoex_PowerOnSetting(PADAPTER padapter)
{
hal_btcoex_PowerOnSetting(padapter);
}
void rtw_btcoex_PreLoadFirmware(PADAPTER padapter)
{
hal_btcoex_PreLoadFirmware(padapter);
}
void rtw_btcoex_HAL_Initialize(PADAPTER padapter, u8 bWifiOnly)
{
hal_btcoex_InitHwConfig(padapter, bWifiOnly);
@ -240,9 +250,9 @@ void rtw_btcoex_SetChipType(PADAPTER padapter, u8 chipType)
hal_btcoex_SetChipType(padapter, chipType);
}
void rtw_btcoex_SetPGAntNum(PADAPTER padapter, u8 antNum, u8 antInverse)
void rtw_btcoex_SetPGAntNum(PADAPTER padapter, u8 antNum)
{
hal_btcoex_SetPgAntNum(padapter, antNum, antInverse);
hal_btcoex_SetPgAntNum(padapter, antNum);
}
u8 rtw_btcoex_GetPGAntNum(PADAPTER padapter)
@ -250,6 +260,11 @@ u8 rtw_btcoex_GetPGAntNum(PADAPTER padapter)
return hal_btcoex_GetPgAntNum(padapter);
}
void rtw_btcoex_SetSingleAntPath(PADAPTER padapter, u8 singleAntPath)
{
hal_btcoex_SetSingleAntPath(padapter, singleAntPath);
}
u32 rtw_btcoex_GetRaMask(PADAPTER padapter)
{
return hal_btcoex_GetRaMask(padapter);
@ -291,15 +306,53 @@ u8 rtw_btcoex_IsBtLinkExist(PADAPTER padapter)
void rtw_btcoex_RejectApAggregatedPacket(PADAPTER padapter, u8 enable)
{
struct mlme_ext_info *pmlmeinfo;
struct sta_info *psta;
pmlmeinfo = &padapter->mlmeextpriv.mlmext_info;
psta = rtw_get_stainfo(&padapter->stapriv, get_bssid(&padapter->mlmepriv));
if (_TRUE == enable)
{
struct sta_info *psta = NULL;
pmlmeinfo->bAcceptAddbaReq = _FALSE;
send_delba(padapter, 0, psta->hwaddr);
if ((pmlmeinfo->state & 0x03) == WIFI_FW_STATION_STATE) {
psta = rtw_get_stainfo(&padapter->stapriv, get_bssid(&padapter->mlmepriv));
if (psta)
send_delba(padapter, 0, psta->hwaddr);
} else if ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) {
_irqL irqL;
_list *phead, *plist;
u8 peer_num = 0;
char peers[NUM_STA];
struct sta_priv *pstapriv = &padapter->stapriv;
int i;
_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL);
phead = &pstapriv->asoc_list;
plist = get_next(phead);
while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) {
int stainfo_offset;
psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list);
plist = get_next(plist);
stainfo_offset = rtw_stainfo_offset(pstapriv, psta);
if (stainfo_offset_valid(stainfo_offset))
peers[peer_num++] = stainfo_offset;
}
_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL);
if (peer_num) {
for (i = 0; i < peer_num; i++) {
psta = rtw_get_stainfo_by_offset(pstapriv, peers[i]);
if (psta)
send_delba(padapter, 0, psta->hwaddr);
}
}
}
}
else
{

361
core/rtw_cmd.c
View File

File diff suppressed because it is too large Load Diff

664
core/rtw_debug.c
View File

File diff suppressed because it is too large Load Diff

93
core/rtw_ieee80211.c
View File

@ -150,7 +150,6 @@ u8 *rtw_set_ie
uint *frlen //frame length
)
{
_func_enter_;
*pbuf = (u8)index;
*(pbuf + 1) = (u8)len;
@ -161,7 +160,6 @@ _func_enter_;
*frlen = *frlen + (len + 2);
return (pbuf + len + 2);
_func_exit_;
}
inline u8 *rtw_set_ie_ch_switch(u8 *buf, u32 *buf_len, u8 ch_switch_mode,
@ -1112,7 +1110,7 @@ static int rtw_ieee802_11_parse_vendor_specific(u8 *pos, uint elen,
elems->wme_tspec_len = elen;
break;
default:
DBG_871X("unknown WME "
DBG_871X_LEVEL(_drv_warning_, "unknown WME "
"information element ignored "
"(subtype=%d len=%lu)\n",
pos[4], (unsigned long) elen);
@ -1125,7 +1123,7 @@ static int rtw_ieee802_11_parse_vendor_specific(u8 *pos, uint elen,
elems->wps_ie_len = elen;
break;
default:
DBG_871X("Unknown Microsoft "
DBG_871X_LEVEL(_drv_warning_, "Unknown Microsoft "
"information element ignored "
"(type=%d len=%lu)\n",
pos[3], (unsigned long) elen);
@ -1140,7 +1138,7 @@ static int rtw_ieee802_11_parse_vendor_specific(u8 *pos, uint elen,
elems->vendor_ht_cap_len = elen;
break;
default:
DBG_871X("Unknown Broadcom "
DBG_871X_LEVEL(_drv_warning_, "Unknown Broadcom "
"information element ignored "
"(type=%d len=%lu)\n",
pos[3], (unsigned long) elen);
@ -1149,7 +1147,7 @@ static int rtw_ieee802_11_parse_vendor_specific(u8 *pos, uint elen,
break;
default:
DBG_871X("unknown vendor specific information "
DBG_871X_LEVEL(_drv_warning_, "unknown vendor specific information "
"element ignored (vendor OUI %02x:%02x:%02x "
"len=%lu)\n",
pos[0], pos[1], pos[2], (unsigned long) elen);
@ -1290,9 +1288,10 @@ ParseRes rtw_ieee802_11_parse_elems(u8 *start, uint len,
unknown++;
if (!show_errors)
break;
DBG_871X("IEEE 802.11 element parse "
"ignored unknown element (id=%d elen=%d)\n",
id, elen);
DBG_871X_LEVEL(_drv_warning_,
"IEEE 802.11 element parse "
"ignored unknown element (id=%d elen=%d)\n",
id, elen);
break;
}
@ -1387,21 +1386,56 @@ void rtw_macaddr_cfg(u8 *mac_addr)
DBG_871X("rtw_macaddr_cfg MAC Address = "MAC_FMT"\n", MAC_ARG(mac_addr));
}
void dump_ies(u8 *buf, u32 buf_len)
#ifdef CONFIG_80211N_HT
void dump_ht_cap_ie_content(void *sel, u8 *buf, u32 buf_len)
{
if (buf_len != 26) {
DBG_871X_SEL_NL(sel, "Invalid HT capability IE len:%d != %d\n", buf_len, 26);
return;
}
DBG_871X_SEL_NL(sel, "HT Capabilities Info:%02x%02x\n", *(buf), *(buf+1));
DBG_871X_SEL_NL(sel, "A-MPDU Parameters:"HT_AMPDU_PARA_FMT"\n"
, HT_AMPDU_PARA_ARG(HT_CAP_ELE_AMPDU_PARA(buf)));
DBG_871X_SEL_NL(sel, "Supported MCS Set:"HT_SUP_MCS_SET_FMT"\n"
, HT_SUP_MCS_SET_ARG(HT_CAP_ELE_SUP_MCS_SET(buf)));
}
void dump_ht_cap_ie(void *sel, u8 *ie, u32 ie_len)
{
u8* pos = (u8*)ie;
u16 id;
u16 len;
u8 *ht_cap_ie;
sint ht_cap_ielen;
ht_cap_ie = rtw_get_ie(ie, _HT_CAPABILITY_IE_, &ht_cap_ielen, ie_len);
if(!ie || ht_cap_ie != ie)
return;
dump_ht_cap_ie_content(sel, ht_cap_ie+2, ht_cap_ielen);
}
#endif /* CONFIG_80211N_HT */
void dump_ies(void *sel, u8 *buf, u32 buf_len)
{
u8* pos = (u8*)buf;
u8 id, len;
while(pos-buf<=buf_len){
while(pos-buf+1<buf_len){
id = *pos;
len = *(pos+1);
DBG_871X("%s ID:%u, LEN:%u\n", __FUNCTION__, id, len);
dump_wps_ie(pos, len);
DBG_871X_SEL_NL(sel, "%s ID:%u, LEN:%u\n", __FUNCTION__, id, len);
#ifdef CONFIG_80211N_HT
dump_ht_cap_ie(sel, pos, len);
#endif
dump_wps_ie(sel, pos, len);
#ifdef CONFIG_P2P
dump_p2p_ie(pos, len);
dump_p2p_ie(sel, pos, len);
#ifdef CONFIG_WFD
dump_wfd_ie(pos, len);
dump_wfd_ie(sel, pos, len);
#endif
#endif
@ -1409,7 +1443,7 @@ void dump_ies(u8 *buf, u32 buf_len)
}
}
void dump_wps_ie(u8 *ie, u32 ie_len)
void dump_wps_ie(void *sel, u8 *ie, u32 ie_len)
{
u8* pos = (u8*)ie;
u16 id;
@ -1427,7 +1461,7 @@ void dump_wps_ie(u8 *ie, u32 ie_len)
id = RTW_GET_BE16(pos);
len = RTW_GET_BE16(pos + 2);
DBG_871X("%s ID:0x%04x, LEN:%u\n", __FUNCTION__, id, len);
DBG_871X_SEL_NL(sel, "%s ID:0x%04x, LEN:%u\n", __FUNCTION__, id, len);
pos+=(4+len);
}
@ -1505,7 +1539,7 @@ int rtw_p2p_merge_ies(u8 *in_ie, u32 in_len, u8 *merge_ie)
return 0;
}
void dump_p2p_ie(u8 *ie, u32 ie_len) {
void dump_p2p_ie(void *sel, u8 *ie, u32 ie_len) {
u8* pos = (u8*)ie;
u8 id;
u16 len;
@ -1522,7 +1556,7 @@ void dump_p2p_ie(u8 *ie, u32 ie_len) {
id = *pos;
len = RTW_GET_LE16(pos+1);
DBG_871X("%s ID:%u, LEN:%u\n", __FUNCTION__, id, len);
DBG_871X_SEL_NL(sel, "%s ID:%u, LEN:%u\n", __FUNCTION__, id, len);
pos+=(3+len);
}
@ -1726,7 +1760,7 @@ static uint rtw_p2p_attr_remove(u8 *ie, uint ielen_ori, u8 attr_id)
{
u8 *next_attr = target_attr+target_attr_len;
uint remain_len = ielen-(next_attr-ie);
//dump_ies(ie, ielen);
//dump_ies(RTW_DBGDUMP, ie, ielen);
#if 0
DBG_871X("[%d] ie:%p, ielen:%u\n"
"target_attr:%p, target_attr_len:%u\n"
@ -1747,7 +1781,7 @@ static uint rtw_p2p_attr_remove(u8 *ie, uint ielen_ori, u8 attr_id)
else
{
//if(index>0)
// dump_ies(ie, ielen);
// dump_ies(RTW_DBGDUMP, ie, ielen);
break;
}
}
@ -1763,12 +1797,11 @@ void rtw_WLAN_BSSID_EX_remove_p2p_attr(WLAN_BSSID_EX *bss_ex, u8 attr_id)
if( (p2p_ie=rtw_get_p2p_ie(bss_ex->IEs+_FIXED_IE_LENGTH_, bss_ex->IELength-_FIXED_IE_LENGTH_, NULL, &p2p_ielen_ori)) )
{
#if 0
if (0)
if(rtw_get_p2p_attr(p2p_ie, p2p_ielen_ori, attr_id, NULL, NULL)) {
DBG_871X("rtw_get_p2p_attr: GOT P2P_ATTR:%u!!!!!!!!\n", attr_id);
dump_ies(bss_ex->IEs+_FIXED_IE_LENGTH_, bss_ex->IELength-_FIXED_IE_LENGTH_);
dump_ies(RTW_DBGDUMP, bss_ex->IEs+_FIXED_IE_LENGTH_, bss_ex->IELength-_FIXED_IE_LENGTH_);
}
#endif
p2p_ielen=rtw_p2p_attr_remove(p2p_ie, p2p_ielen_ori, attr_id);
if(p2p_ielen != p2p_ielen_ori) {
@ -1781,10 +1814,10 @@ void rtw_WLAN_BSSID_EX_remove_p2p_attr(WLAN_BSSID_EX *bss_ex, u8 attr_id)
_rtw_memset(next_ie+remain_len, 0, p2p_ielen_ori-p2p_ielen);
bss_ex->IELength -= p2p_ielen_ori-p2p_ielen;
#if 0
DBG_871X("remove P2P_ATTR:%u!\n", attr_id);
dump_ies(bss_ex->IEs+_FIXED_IE_LENGTH_, bss_ex->IELength-_FIXED_IE_LENGTH_);
#endif
if (0) {
DBG_871X("remove P2P_ATTR:%u!\n", attr_id);
dump_ies(RTW_DBGDUMP, bss_ex->IEs+_FIXED_IE_LENGTH_, bss_ex->IELength-_FIXED_IE_LENGTH_);
}
}
}
}
@ -1792,7 +1825,7 @@ void rtw_WLAN_BSSID_EX_remove_p2p_attr(WLAN_BSSID_EX *bss_ex, u8 attr_id)
#endif //CONFIG_P2P
#ifdef CONFIG_WFD
void dump_wfd_ie(u8 *ie, u32 ie_len)
void dump_wfd_ie(void *sel, u8 *ie, u32 ie_len)
{
u8* pos = (u8*)ie;
u8 id;
@ -1809,7 +1842,7 @@ void dump_wfd_ie(u8 *ie, u32 ie_len)
id = *pos;
len = RTW_GET_BE16(pos+1);
DBG_871X("%s ID:%u, LEN:%u\n", __FUNCTION__, id, len);
DBG_871X_SEL_NL(sel, "%s ID:%u, LEN:%u\n", __FUNCTION__, id, len);
pos+=(3+len);
}

4
core/rtw_ioctl_set.c
View File

@ -1254,11 +1254,11 @@ _func_enter_;
//Set key to CAM through H2C command
if(bgrouptkey)//never go to here
{
res=rtw_setstakey_cmd(padapter, (unsigned char *)stainfo, _FALSE, _TRUE);
res=rtw_setstakey_cmd(padapter, stainfo, _FALSE, _TRUE);
RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n rtw_set_802_11_add_key:rtw_setstakey_cmd(group)\n"));
}
else{
res=rtw_setstakey_cmd(padapter, (unsigned char *)stainfo, _TRUE, _TRUE);
res=rtw_setstakey_cmd(padapter, stainfo, _TRUE, _TRUE);
RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n rtw_set_802_11_add_key:rtw_setstakey_cmd(unicast)\n"));
}

4
core/rtw_iol.c
View File

@ -50,7 +50,7 @@ struct xmit_frame *rtw_IOL_accquire_xmit_frame(ADAPTER *adapter)
pattrib = &xmit_frame->attrib;
update_mgntframe_attrib(adapter, pattrib);
pattrib->qsel = 0x10;//Beacon
pattrib->qsel = QSLT_BEACON;//Beacon
pattrib->subtype = WIFI_BEACON;
pattrib->pktlen = pattrib->last_txcmdsz = 0;
@ -62,7 +62,7 @@ struct xmit_frame *rtw_IOL_accquire_xmit_frame(ADAPTER *adapter)
else {
pattrib = &xmit_frame->attrib;
update_mgntframe_attrib(adapter, pattrib);
pattrib->qsel = 0x10;
pattrib->qsel = QSLT_BEACON;
pattrib->pktlen = pattrib->last_txcmdsz = 0;
}
#endif

103
core/rtw_mem.c Normal file
View File

@ -0,0 +1,103 @@
#include <drv_types.h>
#include <rtw_mem.h>
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("Realtek Wireless Lan Driver");
MODULE_AUTHOR("Realtek Semiconductor Corp.");
MODULE_VERSION("DRIVERVERSION");
struct sk_buff_head rtk_skb_mem_q;
struct u8* rtk_buf_mem[NR_RECVBUFF];
struct u8 * rtw_get_buf_premem(int index)
{
printk("%s, rtk_buf_mem index : %d\n", __func__, index);
return rtk_buf_mem[index];
}
struct sk_buff *rtw_alloc_skb_premem(void)
{
struct sk_buff *skb = NULL;
skb = skb_dequeue(&rtk_skb_mem_q);
printk("%s, rtk_skb_mem_q len : %d\n", __func__, skb_queue_len(&rtk_skb_mem_q));
return skb;
}
EXPORT_SYMBOL(rtw_alloc_skb_premem);
int rtw_free_skb_premem(struct sk_buff *pskb)
{
if(!pskb)
return -1;
if(skb_queue_len(&rtk_skb_mem_q) >= NR_PREALLOC_RECV_SKB)
return -1;
skb_queue_tail(&rtk_skb_mem_q, pskb);
printk("%s, rtk_skb_mem_q len : %d\n", __func__, skb_queue_len(&rtk_skb_mem_q));
return 0;
}
EXPORT_SYMBOL(rtw_free_skb_premem);
static int __init rtw_mem_init(void)
{
int i;
SIZE_PTR tmpaddr=0;
SIZE_PTR alignment=0;
struct sk_buff *pskb=NULL;
printk("%s\n", __func__);
#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX
for(i=0; i<NR_RECVBUFF; i++)
{
rtk_buf_mem[i] = usb_buffer_alloc(dev, size, (in_interrupt() ? GFP_ATOMIC : GFP_KERNEL), dma);
}
#endif //CONFIG_USE_USB_BUFFER_ALLOC_RX
skb_queue_head_init(&rtk_skb_mem_q);
for(i=0; i<NR_PREALLOC_RECV_SKB; i++)
{
pskb = __dev_alloc_skb(MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ, in_interrupt() ? GFP_ATOMIC : GFP_KERNEL);
if(pskb)
{
tmpaddr = (SIZE_PTR)pskb->data;
alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1);
skb_reserve(pskb, (RECVBUFF_ALIGN_SZ - alignment));
skb_queue_tail(&rtk_skb_mem_q, pskb);
}
else
{
printk("%s, alloc skb memory fail!\n", __func__);
}
pskb=NULL;
}
printk("%s, rtk_skb_mem_q len : %d\n", __func__, skb_queue_len(&rtk_skb_mem_q));
return 0;
}
static void __exit rtw_mem_exit(void)
{
if (skb_queue_len(&rtk_skb_mem_q)) {
printk("%s, rtk_skb_mem_q len : %d\n", __func__, skb_queue_len(&rtk_skb_mem_q));
}
skb_queue_purge(&rtk_skb_mem_q);
printk("%s\n", __func__);
}
module_init(rtw_mem_init);
module_exit(rtw_mem_exit);

291
core/rtw_mlme.c
View File

File diff suppressed because it is too large Load Diff

725
core/rtw_mlme_ext.c
View File

File diff suppressed because it is too large Load Diff

284
core/rtw_mp.c
View File

@ -292,7 +292,7 @@ s32 init_mp_priv(PADAPTER padapter)
pmppriv->tx.stop = 1;
pmppriv->bSetTxPower=0; //for manually set tx power
pmppriv->bTxBufCkFail=_FALSE;
pmppriv->pktInterval=1;
pmppriv->pktInterval=0;
mp_init_xmit_attrib(&pmppriv->tx, padapter);
@ -423,7 +423,7 @@ void mpt_InitHWConfig(PADAPTER Adapter)
#define PHY_IQCalibrate(_Adapter, b) \
IS_HARDWARE_TYPE_8812(_Adapter) ? PHY_IQCalibrate_8812A(_Adapter, b) : \
IS_HARDWARE_TYPE_8821(_Adapter) ? PHY_IQCalibrate_8821A(_Adapter, b) : \
IS_HARDWARE_TYPE_8821(_Adapter) ? PHY_IQCalibrate_8821A(&(GET_HAL_DATA(_Adapter)->odmpriv), b) : \
PHY_IQCalibrate_default(_Adapter, b)
#define PHY_LCCalibrate(_Adapter) \
@ -449,17 +449,13 @@ static void PHY_IQCalibrate(PADAPTER padapter, u8 bReCovery)
u8 b2ant; //false:1ant, true:2-ant
u8 RF_Path; //0:S1, 1:S0
pHalData = GET_HAL_DATA(padapter);
b2ant = pHalData->EEPROMBluetoothAntNum==Ant_x2?_TRUE:_FALSE;
RF_Path = 0;
#ifdef CONFIG_USB_HCI
RF_Path = 1;
#endif
PHY_IQCalibrate_8723B(padapter, bReCovery, _FALSE, b2ant, RF_Path);
PHY_IQCalibrate_8723B(padapter, bReCovery, _FALSE, b2ant, pHalData->ant_path);
}
#define PHY_LCCalibrate(a) PHY_LCCalibrate_8723B(&(GET_HAL_DATA(a)->odmpriv))
#define PHY_SetRFPathSwitch(a,b) PHY_SetRFPathSwitch_8723B(a,b)
#endif
@ -568,9 +564,6 @@ MPT_InitializeAdapter(
rtw_write16(pAdapter, 0x870, 0x300);
rtw_write16(pAdapter, 0x860, 0x110);
if (pAdapter->registrypriv.mp_mode == 1)
pmlmepriv->fw_state = WIFI_MP_STATE;
return rtStatus;
}
@ -694,7 +687,6 @@ void MPT_PwrCtlDM(PADAPTER padapter, u32 bstart)
PDM_ODM_T pDM_Odm = &pHalData->odmpriv;
if (bstart==1){
ODM_ClearTxPowerTrackingState(pDM_Odm);
DBG_871X("in MPT_PwrCtlDM start \n");
Switch_DM_Func(padapter, DYNAMIC_RF_TX_PWR_TRACK, _TRUE);
pdmpriv->InitODMFlag |= ODM_RF_TX_PWR_TRACK ;
@ -702,6 +694,9 @@ void MPT_PwrCtlDM(PADAPTER padapter, u32 bstart)
pdmpriv->TxPowerTrackControl = _TRUE;
pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = _TRUE;
padapter->mppriv.mp_dm =1;
odm_TXPowerTrackingInit(pDM_Odm);
ODM_ClearTxPowerTrackingState(pDM_Odm);
}else{
DBG_871X("in MPT_PwrCtlDM stop \n");
disable_dm(padapter);
@ -711,7 +706,7 @@ void MPT_PwrCtlDM(PADAPTER padapter, u32 bstart)
padapter->mppriv.mp_dm = 0;
{
TXPWRTRACK_CFG c;
u1Byte chnl =0 ;
u1Byte chnl =0 ;
ConfigureTxpowerTrack(pDM_Odm, &c);
ODM_ClearTxPowerTrackingState(pDM_Odm);
@ -735,7 +730,7 @@ u32 mp_join(PADAPTER padapter,u8 mode)
struct mp_priv *pmppriv = &padapter->mppriv;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct wlan_network *tgt_network = &pmlmepriv->cur_network;
// 1. initialize a new WLAN_BSSID_EX
_rtw_memset(&bssid, 0, sizeof(WLAN_BSSID_EX));
DBG_8192C("%s ,pmppriv->network_macaddr=%x %x %x %x %x %x \n",__func__,
@ -766,21 +761,18 @@ u32 mp_join(PADAPTER padapter,u8 mode)
_enter_critical_bh(&pmlmepriv->lock, &irqL);
//if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE)
// goto end_of_mp_start_test;
#if 0
if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE)
goto end_of_mp_start_test;
//init mp_start_test status
if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) {
rtw_disassoc_cmd(padapter, 0, _TRUE);
rtw_disassoc_cmd(padapter, 500, _TRUE);
rtw_indicate_disconnect(padapter);
rtw_free_assoc_resources(padapter, 1);
}
rtw_msleep_os(500);
pmppriv->prev_fw_state = get_fwstate(pmlmepriv);
if (padapter->registrypriv.mp_mode == 1)
pmlmepriv->fw_state = WIFI_MP_STATE;
pmlmepriv->fw_state = WIFI_MP_STATE;
#if 0
if (pmppriv->mode == _LOOPBOOK_MODE_) {
set_fwstate(pmlmepriv, WIFI_MP_LPBK_STATE); //append txdesc
RT_TRACE(_module_mp_, _drv_notice_, ("+start mp in Lookback mode\n"));
@ -788,11 +780,8 @@ u32 mp_join(PADAPTER padapter,u8 mode)
RT_TRACE(_module_mp_, _drv_notice_, ("+start mp in normal mode\n"));
}
#endif
set_fwstate(pmlmepriv, _FW_UNDER_LINKING);
set_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE);
#if 1
//3 2. create a new psta for mp driver
//clear psta in the cur_network, if any
psta = rtw_get_stainfo(&padapter->stapriv, tgt_network->network.MacAddress);
@ -805,7 +794,7 @@ u32 mp_join(PADAPTER padapter,u8 mode)
res = _FAIL;
goto end_of_mp_start_test;
}
#endif
set_fwstate(pmlmepriv,WIFI_ADHOC_MASTER_STATE);
//3 3. join psudo AdHoc
tgt_network->join_res = 1;
tgt_network->aid = psta->aid = 1;
@ -813,6 +802,7 @@ u32 mp_join(PADAPTER padapter,u8 mode)
rtw_indicate_connect(padapter);
_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
set_fwstate(pmlmepriv,_FW_LINKED);
end_of_mp_start_test:
@ -822,19 +812,21 @@ end_of_mp_start_test:
{
// set MSR to WIFI_FW_ADHOC_STATE
if( mode==WIFI_FW_ADHOC_STATE ){
val8 = rtw_read8(padapter, MSR) & 0xFC; // 0x0102
val8 |= WIFI_FW_ADHOC_STATE;
rtw_write8(padapter, MSR, val8); // Link in ad hoc network
}
}
else {
Set_MSR(padapter, WIFI_FW_STATION_STATE);
DBG_8192C("%s , pmppriv->network_macaddr =%x %x %x %x %x %x\n",__func__,
pmppriv->network_macaddr[0],pmppriv->network_macaddr[1],pmppriv->network_macaddr[2],pmppriv->network_macaddr[3],pmppriv->network_macaddr[4],pmppriv->network_macaddr[5]);
rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, pmppriv->network_macaddr);
}
}
pmlmepriv->fw_state = WIFI_MP_STATE;
return res;
}
//This function initializes the DUT to the MP test mode
@ -1273,7 +1265,7 @@ static thread_return mp_xmit_packet_thread(thread_context context)
goto exit;
}
else {
rtw_usleep_os(100);
rtw_usleep_os(10);
continue;
}
}
@ -1362,7 +1354,7 @@ void fill_tx_desc_8188e(PADAPTER padapter)
u32 pkt_size = pattrib->last_txcmdsz;
s32 bmcast = IS_MCAST(pattrib->ra);
// offset 0
#if !defined(CONFIG_RTL8188E_SDIO)
#if !defined(CONFIG_RTL8188E_SDIO) && !defined(CONFIG_PCI_HCI)
desc->txdw0 |= cpu_to_le32(OWN | FSG | LSG);
desc->txdw0 |= cpu_to_le32(pkt_size & 0x0000FFFF); // packet size
desc->txdw0 |= cpu_to_le32(((TXDESC_SIZE + OFFSET_SZ) << OFFSET_SHT) & 0x00FF0000); //32 bytes for TX Desc
@ -1473,8 +1465,15 @@ void fill_tx_desc_8192e(PADAPTER padapter)
offset = TXDESC_SIZE + OFFSET_SZ;
SET_TX_DESC_OFFSET_92E(pDesc, offset);
#if defined(CONFIG_PCI_HCI) //8192EE
SET_TX_DESC_OFFSET_92E(pDesc, offset+8); //work around
SET_TX_DESC_PKT_OFFSET_92E(pDesc, 0); /* 8192EE pkt_offset is 0 */
#else //8192EU 8192ES
SET_TX_DESC_OFFSET_92E(pDesc, offset);
SET_TX_DESC_PKT_OFFSET_92E(pDesc, 1);
#endif
if (bmcast) {
SET_TX_DESC_BMC_92E(pDesc, 1);
@ -1551,9 +1550,9 @@ static void Rtw_MPSetMacTxEDCA(PADAPTER padapter)
PHY_SetMacReg(padapter, 0x458 ,bMaskDWord , 0x0);
//DBG_8192C("%s()!!!!! 0x460 = 0x%x\n" ,__func__,PHY_QueryBBReg(padapter, 0x460, bMaskDWord));
PHY_SetMacReg(padapter, 0x460 ,bMaskLWord , 0x0);//fast EDCA queue packet interval & time out vaule
PHY_SetMacReg(padapter, ODM_EDCA_VO_PARAM ,bMaskLWord , 0x431C);
PHY_SetMacReg(padapter, ODM_EDCA_BE_PARAM ,bMaskLWord , 0x431C);
PHY_SetMacReg(padapter, ODM_EDCA_BK_PARAM ,bMaskLWord , 0x431C);
//PHY_SetMacReg(padapter, ODM_EDCA_VO_PARAM ,bMaskLWord , 0x431C);
//PHY_SetMacReg(padapter, ODM_EDCA_BE_PARAM ,bMaskLWord , 0x431C);
//PHY_SetMacReg(padapter, ODM_EDCA_BK_PARAM ,bMaskLWord , 0x431C);
DBG_8192C("%s()!!!!! 0x460 = 0x%x\n" ,__func__,PHY_QueryBBReg(padapter, 0x460, bMaskDWord));
}
@ -1670,16 +1669,18 @@ void SetPacketTx(PADAPTER padapter)
if(pmp_priv->TXradomBuffer == NULL)
{
DBG_871X("mp create random buffer fail!\n");
goto exit;
}
else
{
for(i=0;i<4096;i++)
pmp_priv->TXradomBuffer[i] = rtw_random32() %0xFF;
}
for(i=0;i<4096;i++)
pmp_priv->TXradomBuffer[i] = rtw_random32() %0xFF;
//startPlace = (u32)(rtw_random32() % 3450);
_rtw_memcpy(ptr, pmp_priv->TXradomBuffer,pkt_end - ptr);
//_rtw_memset(ptr, payload, pkt_end - ptr);
rtw_mfree(pmp_priv->TXradomBuffer,4096);
//3 6. start thread
#ifdef PLATFORM_LINUX
pmp_priv->tx.PktTxThread = kthread_run(mp_xmit_packet_thread, pmp_priv, "RTW_MP_THREAD");
@ -1699,7 +1700,8 @@ void SetPacketTx(PADAPTER padapter)
#endif
Rtw_MPSetMacTxEDCA(padapter);
exit:
return;
}
void SetPacketRx(PADAPTER pAdapter, u8 bStartRx)
@ -1886,7 +1888,7 @@ u32 mp_query_psd(PADAPTER pAdapter, u8 *data)
}
#if 0
void _rtw_mp_xmit_priv (struct xmit_priv *pxmitpriv)
{
int i,res;
@ -1953,7 +1955,7 @@ void _rtw_mp_xmit_priv (struct xmit_priv *pxmitpriv)
pxmitbuf->padapter = padapter;
pxmitbuf->buf_tag = XMITBUF_MGNT;
if((res=rtw_os_xmit_resource_alloc(padapter, pxmitbuf,max_xmit_extbuf_size + XMITBUF_ALIGN_SZ, _FALSE)) == _FAIL) {
if((res=rtw_os_xmit_resource_alloc(padapter, pxmitbuf,max_xmit_extbuf_size + XMITBUF_ALIGN_SZ, _TRUE)) == _FAIL) {
res= _FAIL;
goto exit;
}
@ -1978,7 +1980,7 @@ void _rtw_mp_xmit_priv (struct xmit_priv *pxmitpriv)
exit:
;
}
#endif
ULONG getPowerDiffByRate8188E(
@ -2200,8 +2202,7 @@ mpt_ProQueryCalTxPower_8188E(
CurrChannel = 1;
}
if( pMptCtx->MptRateIndex >= MPT_RATE_1M &&
pMptCtx->MptRateIndex <= MPT_RATE_11M )
if(pMptCtx->MptRateIndex <= MPT_RATE_11M )
{
TxPower = pHalData->Index24G_CCK_Base[rf_path][index];
}
@ -2245,8 +2246,7 @@ mpt_ProQueryCalTxPower_8188E(
#endif
// 2012/11/02 Awk: add power limit mechansim
if( pMptCtx->MptRateIndex >= MPT_RATE_1M &&
pMptCtx->MptRateIndex <= MPT_RATE_11M )
if( pMptCtx->MptRateIndex <= MPT_RATE_11M )
{
rate = MGN_1M;
}
@ -2277,72 +2277,141 @@ mpt_ProQueryCalTxPower_8188E(
return TxPower;
}
u8 MptToMgntRate(u32 MptRateIdx)
u8
MptToMgntRate(
IN ULONG MptRateIdx
)
{
// Mapped to MGN_XXX defined in MgntGen.h
switch (MptRateIdx)
{
/* CCK rate. */
case MPT_RATE_1M: return 2;
case MPT_RATE_2M: return 4;
case MPT_RATE_55M: return 11;
case MPT_RATE_11M: return 22;
/* OFDM rate. */
case MPT_RATE_6M: return 12;
case MPT_RATE_9M: return 18;
case MPT_RATE_12M: return 24;
case MPT_RATE_18M: return 36;
case MPT_RATE_24M: return 48;
case MPT_RATE_36M: return 72;
case MPT_RATE_48M: return 96;
case MPT_RATE_54M: return 108;
/* HT rate. */
case MPT_RATE_MCS0: return 0x80;
case MPT_RATE_MCS1: return 0x81;
case MPT_RATE_MCS2: return 0x82;
case MPT_RATE_MCS3: return 0x83;
case MPT_RATE_MCS4: return 0x84;
case MPT_RATE_MCS5: return 0x85;
case MPT_RATE_MCS6: return 0x86;
case MPT_RATE_MCS7: return 0x87;
case MPT_RATE_MCS8: return 0x88;
case MPT_RATE_MCS9: return 0x89;
case MPT_RATE_MCS10: return 0x8A;
case MPT_RATE_MCS11: return 0x8B;
case MPT_RATE_MCS12: return 0x8C;
case MPT_RATE_MCS13: return 0x8D;
case MPT_RATE_MCS14: return 0x8E;
case MPT_RATE_MCS15: return 0x8F;
/* VHT rate. */
case MPT_RATE_VHT1SS_MCS0: return 0x90;
case MPT_RATE_VHT1SS_MCS1: return 0x91;
case MPT_RATE_VHT1SS_MCS2: return 0x92;
case MPT_RATE_VHT1SS_MCS3: return 0x93;
case MPT_RATE_VHT1SS_MCS4: return 0x94;
case MPT_RATE_VHT1SS_MCS5: return 0x95;
case MPT_RATE_VHT1SS_MCS6: return 0x96;
case MPT_RATE_VHT1SS_MCS7: return 0x97;
case MPT_RATE_VHT1SS_MCS8: return 0x98;
case MPT_RATE_VHT1SS_MCS9: return 0x99;
case MPT_RATE_VHT2SS_MCS0: return 0x9A;
case MPT_RATE_VHT2SS_MCS1: return 0x9B;
case MPT_RATE_VHT2SS_MCS2: return 0x9C;
case MPT_RATE_VHT2SS_MCS3: return 0x9D;
case MPT_RATE_VHT2SS_MCS4: return 0x9E;
case MPT_RATE_VHT2SS_MCS5: return 0x9F;
case MPT_RATE_VHT2SS_MCS6: return 0xA0;
case MPT_RATE_VHT2SS_MCS7: return 0xA1;
case MPT_RATE_VHT2SS_MCS8: return 0xA2;
case MPT_RATE_VHT2SS_MCS9: return 0xA3;
case MPT_RATE_1M: return MGN_1M;
case MPT_RATE_2M: return MGN_2M;
case MPT_RATE_55M: return MGN_5_5M;
case MPT_RATE_11M: return MGN_11M;
/* OFDM rate. */
case MPT_RATE_6M: return MGN_6M;
case MPT_RATE_9M: return MGN_9M;
case MPT_RATE_12M: return MGN_12M;
case MPT_RATE_18M: return MGN_18M;
case MPT_RATE_24M: return MGN_24M;
case MPT_RATE_36M: return MGN_36M;
case MPT_RATE_48M: return MGN_48M;
case MPT_RATE_54M: return MGN_54M;
/* HT rate. */
case MPT_RATE_MCS0: return MGN_MCS0;
case MPT_RATE_MCS1: return MGN_MCS1;
case MPT_RATE_MCS2: return MGN_MCS2;
case MPT_RATE_MCS3: return MGN_MCS3;
case MPT_RATE_MCS4: return MGN_MCS4;
case MPT_RATE_MCS5: return MGN_MCS5;
case MPT_RATE_MCS6: return MGN_MCS6;
case MPT_RATE_MCS7: return MGN_MCS7;
case MPT_RATE_MCS8: return MGN_MCS8;
case MPT_RATE_MCS9: return MGN_MCS9;
case MPT_RATE_MCS10: return MGN_MCS10;
case MPT_RATE_MCS11: return MGN_MCS11;
case MPT_RATE_MCS12: return MGN_MCS12;
case MPT_RATE_MCS13: return MGN_MCS13;
case MPT_RATE_MCS14: return MGN_MCS14;
case MPT_RATE_MCS15: return MGN_MCS15;
case MPT_RATE_MCS16: return MGN_MCS16;
case MPT_RATE_MCS17: return MGN_MCS17;
case MPT_RATE_MCS18: return MGN_MCS18;
case MPT_RATE_MCS19: return MGN_MCS19;
case MPT_RATE_MCS20: return MGN_MCS20;
case MPT_RATE_MCS21: return MGN_MCS21;
case MPT_RATE_MCS22: return MGN_MCS22;
case MPT_RATE_MCS23: return MGN_MCS23;
case MPT_RATE_MCS24: return MGN_MCS24;
case MPT_RATE_MCS25: return MGN_MCS25;
case MPT_RATE_MCS26: return MGN_MCS26;
case MPT_RATE_MCS27: return MGN_MCS27;
case MPT_RATE_MCS28: return MGN_MCS28;
case MPT_RATE_MCS29: return MGN_MCS29;
case MPT_RATE_MCS30: return MGN_MCS30;
case MPT_RATE_MCS31: return MGN_MCS31;
/* VHT rate. */
case MPT_RATE_VHT1SS_MCS0: return MGN_VHT1SS_MCS0;
case MPT_RATE_VHT1SS_MCS1: return MGN_VHT1SS_MCS1;
case MPT_RATE_VHT1SS_MCS2: return MGN_VHT1SS_MCS2;
case MPT_RATE_VHT1SS_MCS3: return MGN_VHT1SS_MCS3;
case MPT_RATE_VHT1SS_MCS4: return MGN_VHT1SS_MCS4;
case MPT_RATE_VHT1SS_MCS5: return MGN_VHT1SS_MCS5;
case MPT_RATE_VHT1SS_MCS6: return MGN_VHT1SS_MCS6;
case MPT_RATE_VHT1SS_MCS7: return MGN_VHT1SS_MCS7;
case MPT_RATE_VHT1SS_MCS8: return MGN_VHT1SS_MCS8;
case MPT_RATE_VHT1SS_MCS9: return MGN_VHT1SS_MCS9;
case MPT_RATE_VHT2SS_MCS0: return MGN_VHT2SS_MCS0;
case MPT_RATE_VHT2SS_MCS1: return MGN_VHT2SS_MCS1;
case MPT_RATE_VHT2SS_MCS2: return MGN_VHT2SS_MCS2;
case MPT_RATE_VHT2SS_MCS3: return MGN_VHT2SS_MCS3;
case MPT_RATE_VHT2SS_MCS4: return MGN_VHT2SS_MCS4;
case MPT_RATE_VHT2SS_MCS5: return MGN_VHT2SS_MCS5;
case MPT_RATE_VHT2SS_MCS6: return MGN_VHT2SS_MCS6;
case MPT_RATE_VHT2SS_MCS7: return MGN_VHT2SS_MCS7;
case MPT_RATE_VHT2SS_MCS8: return MGN_VHT2SS_MCS8;
case MPT_RATE_VHT2SS_MCS9: return MGN_VHT2SS_MCS9;
case MPT_RATE_VHT3SS_MCS0: return MGN_VHT3SS_MCS0;
case MPT_RATE_VHT3SS_MCS1: return MGN_VHT3SS_MCS1;
case MPT_RATE_VHT3SS_MCS2: return MGN_VHT3SS_MCS2;
case MPT_RATE_VHT3SS_MCS3: return MGN_VHT3SS_MCS3;
case MPT_RATE_VHT3SS_MCS4: return MGN_VHT3SS_MCS4;
case MPT_RATE_VHT3SS_MCS5: return MGN_VHT3SS_MCS5;
case MPT_RATE_VHT3SS_MCS6: return MGN_VHT3SS_MCS6;
case MPT_RATE_VHT3SS_MCS7: return MGN_VHT3SS_MCS7;
case MPT_RATE_VHT3SS_MCS8: return MGN_VHT3SS_MCS8;
case MPT_RATE_VHT3SS_MCS9: return MGN_VHT3SS_MCS9;
case MPT_RATE_VHT4SS_MCS0: return MGN_VHT4SS_MCS0;
case MPT_RATE_VHT4SS_MCS1: return MGN_VHT4SS_MCS1;
case MPT_RATE_VHT4SS_MCS2: return MGN_VHT4SS_MCS2;
case MPT_RATE_VHT4SS_MCS3: return MGN_VHT4SS_MCS3;
case MPT_RATE_VHT4SS_MCS4: return MGN_VHT4SS_MCS4;
case MPT_RATE_VHT4SS_MCS5: return MGN_VHT4SS_MCS5;
case MPT_RATE_VHT4SS_MCS6: return MGN_VHT4SS_MCS6;
case MPT_RATE_VHT4SS_MCS7: return MGN_VHT4SS_MCS7;
case MPT_RATE_VHT4SS_MCS8: return MGN_VHT4SS_MCS8;
case MPT_RATE_VHT4SS_MCS9: return MGN_VHT4SS_MCS9;
case MPT_RATE_LAST:// fully automatic
default:
DBG_8192C("<===MptToMgntRate(), Invalid Rate: %d!!\n", MptRateIdx);
return 0x0;
case MPT_RATE_LAST: // fully automatiMGN_VHT2SS_MCS1;
default:
DBG_871X("<===MptToMgntRate(), Invalid Rate: %d!!\n", MptRateIdx);
return 0x0;
}
}
u8 rtw_mpRateParseFunc(PADAPTER pAdapter, u8 *targetStr)
{
u16 i=0;
u8* rateindex_Array[] = { "1M","2M","5.5M","11M","6M","9M","12M","18M","24M","36M","48M","54M",
"HTMCS0","HTMCS1","HTMCS2","HTMCS3","HTMCS4","HTMCS5","HTMCS6","HTMCS7",
"HTMCS8","HTMCS9","HTMCS10","HTMCS11","HTMCS12","HTMCS13","HTMCS14","HTMCS15",
"HTMCS16","HTMCS17","HTMCS18","HTMCS19","HTMCS20","HTMCS21","HTMCS22","HTMCS23",
"HTMCS24","HTMCS25","HTMCS26","HTMCS27","HTMCS28","HTMCS29","HTMCS30","HTMCS31",
"VHT1MCS0","VHT1MCS1","VHT1MCS2","VHT1MCS3","VHT1MCS4","VHT1MCS5","VHT1MCS6","VHT1MCS7","VHT1MCS8","VHT1MCS9",
"VHT2MCS0","VHT2MCS1","VHT2MCS2","VHT2MCS3","VHT2MCS4","VHT2MCS5","VHT2MCS6","VHT2MCS7","VHT2MCS8","VHT2MCS9",
"VHT3MCS0","VHT3MCS1","VHT3MCS2","VHT3MCS3","VHT3MCS4","VHT3MCS5","VHT3MCS6","VHT3MCS7","VHT3MCS8","VHT3MCS9",
"VHT4MCS0","VHT4MCS1","VHT4MCS2","VHT4MCS3","VHT4MCS4","VHT4MCS5","VHT4MCS6","VHT4MCS7","VHT4MCS8","VHT4MCS9"};
for(i=0;i<=83;i++){
if(strcmp(targetStr, rateindex_Array[i]) == 0){
DBG_871X("%s , index = %d \n",__func__ ,i);
return i;
}
}
printk("%s ,please input a Data RATE String as:",__func__);
for(i=0;i<=83;i++){
printk("%s ",rateindex_Array[i]);
if(i%10==0)
printk("\n");
}
return _FAIL;
}
ULONG mpt_ProQueryCalTxPower(
@ -2447,8 +2516,5 @@ void Hal_ProSetCrystalCap (PADAPTER pAdapter , u32 CrystalCap)
PHY_SetBBReg(pAdapter, REG_MAC_PHY_CTRL, 0xFFF000, (CrystalCap | (CrystalCap << 6)));
}
}
#endif

4
core/rtw_mp_ioctl.c
View File

@ -1990,9 +1990,9 @@ NDIS_STATUS oid_rt_pro_dele_sta_info_hdl(struct oid_par_priv *poid_par_priv)
psta = rtw_get_stainfo(&Adapter->stapriv, macaddr);
if (psta != NULL) {
_enter_critical(&(Adapter->stapriv.sta_hash_lock), &irqL);
//_enter_critical(&(Adapter->stapriv.sta_hash_lock), &irqL);
rtw_free_stainfo(Adapter, psta);
_exit_critical(&(Adapter->stapriv.sta_hash_lock), &irqL);
//_exit_critical(&(Adapter->stapriv.sta_hash_lock), &irqL);
}
return status;

157
core/rtw_odm.c
View File

@ -37,13 +37,13 @@ const char *odm_comp_str[] = {
/* BIT12 */"ODM_COMP_DYNAMIC_PRICCA",
/* BIT13 */"ODM_COMP_RXHP",
/* BIT14 */"ODM_COMP_MP",
/* BIT15 */"ODM_COMP_DYNAMIC_ATC",
/* BIT16 */"ODM_COMP_EDCA_TURBO",
/* BIT17 */"ODM_COMP_EARLY_MODE",
/* BIT15 */"ODM_COMP_CFO_TRACKING",
/* BIT16 */"ODM_COMP_ACS",
/* BIT17 */"PHYDM_COMP_ADAPTIVITY",
/* BIT18 */NULL,
/* BIT19 */NULL,
/* BIT20 */NULL,
/* BIT21 */NULL,
/* BIT20 */"ODM_COMP_EDCA_TURBO",
/* BIT21 */"ODM_COMP_EARLY_MODE",
/* BIT22 */NULL,
/* BIT23 */NULL,
/* BIT24 */"ODM_COMP_TX_PWR_TRACK",
@ -73,14 +73,14 @@ const char *odm_ability_str[] = {
/* BIT11 */"ODM_BB_PSD",
/* BIT12 */"ODM_BB_RXHP",
/* BIT13 */"ODM_BB_ADAPTIVITY",
/* BIT14 */"ODM_BB_DYNAMIC_ATC",
/* BIT15 */NULL,
/* BIT16 */"ODM_MAC_EDCA_TURBO",
/* BIT17 */"ODM_MAC_EARLY_MODE",
/* BIT14 */"ODM_BB_CFO_TRACKING",
/* BIT15 */"ODM_BB_NHM_CNT",
/* BIT16 */"ODM_BB_PRIMARY_CCA",
/* BIT17 */NULL,
/* BIT18 */NULL,
/* BIT19 */NULL,
/* BIT20 */NULL,
/* BIT21 */NULL,
/* BIT20 */"ODM_MAC_EDCA_TURBO",
/* BIT21 */"ODM_MAC_EARLY_MODE",
/* BIT22 */NULL,
/* BIT23 */NULL,
/* BIT24 */"ODM_RF_TX_PWR_TRACK",
@ -132,7 +132,7 @@ void rtw_odm_dbg_level_msg(void *sel, _adapter *adapter)
int i;
rtw_hal_get_def_var(adapter, HW_DEF_ODM_DBG_LEVEL, &dbg_level);
DBG_871X_SEL_NL(sel, "odm.DebugDebugLevel = %u\n", dbg_level);
DBG_871X_SEL_NL(sel, "odm.DebugLevel = %u\n", dbg_level);
for (i=0;i<RTW_ODM_DBG_LEVEL_NUM;i++) {
if (odm_dbg_level_str[i])
DBG_871X_SEL_NL(sel, "%u %s\n", i, odm_dbg_level_str[i]);
@ -166,11 +166,102 @@ inline void rtw_odm_ability_set(_adapter *adapter, u32 ability)
rtw_hal_set_hwreg(adapter, HW_VAR_DM_FLAG, (u8*)&ability);
}
void rtw_odm_adaptivity_ver_msg(void *sel, _adapter *adapter)
{
DBG_871X_SEL_NL(sel, "ADAPTIVITY_VERSION "ADAPTIVITY_VERSION"\n");
}
#define RTW_ADAPTIVITY_EN_DISABLE 0
#define RTW_ADAPTIVITY_EN_ENABLE 1
#define RTW_ADAPTIVITY_EN_AUTO 2
void rtw_odm_adaptivity_en_msg(void *sel, _adapter *adapter)
{
struct registry_priv *regsty = &adapter->registrypriv;
struct mlme_priv *mlme = &adapter->mlmepriv;
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
DM_ODM_T *odm = &hal_data->odmpriv;
DBG_871X_SEL_NL(sel, "RTW_ADAPTIVITY_EN_");
if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_DISABLE) {
DBG_871X_SEL(sel, "DISABLE\n");
} else if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_ENABLE) {
DBG_871X_SEL(sel, "ENABLE\n");
} else if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_AUTO) {
DBG_871X_SEL(sel, "AUTO, chplan:0x%02x, Regulation:%u,%u\n"
, mlme->ChannelPlan, odm->odm_Regulation2_4G, odm->odm_Regulation5G);
} else {
DBG_871X_SEL(sel, "INVALID\n");
}
}
#define RTW_ADAPTIVITY_MODE_NORMAL 0
#define RTW_ADAPTIVITY_MODE_CARRIER_SENSE 1
void rtw_odm_adaptivity_mode_msg(void *sel, _adapter *adapter)
{
struct registry_priv *regsty = &adapter->registrypriv;
DBG_871X_SEL_NL(sel, "RTW_ADAPTIVITY_MODE_");
if (regsty->adaptivity_mode == RTW_ADAPTIVITY_MODE_NORMAL) {
DBG_871X_SEL(sel, "NORMAL\n");
} else if (regsty->adaptivity_mode == RTW_ADAPTIVITY_MODE_CARRIER_SENSE) {
DBG_871X_SEL(sel, "CARRIER_SENSE\n");
} else {
DBG_871X_SEL(sel, "INVALID\n");
}
}
#define RTW_NHM_EN_DISABLE 0
#define RTW_NHM_EN_ENABLE 1
void rtw_odm_nhm_en_msg(void *sel, _adapter *adapter)
{
struct registry_priv *regsty = &adapter->registrypriv;
DBG_871X_SEL_NL(sel, "RTW_NHM_EN_");
if (regsty->nhm_en == RTW_NHM_EN_DISABLE) {
DBG_871X_SEL(sel, "DISABLE\n");
} else if (regsty->nhm_en == RTW_NHM_EN_ENABLE) {
DBG_871X_SEL(sel, "ENABLE\n");
} else {
DBG_871X_SEL(sel, "INVALID\n");
}
}
bool rtw_odm_adaptivity_needed(_adapter *adapter)
{
struct registry_priv *regsty = &adapter->registrypriv;
struct mlme_priv *mlme = &adapter->mlmepriv;
bool ret = _FALSE;
if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_ENABLE
|| regsty->adaptivity_en == RTW_ADAPTIVITY_EN_AUTO)
ret = _TRUE;
if (ret == _TRUE) {
rtw_odm_adaptivity_ver_msg(RTW_DBGDUMP, adapter);
rtw_odm_adaptivity_en_msg(RTW_DBGDUMP, adapter);
rtw_odm_adaptivity_mode_msg(RTW_DBGDUMP, adapter);
rtw_odm_nhm_en_msg(RTW_DBGDUMP, adapter);
}
return ret;
}
void rtw_odm_adaptivity_parm_msg(void *sel, _adapter *adapter)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter);
DM_ODM_T *odm = &pHalData->odmpriv;
rtw_odm_adaptivity_ver_msg(sel, adapter);
rtw_odm_adaptivity_en_msg(sel, adapter);
rtw_odm_adaptivity_mode_msg(sel, adapter);
rtw_odm_nhm_en_msg(sel, adapter);
DBG_871X_SEL_NL(sel, "%10s %16s %8s %10s %11s %14s\n"
, "TH_L2H_ini", "TH_EDCCA_HL_diff", "IGI_Base", "ForceEDCCA", "AdapEn_RSSI", "IGI_LowerBound");
DBG_871X_SEL_NL(sel, "0x%-8x %-16d 0x%-6x %-10d %-11u %-14u\n"
@ -181,6 +272,14 @@ void rtw_odm_adaptivity_parm_msg(void *sel, _adapter *adapter)
, odm->AdapEn_RSSI
, odm->IGI_LowerBound
);
DBG_871X_SEL_NL(sel, "%8s %9s\n", "EDCCA_ES","Adap_Flag");
DBG_871X_SEL_NL(sel, "%-8x %-9x \n"
, odm->EDCCA_enable_state
, odm->adaptivity_flag
);
}
void rtw_odm_adaptivity_parm_set(_adapter *adapter, s8 TH_L2H_ini, s8 TH_EDCCA_HL_diff,
@ -204,4 +303,36 @@ void rtw_odm_get_perpkt_rssi(void *sel, _adapter *adapter)
DBG_871X_SEL_NL(sel,"RxRate = %s, RSSI_A = %d(%%), RSSI_B = %d(%%)\n",
HDATA_RATE(odm->RxRate), odm->RSSI_A, odm->RSSI_B);
}
}
void rtw_odm_acquirespinlock(_adapter *adapter, RT_SPINLOCK_TYPE type)
{
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
_irqL irqL;
switch(type)
{
case RT_IQK_SPINLOCK:
_enter_critical_bh(&pdmpriv->IQKSpinLock, &irqL);
default:
break;
}
}
void rtw_odm_releasespinlock(_adapter *adapter, RT_SPINLOCK_TYPE type)
{
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
_irqL irqL;
switch(type)
{
case RT_IQK_SPINLOCK:
_exit_critical_bh(&pdmpriv->IQKSpinLock, &irqL);
default:
break;
}
}

42
core/rtw_p2p.c
View File

@ -58,6 +58,11 @@ static u32 go_add_group_info_attr(struct wifidirect_info *pwdinfo, u8 *pbuf)
pdata_attr = rtw_zmalloc(MAX_P2P_IE_LEN);
if(NULL == pdata_attr){
DBG_871X("%s pdata_attr malloc failed \n", __FUNCTION__);
goto _exit;
}
pstart = pdata_attr;
pcur = pdata_attr;
@ -139,7 +144,8 @@ static u32 go_add_group_info_attr(struct wifidirect_info *pwdinfo, u8 *pbuf)
}
rtw_mfree(pdata_attr, MAX_P2P_IE_LEN);
_exit:
return len;
}
@ -3455,6 +3461,8 @@ _func_exit_;
void p2p_concurrent_handler( _adapter* padapter )
{
struct wifidirect_info *pwdinfo = &padapter->wdinfo;
struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv);
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
//_adapter *pbuddy_adapter = padapter->pbuddy_adapter;
//struct wifidirect_info *pbuddy_wdinfo = &pbuddy_adapter->wdinfo;
//struct mlme_priv *pbuddy_mlmepriv = &pbuddy_adapter->mlmepriv;
@ -3495,9 +3503,12 @@ _func_enter_;
}
rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN);
val8 = 1;
rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8));
if(!check_buddy_mlmeinfo_state(padapter, WIFI_FW_AP_STATE) &&
!(pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)
{
val8 = 1;
rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8));
}
// Todo: To check the value of pwdinfo->ext_listen_period is equal to 0 or not.
_set_timer( &pwdinfo->ap_p2p_switch_timer, pwdinfo->ext_listen_period );
}
@ -3517,8 +3528,11 @@ _func_enter_;
if ( pbuddy_mlmeext->cur_channel != pwdinfo->listen_channel )
{
set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode);
val8 = 0;
padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8));
if(!check_buddy_mlmeinfo_state(padapter, WIFI_FW_AP_STATE) &&!(pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)
{
val8 = 0;
padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8));
}
rtw_p2p_set_state(pwdinfo, P2P_STATE_IDLE);
issue_nulldata(pbuddy_adapter, NULL, 0, 3, 500);
}
@ -3612,6 +3626,9 @@ _func_enter_;
pcfg80211_wdinfo->is_ro_ch = _FALSE;
pcfg80211_wdinfo->last_ro_ch_time = rtw_get_current_time();
if (pcfg80211_wdinfo->not_indic_ro_ch_exp == _TRUE)
return;
DBG_871X("cfg80211_remain_on_channel_expired, ch=%d, bw=%d, offset=%d\n",
rtw_get_oper_ch(padapter), rtw_get_oper_bw(padapter), rtw_get_oper_choffset(padapter));
@ -5277,10 +5294,6 @@ int rtw_p2p_enable(_adapter *padapter, enum P2P_ROLE role)
adapter_wdev_data(padapter)->p2p_enabled = _FALSE;
#endif //CONFIG_IOCTL_CFG80211
if (_FAIL == rtw_pwr_wakeup(padapter)) {
ret = _FAIL;
goto exit;
}
//Disable P2P function
if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE))
@ -5299,6 +5312,10 @@ int rtw_p2p_enable(_adapter *padapter, enum P2P_ROLE role)
rtw_p2p_set_pre_state(pwdinfo, P2P_STATE_NONE);
rtw_p2p_set_role(pwdinfo, P2P_ROLE_DISABLE);
_rtw_memset(&pwdinfo->rx_prov_disc_info, 0x00, sizeof(struct rx_provdisc_req_info));
/* Remove profiles in wifidirect_info structure. */
_rtw_memset( &pwdinfo->profileinfo[ 0 ], 0x00, sizeof( struct profile_info ) * P2P_MAX_PERSISTENT_GROUP_NUM );
pwdinfo->profileindex = 0;
}
rtw_hal_set_odm_var(padapter,HAL_ODM_P2P_STATE,NULL,_FALSE);
@ -5306,6 +5323,11 @@ int rtw_p2p_enable(_adapter *padapter, enum P2P_ROLE role)
rtw_hal_set_odm_var(padapter,HAL_ODM_WIFI_DISPLAY_STATE,NULL,_FALSE);
#endif
if (_FAIL == rtw_pwr_wakeup(padapter)) {
ret = _FAIL;
goto exit;
}
//Restore to initial setting.
update_tx_basic_rate(padapter, padapter->registrypriv.wireless_mode);

25
core/rtw_pwrctrl.c
View File

@ -20,6 +20,7 @@
#define _RTW_PWRCTRL_C_
#include <drv_types.h>
#include <hal_data.h>
int rtw_fw_ps_state(PADAPTER padapter)
@ -159,6 +160,9 @@ int ips_leave(_adapter * padapter)
#endif //DBG_CHECK_FW_PS_STATE
_exit_pwrlock(&pwrpriv->lock);
if (_SUCCESS == ret)
ODM_DMReset(&GET_HAL_DATA(padapter)->odmpriv);
#ifdef CONFIG_BT_COEXIST
if (_SUCCESS == ret)
rtw_btcoex_IpsNotify(padapter, IPS_NONE);
@ -604,7 +608,7 @@ _func_enter_;
// polling cpwm
do {
rtw_mdelay_os(1);
rtw_msleep_os(1);
poll_cnt++;
rtw_hal_get_hwreg(padapter, HW_VAR_CPWM, &cpwm_now);
if ((cpwm_orig ^ cpwm_now) & 0x80)
@ -1116,7 +1120,7 @@ _func_enter_;
)
{ //connect
if(pwrpriv->power_mgnt == PS_MODE_ACTIVE) {
if(pwrpriv->pwr_mode == PS_MODE_ACTIVE) {
DBG_871X("%s: Driver Already Leave LPS\n",__FUNCTION__);
return;
}
@ -1201,7 +1205,7 @@ _func_enter_;
else
#endif
{
#if defined(CONFIG_FWLPS_IN_IPS) || defined(CONFIG_SWLPS_IN_IPS) || (defined(CONFIG_PLATFORM_SPRD) && defined(CONFIG_RTL8188E))
#if defined(CONFIG_FWLPS_IN_IPS) || defined(CONFIG_SWLPS_IN_IPS) || defined(CONFIG_RTL8188E)
#ifdef CONFIG_IPS
if(_FALSE == ips_leave(pri_padapter))
{
@ -1209,8 +1213,8 @@ _func_enter_;
}
#endif
#endif //CONFIG_SWLPS_IN_IPS || (CONFIG_PLATFORM_SPRD && CONFIG_RTL8188E)
}
}
}
}
}
_func_exit_;
@ -2146,6 +2150,9 @@ _func_enter_;
rtw_init_timer(&pwrctrlpriv->pwr_state_check_timer, padapter, pwr_state_check_handler);
pwrctrlpriv->wowlan_mode = _FALSE;
pwrctrlpriv->wowlan_ap_mode = _FALSE;
#ifdef CONFIG_RESUME_IN_WORKQUEUE
_init_workitem(&pwrctrlpriv->resume_work, resume_workitem_callback, NULL);
pwrctrlpriv->rtw_workqueue = create_singlethread_workqueue("rtw_workqueue");
@ -2157,9 +2164,11 @@ _func_enter_;
#endif //CONFIG_HAS_EARLYSUSPEND || CONFIG_ANDROID_POWER
#ifdef CONFIG_PNO_SUPPORT
pwrctrlpriv->pno_inited = _FALSE;
pwrctrlpriv->pnlo_info = NULL;
pwrctrlpriv->pscan_info = NULL;
pwrctrlpriv->pno_ssid_list = NULL;
pwrctrlpriv->pno_in_resume = _TRUE;
#endif
_func_exit_;
@ -2221,12 +2230,16 @@ static void resume_workitem_callback(struct work_struct *work)
DBG_871X("%s\n",__FUNCTION__);
rtw_resume_process(adapter);
rtw_resume_unlock_suspend();
}
void rtw_resume_in_workqueue(struct pwrctrl_priv *pwrpriv)
{
// accquire system's suspend lock preventing from falliing asleep while resume in workqueue
rtw_lock_suspend();
//rtw_lock_suspend();
rtw_resume_lock_suspend();
#if 1
queue_work(pwrpriv->rtw_workqueue, &pwrpriv->resume_work);

411
core/rtw_recv.c
View File

File diff suppressed because it is too large Load Diff

85
core/rtw_security.c
View File

@ -44,6 +44,63 @@ const char *security_type_str(u8 value)
return NULL;
}
#ifdef DBG_SW_SEC_CNT
#define WEP_SW_ENC_CNT_INC(sec, ra) \
if (is_broadcast_mac_addr(ra)) \
sec->wep_sw_enc_cnt_bc++; \
else if (is_multicast_mac_addr(ra)) \
sec->wep_sw_enc_cnt_mc++; \
else \
sec->wep_sw_enc_cnt_uc++;
#define WEP_SW_DEC_CNT_INC(sec, ra) \
if (is_broadcast_mac_addr(ra)) \
sec->wep_sw_dec_cnt_bc++; \
else if (is_multicast_mac_addr(ra)) \
sec->wep_sw_dec_cnt_mc++; \
else \
sec->wep_sw_dec_cnt_uc++;
#define TKIP_SW_ENC_CNT_INC(sec, ra) \
if (is_broadcast_mac_addr(ra)) \
sec->tkip_sw_enc_cnt_bc++; \
else if (is_multicast_mac_addr(ra)) \
sec->tkip_sw_enc_cnt_mc++; \
else \
sec->tkip_sw_enc_cnt_uc++;
#define TKIP_SW_DEC_CNT_INC(sec, ra) \
if (is_broadcast_mac_addr(ra)) \
sec->tkip_sw_dec_cnt_bc++; \
else if (is_multicast_mac_addr(ra)) \
sec->tkip_sw_dec_cnt_mc++; \
else \
sec->tkip_sw_dec_cnt_uc++;
#define AES_SW_ENC_CNT_INC(sec, ra) \
if (is_broadcast_mac_addr(ra)) \
sec->aes_sw_enc_cnt_bc++; \
else if (is_multicast_mac_addr(ra)) \
sec->aes_sw_enc_cnt_mc++; \
else \
sec->aes_sw_enc_cnt_uc++;
#define AES_SW_DEC_CNT_INC(sec, ra) \
if (is_broadcast_mac_addr(ra)) \
sec->aes_sw_dec_cnt_bc++; \
else if (is_multicast_mac_addr(ra)) \
sec->aes_sw_dec_cnt_mc++; \
else \
sec->aes_sw_dec_cnt_uc++;
#else
#define WEP_SW_ENC_CNT_INC(sec, ra)
#define WEP_SW_DEC_CNT_INC(sec, ra)
#define TKIP_SW_ENC_CNT_INC(sec, ra)
#define TKIP_SW_DEC_CNT_INC(sec, ra)
#define AES_SW_ENC_CNT_INC(sec, ra)
#define AES_SW_DEC_CNT_INC(sec, ra)
#endif /* DBG_SW_SEC_CNT */
//=====WEP related=====
#define CRC32_POLY 0x04c11db7
@ -251,7 +308,8 @@ _func_enter_;
}
}
WEP_SW_ENC_CNT_INC(psecuritypriv, pattrib->ra);
}
_func_exit_;
@ -299,8 +357,9 @@ _func_enter_;
{
RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_wep_decrypt:icv error crc[3](%x)!=payload[length-1](%x) || crc[2](%x)!=payload[length-2](%x) || crc[1](%x)!=payload[length-3](%x) || crc[0](%x)!=payload[length-4](%x)\n",
crc[3],payload[length-1],crc[2],payload[length-2],crc[1],payload[length-3],crc[0],payload[length-4]));
}
}
WEP_SW_DEC_CNT_INC(psecuritypriv, prxattrib->ra);
}
_func_exit_;
@ -775,7 +834,7 @@ _func_enter_;
}
}
TKIP_SW_ENC_CNT_INC(psecuritypriv,pattrib->ra);
}
/*
else{
@ -867,7 +926,6 @@ _func_enter_;
}
else
{
RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_tkip_decrypt: stainfo!=NULL!!!\n"));
prwskey=&stainfo->dot118021x_UncstKey.skey[0];
prwskeylen=16;
}
@ -897,8 +955,8 @@ _func_enter_;
crc[3],payload[length-1],crc[2],payload[length-2],crc[1],payload[length-3],crc[0],payload[length-4]));
res=_FAIL;
}
TKIP_SW_DEC_CNT_INC(psecuritypriv, prxattrib->ra);
}
else{
RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_tkip_decrypt: stainfo==NULL!!!\n"));
@ -1706,7 +1764,7 @@ _func_enter_;
}
}
AES_SW_ENC_CNT_INC(psecuritypriv, pattrib->ra);
}
/*
else{
@ -1714,7 +1772,7 @@ _func_enter_;
DBG_871X("%s, psta==NUL\n", __func__);
res=_FAIL;
}
*/
*/
}
@ -2031,7 +2089,6 @@ _func_enter_;
static u32 no_gkey_bc_cnt = 0;
static u32 no_gkey_mc_cnt = 0;
//in concurrent we should use sw descrypt in group key, so we remove this message
//DBG_871X("rx bc/mc packets, to perform sw rtw_aes_decrypt\n");
//prwskey = psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey;
if(psecuritypriv->binstallGrpkey==_FALSE)
@ -2107,10 +2164,10 @@ _func_enter_;
res= aes_decipher(prwskey,prxattrib->hdrlen,pframe, length);
AES_SW_DEC_CNT_INC(psecuritypriv, prxattrib->ra);
}
else{
RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_aes_encrypt: stainfo==NULL!!!\n"));
RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_aes_decrypt: stainfo==NULL!!!\n"));
res=_FAIL;
}
@ -3141,9 +3198,9 @@ void rtw_sec_restore_wep_key(_adapter *adapter)
for(keyid=0;keyid<4;keyid++){
if(securitypriv->key_mask & BIT(keyid)){
if(keyid == securitypriv->dot11PrivacyKeyIndex)
rtw_set_key(adapter,securitypriv, keyid, 1, _TRUE);
rtw_set_key(adapter,securitypriv, keyid, 1, _FALSE);
else
rtw_set_key(adapter,securitypriv, keyid, 0, _TRUE);
rtw_set_key(adapter,securitypriv, keyid, 0, _FALSE);
}
}
}

8
core/rtw_sreset.c
View File

@ -162,7 +162,7 @@ void sreset_restore_security_station(_adapter *padapter)
else
{
//pairwise key
rtw_setstakey_cmd(padapter, (unsigned char *)psta, _TRUE,_FALSE);
rtw_setstakey_cmd(padapter, psta, _TRUE,_FALSE);
//group key
rtw_set_key(padapter,&padapter->securitypriv,padapter->securitypriv.dot118021XGrpKeyid, 0,_FALSE);
}
@ -331,10 +331,10 @@ void sreset_reset(_adapter *padapter)
psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS;
#ifdef CONFIG_POWER_SAVING
#ifdef CONFIG_LPS
rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0, "SRESET");
#endif
#endif//#ifdef CONFIG_LPS
_enter_pwrlock(&pwrpriv->lock);

46
core/rtw_sta_mgt.c
View File

@ -456,13 +456,19 @@ u32 rtw_free_stainfo(_adapter *padapter , struct sta_info *psta)
struct xmit_priv *pxmitpriv= &padapter->xmitpriv;
struct sta_priv *pstapriv = &padapter->stapriv;
struct hw_xmit *phwxmit;
int pending_qcnt[4];
_func_enter_;
if (psta == NULL)
goto exit;
_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL0);
rtw_list_delete(&psta->hash_list);
RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_err_,("\n free number_%d stainfo with hwaddr = 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x \n",pstapriv->asoc_sta_count , psta->hwaddr[0], psta->hwaddr[1], psta->hwaddr[2],psta->hwaddr[3],psta->hwaddr[4],psta->hwaddr[5]));
pstapriv->asoc_sta_count --;
_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL0);
_enter_critical_bh(&psta->lock, &irqL0);
psta->state &= ~_FW_LINKED;
@ -488,6 +494,7 @@ _func_enter_;
rtw_list_delete(&(pstaxmitpriv->vo_q.tx_pending));
phwxmit = pxmitpriv->hwxmits;
phwxmit->accnt -= pstaxmitpriv->vo_q.qcnt;
pending_qcnt[0] = pstaxmitpriv->vo_q.qcnt;
pstaxmitpriv->vo_q.qcnt = 0;
//_exit_critical_bh(&(pxmitpriv->vo_pending.lock), &irqL0);
@ -497,6 +504,7 @@ _func_enter_;
rtw_list_delete(&(pstaxmitpriv->vi_q.tx_pending));
phwxmit = pxmitpriv->hwxmits+1;
phwxmit->accnt -= pstaxmitpriv->vi_q.qcnt;
pending_qcnt[1] = pstaxmitpriv->vi_q.qcnt;
pstaxmitpriv->vi_q.qcnt = 0;
//_exit_critical_bh(&(pxmitpriv->vi_pending.lock), &irqL0);
@ -506,6 +514,7 @@ _func_enter_;
rtw_list_delete(&(pstaxmitpriv->be_q.tx_pending));
phwxmit = pxmitpriv->hwxmits+2;
phwxmit->accnt -= pstaxmitpriv->be_q.qcnt;
pending_qcnt[2] = pstaxmitpriv->be_q.qcnt;
pstaxmitpriv->be_q.qcnt = 0;
//_exit_critical_bh(&(pxmitpriv->be_pending.lock), &irqL0);
@ -515,15 +524,14 @@ _func_enter_;
rtw_list_delete(&(pstaxmitpriv->bk_q.tx_pending));
phwxmit = pxmitpriv->hwxmits+3;
phwxmit->accnt -= pstaxmitpriv->bk_q.qcnt;
pending_qcnt[3] = pstaxmitpriv->bk_q.qcnt;
pstaxmitpriv->bk_q.qcnt = 0;
//_exit_critical_bh(&(pxmitpriv->bk_pending.lock), &irqL0);
rtw_os_wake_queue_at_free_stainfo(padapter, pending_qcnt);
_exit_critical_bh(&pxmitpriv->lock, &irqL0);
rtw_list_delete(&psta->hash_list);
RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_err_,("\n free number_%d stainfo with hwaddr = 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x \n",pstapriv->asoc_sta_count , psta->hwaddr[0], psta->hwaddr[1], psta->hwaddr[2],psta->hwaddr[3],psta->hwaddr[4],psta->hwaddr[5]));
pstapriv->asoc_sta_count --;
// re-init sta_info; 20061114 // will be init in alloc_stainfo
//_rtw_init_sta_xmit_priv(&psta->sta_xmitpriv);
@ -631,7 +639,9 @@ _func_enter_;
_rtw_spinlock_free(&psta->lock);
//_enter_critical_bh(&(pfree_sta_queue->lock), &irqL0);
_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL0);
rtw_list_insert_tail(&psta->list, get_list_head(pfree_sta_queue));
_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL0);
//_exit_critical_bh(&(pfree_sta_queue->lock), &irqL0);
exit:
@ -651,6 +661,9 @@ void rtw_free_all_stainfo(_adapter *padapter)
struct sta_info *psta = NULL;
struct sta_priv *pstapriv = &padapter->stapriv;
struct sta_info* pbcmc_stainfo =rtw_get_bcmc_stainfo( padapter);
u8 free_sta_num = 0;
char free_sta_list[NUM_STA];
int stainfo_offset;
_func_enter_;
@ -670,13 +683,27 @@ _func_enter_;
plist = get_next(plist);
if(pbcmc_stainfo!=psta)
rtw_free_stainfo(padapter , psta);
if(pbcmc_stainfo!=psta)
{
rtw_list_delete(&psta->hash_list);
//rtw_free_stainfo(padapter , psta);
stainfo_offset = rtw_stainfo_offset(pstapriv, psta);
if (stainfo_offset_valid(stainfo_offset)) {
free_sta_list[free_sta_num++] = stainfo_offset;
}
}
}
}
_exit_critical_bh(&pstapriv->sta_hash_lock, &irqL);
for (index = 0; index < free_sta_num; index++)
{
psta = rtw_get_stainfo_by_offset(pstapriv, free_sta_list[index]);
rtw_free_stainfo(padapter , psta);
}
exit:
@ -762,9 +789,6 @@ _func_enter_;
goto exit;
}
// default broadcast & multicast use macid 1
psta->mac_id = 1;
ptxservq= &(psta->sta_xmitpriv.be_q);
/*

6
core/rtw_tdls.c
View File

@ -22,8 +22,6 @@
#include <drv_types.h>
#ifdef CONFIG_TDLS
extern unsigned char MCS_rate_2R[16];
extern unsigned char MCS_rate_1R[16];
extern void process_wmmps_data(_adapter *padapter, union recv_frame *precv_frame);
void rtw_reset_tdls_info(_adapter* padapter)
@ -210,7 +208,7 @@ void free_tdls_sta(_adapter *padapter, struct sta_info *ptdls_sta)
}
//clear cam
rtw_clearstakey_cmd(padapter, (u8 *)ptdls_sta, (u8)rtw_get_camid(ptdls_sta->mac_id), _TRUE);
rtw_clearstakey_cmd(padapter, ptdls_sta, _TRUE);
if(ptdlsinfo->sta_cnt==0){
rtw_tdls_cmd(padapter, myid(&(padapter->eeprompriv)), TDLS_RS_RCR);
@ -230,7 +228,7 @@ void rtw_tdls_set_key(_adapter *padapter, struct rx_pkt_attrib *prx_pkt_attrib,
if(prx_pkt_attrib->encrypt)
{
ptdls_sta->dot118021XPrivacy=_AES_;
rtw_setstakey_cmd(padapter, (u8*)ptdls_sta, _TRUE, _TRUE);
rtw_setstakey_cmd(padapter, ptdls_sta, _TRUE, _TRUE);
}
}

5
core/rtw_vht.c
View File

@ -281,8 +281,9 @@ void update_sta_vht_info_apmode(_adapter *padapter, PVOID sta)
}
bw_mode = GET_VHT_OPERATING_MODE_FIELD_CHNL_WIDTH(&pvhtpriv_sta->vht_op_mode_notify);
if (bw_mode > psta->bw_mode)
psta->bw_mode = bw_mode;
//if (bw_mode > psta->bw_mode)
psta->bw_mode = bw_mode;
// B4 Rx LDPC
if (TEST_FLAG(pvhtpriv_ap->ldpc_cap, LDPC_VHT_ENABLE_TX) &&

976
core/rtw_wlan_util.c
View File

File diff suppressed because it is too large Load Diff

347
core/rtw_xmit.c
View File

File diff suppressed because it is too large Load Diff

2
hal/HalPwrSeqCmd.c
View File

@ -147,7 +147,7 @@ u8 HalPwrSeqCmdParsing(
rtw_udelay_os(10);
if (pollingCount++ > maxPollingCnt) {
DBG_871X("Fail to polling Offset[%#x]=%02x\n", offset, value);
DBG_871X_LEVEL(_drv_always_, "HalPwrSeqCmdParsing: Fail to polling Offset[%#x]=%02x\n", offset, value);
return _FALSE;
}
} while (!bPollingBit);

14
hal/OUTSRC-BTCoexist/HalBtc8188c2Ant.c
View File

@ -1723,6 +1723,13 @@ halbtc8188c2ant_ActionPanA2dp(
//============================================================
// extern function start with EXhalbtc8188c2ant_
//============================================================
VOID
EXhalbtc8188c2ant_PowerOnSetting(
IN PBTC_COEXIST pBtCoexist
)
{
}
VOID
EXhalbtc8188c2ant_InitHwConfig(
IN PBTC_COEXIST pBtCoexist,
@ -1776,13 +1783,6 @@ EXhalbtc8188c2ant_DisplayCoexInfo(
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============");
CL_PRINTF(cliBuf);
if(!pBoardInfo->bBtExist)
{
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n BT not exists !!!");
CL_PRINTF(cliBuf);
return;
}
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \
pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum);
CL_PRINTF(cliBuf);

4
hal/OUTSRC-BTCoexist/HalBtc8188c2Ant.h
View File

@ -87,6 +87,10 @@ typedef struct _COEX_STA_8188C_2ANT{
// The following is interface which will notify coex module.
//===========================================
VOID
EXhalbtc8188c2ant_PowerOnSetting(
IN PBTC_COEXIST pBtCoexist
);
VOID
EXhalbtc8188c2ant_InitHwConfig(
IN PBTC_COEXIST pBtCoexist,
IN BOOLEAN bWifiOnly

14
hal/OUTSRC-BTCoexist/HalBtc8192d2Ant.c
View File

@ -1712,6 +1712,13 @@ halbtc8192d2ant_IsBtCoexistEnter(
//============================================================
// extern function start with EXhalbtc8192d2ant_
//============================================================
VOID
EXhalbtc8192d2ant_PowerOnSetting(
IN PBTC_COEXIST pBtCoexist
)
{
}
VOID
EXhalbtc8192d2ant_InitHwConfig(
IN PBTC_COEXIST pBtCoexist,
@ -1782,13 +1789,6 @@ EXhalbtc8192d2ant_DisplayCoexInfo(
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============");
CL_PRINTF(cliBuf);
if(!pBoardInfo->bBtExist)
{
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n BT not exists !!!");
CL_PRINTF(cliBuf);
return;
}
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \
pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum);
CL_PRINTF(cliBuf);

4
hal/OUTSRC-BTCoexist/HalBtc8192d2Ant.h
View File

@ -108,6 +108,10 @@ typedef struct _COEX_STA_8192D_2ANT{
// The following is interface which will notify coex module.
//===========================================
VOID
EXhalbtc8192d2ant_PowerOnSetting(
IN PBTC_COEXIST pBtCoexist
);
VOID
EXhalbtc8192d2ant_InitHwConfig(
IN PBTC_COEXIST pBtCoexist,
IN BOOLEAN bWifiOnly

14
hal/OUTSRC-BTCoexist/HalBtc8192e1Ant.c
View File

@ -2436,6 +2436,13 @@ halbtc8192e1ant_InitCoexDm(
//============================================================
// extern function start with EXhalbtc8192e1ant_
//============================================================
VOID
EXhalbtc8192e1ant_PowerOnSetting(
IN PBTC_COEXIST pBtCoexist
)
{
}
VOID
EXhalbtc8192e1ant_InitHwConfig(
IN PBTC_COEXIST pBtCoexist,
@ -2537,13 +2544,6 @@ EXhalbtc8192e1ant_DisplayCoexInfo(
CL_PRINTF(cliBuf);
}
if(!pBoardInfo->bBtExist)
{
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n BT not exists !!!");
CL_PRINTF(cliBuf);
return;
}
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \
pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum);
CL_PRINTF(cliBuf);

4
hal/OUTSRC-BTCoexist/HalBtc8192e1Ant.h
View File

@ -140,6 +140,10 @@ typedef struct _COEX_STA_8192E_1ANT{
// The following is interface which will notify coex module.
//===========================================
VOID
EXhalbtc8192e1ant_PowerOnSetting(
IN PBTC_COEXIST pBtCoexist
);
VOID
EXhalbtc8192e1ant_InitHwConfig(
IN PBTC_COEXIST pBtCoexist,
IN BOOLEAN bWifiOnly

20
hal/OUTSRC-BTCoexist/HalBtc8192e2Ant.c
View File

@ -1697,7 +1697,8 @@ halbtc8192e2ant_SetSwitchSsType(
pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xd04, 0x1);
pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x90c, 0x81111111);
// switch cck patch
pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xe77, 0x4, 0x1);
//Jenyu suggest to remove 0xe77 this line for tx issue
//pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xe77, 0x4, 0x1);
//pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xa07, 0x81);
mimoPs=BTC_MIMO_PS_STATIC;
}
@ -1707,7 +1708,8 @@ halbtc8192e2ant_SetSwitchSsType(
pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xc04, 0x33);
pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xd04, 0x3);
pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x90c, 0x81121313);
pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xe77, 0x4, 0x0);
//Jenyu suggest to remove 0xe77 this line for tx issue
//pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xe77, 0x4, 0x0);
//pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xa07, 0x41);
mimoPs=BTC_MIMO_PS_DYNAMIC;
}
@ -3790,6 +3792,13 @@ halbtc8192e2ant_InitHwConfig(
//============================================================
// extern function start with EXhalbtc8192e2ant_
//============================================================
VOID
EXhalbtc8192e2ant_PowerOnSetting(
IN PBTC_COEXIST pBtCoexist
)
{
}
VOID
EXhalbtc8192e2ant_InitHwConfig(
IN PBTC_COEXIST pBtCoexist,
@ -3838,13 +3847,6 @@ EXhalbtc8192e2ant_DisplayCoexInfo(
CL_PRINTF(cliBuf);
}
if(!pBoardInfo->bBtExist)
{
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n BT not exists !!!");
CL_PRINTF(cliBuf);
return;
}
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \
pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum);
CL_PRINTF(cliBuf);

4
hal/OUTSRC-BTCoexist/HalBtc8192e2Ant.h
View File

@ -143,6 +143,10 @@ typedef struct _COEX_STA_8192E_2ANT{
// The following is interface which will notify coex module.
//===========================================
VOID
EXhalbtc8192e2ant_PowerOnSetting(
IN PBTC_COEXIST pBtCoexist
);
VOID
EXhalbtc8192e2ant_InitHwConfig(
IN PBTC_COEXIST pBtCoexist,
IN BOOLEAN bWifiOnly

7
hal/OUTSRC-BTCoexist/HalBtc8723a1Ant.c
View File

@ -1077,13 +1077,6 @@ EXhalbtc8723a1ant_DisplayCoexInfo(
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============");
CL_PRINTF(cliBuf);
if(!pBoardInfo->bBtExist)
{
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n BT not exists !!!");
CL_PRINTF(cliBuf);
return;
}
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \
pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum);
CL_PRINTF(cliBuf);

14
hal/OUTSRC-BTCoexist/HalBtc8723a2Ant.c
View File

@ -3381,6 +3381,13 @@ wa_halbtc8723a2ant_MonitorC2h(
//============================================================
// extern function start with EXhalbtc8723a2ant_
//============================================================
VOID
EXhalbtc8723a2ant_PowerOnSetting(
IN PBTC_COEXIST pBtCoexist
)
{
}
VOID
EXhalbtc8723a2ant_InitHwConfig(
IN PBTC_COEXIST pBtCoexist,
@ -3431,13 +3438,6 @@ EXhalbtc8723a2ant_DisplayCoexInfo(
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============");
CL_PRINTF(cliBuf);
if(!pBoardInfo->bBtExist)
{
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n BT not exists !!!");
CL_PRINTF(cliBuf);
return;
}
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \
pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum);
CL_PRINTF(cliBuf);

4
hal/OUTSRC-BTCoexist/HalBtc8723a2Ant.h
View File

@ -116,6 +116,10 @@ typedef struct _COEX_STA_8723A_2ANT{
// The following is interface which will notify coex module.
//===========================================
VOID
EXhalbtc8723a2ant_PowerOnSetting(
IN PBTC_COEXIST pBtCoexist
);
VOID
EXhalbtc8723a2ant_InitHwConfig(
IN PBTC_COEXIST pBtCoexist,
IN BOOLEAN bWifiOnly

1210
hal/OUTSRC-BTCoexist/HalBtc8723b1Ant.c
View File

File diff suppressed because it is too large Load Diff

40
hal/OUTSRC-BTCoexist/HalBtc8723b1Ant.h
View File

@ -17,6 +17,8 @@
#define BTC_RSSI_COEX_THRESH_TOL_8723B_1ANT 2
#define BT_8723B_1ANT_WIFI_NOISY_THRESH 30 //max: 255
typedef enum _BT_INFO_SRC_8723B_1ANT{
BT_INFO_SRC_8723B_1ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8723B_1ANT_BT_RSP = 0x1,
@ -60,6 +62,9 @@ typedef enum _BT_8723B_1ANT_COEX_ALGO{
}BT_8723B_1ANT_COEX_ALGO,*PBT_8723B_1ANT_COEX_ALGO;
typedef struct _COEX_DM_8723B_1ANT{
// hw setting
u1Byte preAntPosType;
u1Byte curAntPosType;
// fw mechanism
BOOLEAN bCurIgnoreWlanAct;
BOOLEAN bPreIgnoreWlanAct;
@ -109,6 +114,7 @@ typedef struct _COEX_DM_8723B_1ANT{
u1Byte curRetryLimitType;
u1Byte preAmpduTimeType;
u1Byte curAmpduTimeType;
u4Byte nArpCnt;
u1Byte errorCondition;
} COEX_DM_8723B_1ANT, *PCOEX_DM_8723B_1ANT;
@ -122,13 +128,12 @@ typedef struct _COEX_STA_8723B_1ANT{
BOOLEAN bUnderLps;
BOOLEAN bUnderIps;
BOOLEAN bFinishInitHW;
u4Byte specialPktPeriodCnt;
u4Byte highPriorityTx;
u4Byte highPriorityRx;
u4Byte lowPriorityTx;
u4Byte lowPriorityRx;
u1Byte btRssi;
s1Byte btRssi;
BOOLEAN bBtTxRxMask;
u1Byte preBtRssiState;
u1Byte preWifiRssiState[4];
@ -140,12 +145,38 @@ typedef struct _COEX_STA_8723B_1ANT{
BOOLEAN bWiFiIsHighPriTask; //Add for win8.1 page out issue
u1Byte btRetryCnt;
u1Byte btInfoExt;
u4Byte popEventCnt;
u1Byte nScanAPNum;
u4Byte nCRCOK_CCK;
u4Byte nCRCOK_11g;
u4Byte nCRCOK_11n;
u4Byte nCRCOK_11nAgg;
u4Byte nCRCErr_CCK;
u4Byte nCRCErr_11g;
u4Byte nCRCErr_11n;
u4Byte nCRCErr_11nAgg;
BOOLEAN bCCKLock;
BOOLEAN bPreCCKLock;
u1Byte nCoexTableType;
BOOLEAN bForceLpsOn;
}COEX_STA_8723B_1ANT, *PCOEX_STA_8723B_1ANT;
//===========================================
// The following is interface which will notify coex module.
//===========================================
VOID
EXhalbtc8723b1ant_PowerOnSetting(
IN PBTC_COEXIST pBtCoexist
);
VOID
EXhalbtc8723b1ant_PreLoadFirmware(
IN PBTC_COEXIST pBtCoexist
);
VOID
EXhalbtc8723b1ant_InitHwConfig(
IN PBTC_COEXIST pBtCoexist,
IN BOOLEAN bWifiOnly
@ -191,6 +222,11 @@ EXhalbtc8723b1ant_BtInfoNotify(
IN u1Byte length
);
VOID
EXhalbtc8723b1ant_RfStatusNotify(
IN PBTC_COEXIST pBtCoexist,
IN u1Byte type
);
VOID
EXhalbtc8723b1ant_HaltNotify(
IN PBTC_COEXIST pBtCoexist
);

112
hal/OUTSRC-BTCoexist/HalBtc8723b2Ant.c
View File

@ -1377,7 +1377,7 @@ halbtc8723b2ant_SetAntPath(
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_EXT_SWITCH, &bPgExtSwitch);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); // [31:16]=fw ver, [15:0]=fw sub ver
if((fwVer<0xc0000) || bPgExtSwitch)
if((fwVer>0 && fwVer<0xc0000) || bPgExtSwitch)
bUseExtSwitch = TRUE;
if(bInitHwCfg)
@ -1388,9 +1388,17 @@ halbtc8723b2ant_SetAntPath(
pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x930, 0x77);
pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x1);
if(fwVer >= 0x180000)
{
/* Use H2C to set GNT_BT to LOW */
H2C_Parameter[0] = 0;
pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter);
}
else
{
pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x0);
}
pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0);
pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); //WiFi TRx Mask off
@ -1420,7 +1428,6 @@ halbtc8723b2ant_SetAntPath(
pBtCoexist->fBtcFillH2c(pBtCoexist, 0x65, 2, H2C_Parameter);
}
// ext switch setting
if(bUseExtSwitch)
{
@ -3516,20 +3523,27 @@ halbtc8723b2ant_WifiOffHwCfg(
)
{
BOOLEAN bIsInMpMode = FALSE;
PADAPTER padapter=pBtCoexist->Adapter;
u1Byte H2C_Parameter[2] ={0};
u4Byte fwVer=0;
// set wlan_act to low
pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4);
pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x780); //WiFi goto standby while GNT_BT 0-->1
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer);
if(fwVer >= 0x180000)
{
/* Use H2C to set GNT_BT to HIGH */
H2C_Parameter[0] = 1;
pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter);
}
else
{
pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18);
}
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_IS_IN_MP_MODE, &bIsInMpMode);
if (bIsInMpMode == FALSE)
if(!bIsInMpMode)
pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x0); //BT select s0/s1 is controlled by BT
else
pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x1); //BT select s0/s1 is controlled by WiFi
@ -3578,6 +3592,87 @@ halbtc8723b2ant_InitHwConfig(
//============================================================
// extern function start with EXhalbtc8723b2ant_
//============================================================
VOID
EXhalbtc8723b2ant_PowerOnSetting(
IN PBTC_COEXIST pBtCoexist
)
{
PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo;
u2Byte u2Tmp=0x0;
pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x67, 0x20);
// enable BB, REG_SYS_FUNC_EN such that we can write 0x948 correctly.
u2Tmp = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x2);
pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x2, u2Tmp|BIT0|BIT1);
pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0);
if(pBtCoexist->chipInterface == BTC_INTF_USB)
{
// fixed at S0 for USB interface
pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_AUX_PORT;
}
else
{
// for PCIE and SDIO interface, we check efuse 0xc3[6]
if(pBoardInfo->singleAntPath == 0)
{
// set to S1
pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT;
}
else if(pBoardInfo->singleAntPath == 1)
{
// set to S0
pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_AUX_PORT;
}
}
}
VOID
EXhalbtc8723b2ant_PreLoadFirmware(
IN PBTC_COEXIST pBtCoexist
)
{
PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo;
u1Byte u1Tmp=0x4; /* Set BIT2 by default since it's 2ant case */
//
// S0 or S1 setting and Local register setting(By the setting fw can get ant number, S0/S1, ... info)
// Local setting bit define
// BIT0: "0" for no antenna inverse; "1" for antenna inverse
// BIT1: "0" for internal switch; "1" for external switch
// BIT2: "0" for one antenna; "1" for two antenna
// NOTE: here default all internal switch and 1-antenna ==> BIT1=0 and BIT2=0
if(pBtCoexist->chipInterface == BTC_INTF_USB)
{
// fixed at S0 for USB interface
u1Tmp |= 0x1; // antenna inverse
pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0xfe08, u1Tmp);
}
else
{
// for PCIE and SDIO interface, we check efuse 0xc3[6]
if(pBoardInfo->singleAntPath == 0)
{
}
else if(pBoardInfo->singleAntPath == 1)
{
// set to S0
u1Tmp |= 0x1; // antenna inverse
}
if(pBtCoexist->chipInterface == BTC_INTF_PCI)
{
pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x384, u1Tmp);
}
else if(pBtCoexist->chipInterface == BTC_INTF_SDIO)
{
pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x60, u1Tmp);
}
}
}
VOID
EXhalbtc8723b2ant_InitHwConfig(
IN PBTC_COEXIST pBtCoexist,
@ -3627,13 +3722,6 @@ EXhalbtc8723b2ant_DisplayCoexInfo(
CL_PRINTF(cliBuf);
}
if(!pBoardInfo->bBtExist)
{
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n BT not exists !!!");
CL_PRINTF(cliBuf);
return;
}
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \
pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum);
CL_PRINTF(cliBuf);

8
hal/OUTSRC-BTCoexist/HalBtc8723b2Ant.h
View File

@ -129,6 +129,14 @@ typedef struct _COEX_STA_8723B_2ANT{
// The following is interface which will notify coex module.
//===========================================
VOID
EXhalbtc8723b2ant_PowerOnSetting(
IN PBTC_COEXIST pBtCoexist
);
VOID
EXhalbtc8723b2ant_PreLoadFirmware(
IN PBTC_COEXIST pBtCoexist
);
VOID
EXhalbtc8723b2ant_InitHwConfig(
IN PBTC_COEXIST pBtCoexist,
IN BOOLEAN bWifiOnly

14
hal/OUTSRC-BTCoexist/HalBtc8812a1Ant.c
View File

@ -2091,6 +2091,13 @@ halbtc8812a1ant_InitCoexDm(
//============================================================
// extern function start with EXhalbtc8812a1ant_
//============================================================
VOID
EXhalbtc8812a1ant_PowerOnSetting(
IN PBTC_COEXIST pBtCoexist
)
{
}
VOID
EXhalbtc8812a1ant_InitHwConfig(
IN PBTC_COEXIST pBtCoexist,
@ -2186,13 +2193,6 @@ EXhalbtc8812a1ant_DisplayCoexInfo(
CL_PRINTF(cliBuf);
}
if(!pBoardInfo->bBtExist)
{
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n BT not exists !!!");
CL_PRINTF(cliBuf);
return;
}
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \
pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum);
CL_PRINTF(cliBuf);

4
hal/OUTSRC-BTCoexist/HalBtc8812a1Ant.h
View File

@ -132,6 +132,10 @@ typedef struct _COEX_STA_8812A_1ANT{
// The following is interface which will notify coex module.
//===========================================
VOID
EXhalbtc8812a1ant_PowerOnSetting(
IN PBTC_COEXIST pBtCoexist
);
VOID
EXhalbtc8812a1ant_InitHwConfig(
IN PBTC_COEXIST pBtCoexist,
IN BOOLEAN bWifiOnly

14
hal/OUTSRC-BTCoexist/HalBtc8812a2Ant.c
View File

@ -4125,6 +4125,13 @@ halbtc8812a2ant_InitHwConfig(
//============================================================
// extern function start with EXhalbtc8812a2ant_
//============================================================
VOID
EXhalbtc8812a2ant_PowerOnSetting(
IN PBTC_COEXIST pBtCoexist
)
{
}
VOID
EXhalbtc8812a2ant_InitHwConfig(
IN PBTC_COEXIST pBtCoexist,
@ -4174,13 +4181,6 @@ EXhalbtc8812a2ant_DisplayCoexInfo(
CL_PRINTF(cliBuf);
}
if(!pBoardInfo->bBtExist)
{
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n BT not exists !!!");
CL_PRINTF(cliBuf);
return;
}
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \
pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum);
CL_PRINTF(cliBuf);

4
hal/OUTSRC-BTCoexist/HalBtc8812a2Ant.h
View File

@ -148,6 +148,10 @@ typedef struct _COEX_STA_8812A_2ANT{
// The following is interface which will notify coex module.
//===========================================
VOID
EXhalbtc8812a2ant_PowerOnSetting(
IN PBTC_COEXIST pBtCoexist
);
VOID
EXhalbtc8812a2ant_InitHwConfig(
IN PBTC_COEXIST pBtCoexist,
IN BOOLEAN bWifiOnly

632
hal/OUTSRC-BTCoexist/HalBtc8821a1Ant.c
View File

File diff suppressed because it is too large Load Diff

18
hal/OUTSRC-BTCoexist/HalBtc8821a1Ant.h
View File

@ -1,7 +1,7 @@
//===========================================
// The following is for 8821A 1ANT BT Co-exist definition
//===========================================
#define BT_AUTO_REPORT_ONLY_8821A_1ANT 0
#define BT_AUTO_REPORT_ONLY_8821A_1ANT 1
#define BT_INFO_8821A_1ANT_B_FTP BIT7
#define BT_INFO_8821A_1ANT_B_A2DP BIT6
@ -108,6 +108,7 @@ typedef struct _COEX_DM_8821A_1ANT{
u1Byte curRetryLimitType;
u1Byte preAmpduTimeType;
u1Byte curAmpduTimeType;
u4Byte nArpCnt;
u1Byte errorCondition;
} COEX_DM_8821A_1ANT, *PCOEX_DM_8821A_1ANT;
@ -127,12 +128,15 @@ typedef struct _COEX_STA_8821A_1ANT{
u4Byte lowPriorityTx;
u4Byte lowPriorityRx;
u1Byte btRssi;
BOOLEAN bBtTxRxMask;
u1Byte preBtRssiState;
u1Byte preWifiRssiState[4];
BOOLEAN bC2hBtInfoReqSent;
u1Byte btInfoC2h[BT_INFO_SRC_8821A_1ANT_MAX][10];
u4Byte btInfoC2hCnt[BT_INFO_SRC_8821A_1ANT_MAX];
BOOLEAN bC2hBtInquiryPage;
BOOLEAN bC2hBtPage; //Add for win8.1 page out issue
BOOLEAN bWiFiIsHighPriTask; //Add for win8.1 page out issue
u1Byte btRetryCnt;
u1Byte btInfoExt;
}COEX_STA_8821A_1ANT, *PCOEX_STA_8821A_1ANT;
@ -141,6 +145,10 @@ typedef struct _COEX_STA_8821A_1ANT{
// The following is interface which will notify coex module.
//===========================================
VOID
EXhalbtc8821a1ant_PowerOnSetting(
IN PBTC_COEXIST pBtCoexist
);
VOID
EXhalbtc8821a1ant_InitHwConfig(
IN PBTC_COEXIST pBtCoexist,
IN BOOLEAN bWifiOnly
@ -202,10 +210,4 @@ VOID
EXhalbtc8821a1ant_DisplayCoexInfo(
IN PBTC_COEXIST pBtCoexist
);
VOID
EXhalbtc8821a1ant_DbgControl(
IN PBTC_COEXIST pBtCoexist,
IN u1Byte opCode,
IN u1Byte opLen,
IN pu1Byte pData
);

14
hal/OUTSRC-BTCoexist/HalBtc8821a2Ant.c
View File

@ -3508,6 +3508,13 @@ halbtc8821a2ant_RunCoexistMechanism(
//============================================================
// extern function start with EXhalbtc8821a2ant_
//============================================================
VOID
EXhalbtc8821a2ant_PowerOnSetting(
IN PBTC_COEXIST pBtCoexist
)
{
}
VOID
EXhalbtc8821a2ant_InitHwConfig(
IN PBTC_COEXIST pBtCoexist,
@ -3575,13 +3582,6 @@ EXhalbtc8821a2ant_DisplayCoexInfo(
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============");
CL_PRINTF(cliBuf);
if(!pBoardInfo->bBtExist)
{
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n BT not exists !!!");
CL_PRINTF(cliBuf);
return;
}
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \
pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum);
CL_PRINTF(cliBuf);

4
hal/OUTSRC-BTCoexist/HalBtc8821a2Ant.h
View File

@ -118,6 +118,10 @@ typedef struct _COEX_STA_8821A_2ANT{
// The following is interface which will notify coex module.
//===========================================
VOID
EXhalbtc8821a2ant_PowerOnSetting(
IN PBTC_COEXIST pBtCoexist
);
VOID
EXhalbtc8821a2ant_InitHwConfig(
IN PBTC_COEXIST pBtCoexist,
IN BOOLEAN bWifiOnly

4437
hal/OUTSRC-BTCoexist/HalBtc8821aCsr2Ant.c Normal file
View File

File diff suppressed because it is too large Load Diff

207
hal/OUTSRC-BTCoexist/HalBtc8821aCsr2Ant.h Normal file
View File

@ -0,0 +1,207 @@
//===========================================
// The following is for 8821A_CSR 2Ant BT Co-exist definition
//===========================================
#define BT_INFO_8821A_CSR_2ANT_B_FTP BIT7
#define BT_INFO_8821A_CSR_2ANT_B_A2DP BIT6
#define BT_INFO_8821A_CSR_2ANT_B_HID BIT5
#define BT_INFO_8821A_CSR_2ANT_B_SCO_BUSY BIT4
#define BT_INFO_8821A_CSR_2ANT_B_ACL_BUSY BIT3
#define BT_INFO_8821A_CSR_2ANT_B_INQ_PAGE BIT2
#define BT_INFO_8821A_CSR_2ANT_B_SCO_ESCO BIT1
#define BT_INFO_8821A_CSR_2ANT_B_CONNECTION BIT0
#define BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT 2
typedef enum _BT_INFO_SRC_8821A_CSR_2ANT{
BT_INFO_SRC_8821A_CSR_2ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8821A_CSR_2ANT_BT_RSP = 0x1,
BT_INFO_SRC_8821A_CSR_2ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8821A_CSR_2ANT_MAX
}BT_INFO_SRC_8821A_CSR_2ANT,*PBT_INFO_SRC_8821A_CSR_2ANT;
typedef enum _BT_8821A_CSR_2ANT_BT_STATUS{
BT_8821A_CSR_2ANT_BT_STATUS_IDLE = 0x0,
BT_8821A_CSR_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE = 0x2,
BT_8821A_CSR_2ANT_BT_STATUS_MAX
}BT_8821A_CSR_2ANT_BT_STATUS,*PBT_8821A_CSR_2ANT_BT_STATUS;
typedef enum _BT_8821A_CSR_2ANT_COEX_ALGO{
BT_8821A_CSR_2ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8821A_CSR_2ANT_COEX_ALGO_SCO = 0x1,
BT_8821A_CSR_2ANT_COEX_ALGO_HID = 0x2,
BT_8821A_CSR_2ANT_COEX_ALGO_A2DP = 0x3,
BT_8821A_CSR_2ANT_COEX_ALGO_A2DP_PANHS = 0x4,
BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR = 0x5,
BT_8821A_CSR_2ANT_COEX_ALGO_PANHS = 0x6,
BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID = 0x8,
BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP = 0xa,
BT_8821A_CSR_2ANT_COEX_ALGO_MAX = 0xb,
}BT_8821A_CSR_2ANT_COEX_ALGO,*PBT_8821A_CSR_2ANT_COEX_ALGO;
typedef struct _COEX_DM_8821A_CSR_2ANT{
// fw mechanism
BOOLEAN bPreDecBtPwr;
BOOLEAN bCurDecBtPwr;
u1Byte preFwDacSwingLvl;
u1Byte curFwDacSwingLvl;
BOOLEAN bCurIgnoreWlanAct;
BOOLEAN bPreIgnoreWlanAct;
u1Byte prePsTdma;
u1Byte curPsTdma;
u1Byte psTdmaPara[6];
u1Byte psTdmaDuAdjType;
BOOLEAN bResetTdmaAdjust;
BOOLEAN bPrePsTdmaOn;
BOOLEAN bCurPsTdmaOn;
BOOLEAN bPreBtAutoReport;
BOOLEAN bCurBtAutoReport;
// sw mechanism
BOOLEAN bPreRfRxLpfShrink;
BOOLEAN bCurRfRxLpfShrink;
u4Byte btRf0x1eBackup;
BOOLEAN bPreLowPenaltyRa;
BOOLEAN bCurLowPenaltyRa;
BOOLEAN bPreDacSwingOn;
u4Byte preDacSwingLvl;
BOOLEAN bCurDacSwingOn;
u4Byte curDacSwingLvl;
BOOLEAN bPreAdcBackOff;
BOOLEAN bCurAdcBackOff;
BOOLEAN bPreAgcTableEn;
BOOLEAN bCurAgcTableEn;
u4Byte preVal0x6c0;
u4Byte curVal0x6c0;
u4Byte preVal0x6c4;
u4Byte curVal0x6c4;
u4Byte preVal0x6c8;
u4Byte curVal0x6c8;
u1Byte preVal0x6cc;
u1Byte curVal0x6cc;
BOOLEAN bLimitedDig;
u4Byte preRaMask;
u4Byte curRaMask;
u1Byte curAmpduNumType;
u1Byte preAmpduNumType;
u2Byte backupAmpduMaxNum;
u1Byte curAmpduTimeType;
u1Byte preAmpduTimeType;
u1Byte backupAmpduMaxTime;
u1Byte curArfrType;
u1Byte preArfrType;
u4Byte backupArfrCnt1;
u4Byte backupArfrCnt2;
u1Byte curRetryLimitType;
u1Byte preRetryLimitType;
u2Byte backupRetryLimit;
// algorithm related
u1Byte preAlgorithm;
u1Byte curAlgorithm;
u1Byte btStatus;
u1Byte wifiChnlInfo[3];
} COEX_DM_8821A_CSR_2ANT, *PCOEX_DM_8821A_CSR_2ANT;
typedef struct _COEX_STA_8821A_CSR_2ANT{
BOOLEAN bBtLinkExist;
BOOLEAN bScoExist;
BOOLEAN bA2dpExist;
BOOLEAN bSlave;
BOOLEAN bHidExist;
BOOLEAN bPanExist;
BOOLEAN bUnderLps;
BOOLEAN bUnderIps;
u4Byte highPriorityTx;
u4Byte highPriorityRx;
u4Byte lowPriorityTx;
u4Byte lowPriorityRx;
u1Byte btRssi;
u1Byte preBtRssiState;
u1Byte preWifiRssiState[4];
BOOLEAN bC2hBtInfoReqSent;
u1Byte btInfoC2h[BT_INFO_SRC_8821A_CSR_2ANT_MAX][10];
u4Byte btInfoC2hCnt[BT_INFO_SRC_8821A_CSR_2ANT_MAX];
BOOLEAN bC2hBtInquiryPage;
u1Byte btRetryCnt;
u1Byte btInfoExt;
}COEX_STA_8821A_CSR_2ANT, *PCOEX_STA_8821A_CSR_2ANT;
//===========================================
// The following is interface which will notify coex module.
//===========================================
VOID
EXhalbtc8821aCsr2ant_PowerOnSetting(
IN PBTC_COEXIST pBtCoexist
);
VOID
EXhalbtc8821aCsr2ant_InitHwConfig(
IN PBTC_COEXIST pBtCoexist,
IN BOOLEAN bWifiOnly
);
VOID
EXhalbtc8821aCsr2ant_InitCoexDm(
IN PBTC_COEXIST pBtCoexist
);
VOID
EXhalbtc8821aCsr2ant_IpsNotify(
IN PBTC_COEXIST pBtCoexist,
IN u1Byte type
);
VOID
EXhalbtc8821aCsr2ant_LpsNotify(
IN PBTC_COEXIST pBtCoexist,
IN u1Byte type
);
VOID
EXhalbtc8821aCsr2ant_ScanNotify(
IN PBTC_COEXIST pBtCoexist,
IN u1Byte type
);
VOID
EXhalbtc8821aCsr2ant_ConnectNotify(
IN PBTC_COEXIST pBtCoexist,
IN u1Byte type
);
VOID
EXhalbtc8821aCsr2ant_MediaStatusNotify(
IN PBTC_COEXIST pBtCoexist,
IN u1Byte type
);
VOID
EXhalbtc8821aCsr2ant_SpecialPacketNotify(
IN PBTC_COEXIST pBtCoexist,
IN u1Byte type
);
VOID
EXhalbtc8821aCsr2ant_BtInfoNotify(
IN PBTC_COEXIST pBtCoexist,
IN pu1Byte tmpBuf,
IN u1Byte length
);
VOID
EXhalbtc8821aCsr2ant_HaltNotify(
IN PBTC_COEXIST pBtCoexist
);
VOID
EXhalbtc8821aCsr2ant_PnpNotify(
IN PBTC_COEXIST pBtCoexist,
IN u1Byte pnpState
);
VOID
EXhalbtc8821aCsr2ant_Periodical(
IN PBTC_COEXIST pBtCoexist
);
VOID
EXhalbtc8821aCsr2ant_DisplayCoexInfo(
IN PBTC_COEXIST pBtCoexist
);

49
hal/OUTSRC-BTCoexist/HalBtcOutSrc.h
View File

@ -4,6 +4,9 @@
#define NORMAL_EXEC FALSE
#define FORCE_EXEC TRUE
#define BTC_RF_OFF 0x0
#define BTC_RF_ON 0x1
#define BTC_RF_A 0x0
#define BTC_RF_B 0x1
#define BTC_RF_C 0x2
@ -165,7 +168,8 @@ typedef struct _BTC_BOARD_INFO{
u1Byte pgAntNum; // pg ant number
u1Byte btdmAntNum; // ant number for btdm
u1Byte btdmAntPos; //Bryant Add to indicate Antenna Position for (pgAntNum = 2) && (btdmAntNum =1) (DPDT+1Ant case)
BOOLEAN bBtExist;
u1Byte singleAntPath; // current used for 8723b only, 1=>s0, 0=>s1
//BOOLEAN bBtExist;
} BTC_BOARD_INFO, *PBTC_BOARD_INFO;
typedef enum _BTC_DBG_OPCODE{
@ -244,8 +248,8 @@ typedef enum _BTC_GET_TYPE{
BTC_GET_BL_WIFI_AP_MODE_ENABLE,
BTC_GET_BL_WIFI_ENABLE_ENCRYPTION,
BTC_GET_BL_WIFI_UNDER_B_MODE,
BTC_GET_BL_WIFI_IS_IN_MP_MODE,
BTC_GET_BL_EXT_SWITCH,
BTC_GET_BL_WIFI_IS_IN_MP_MODE,
// type s4Byte
BTC_GET_S4_WIFI_RSSI,
@ -282,6 +286,7 @@ typedef enum _BTC_SET_TYPE{
BTC_SET_BL_BT_CTRL_AGG_SIZE,
BTC_SET_BL_INC_SCAN_DEV_NUM,
BTC_SET_BL_BT_TX_RX_MASK,
BTC_SET_BL_MIRACAST_PLUS_BT,
// type u1Byte
BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON,
@ -405,6 +410,12 @@ typedef VOID
IN u4Byte Data
);
typedef VOID
(*BFP_BTC_LOCAL_REG_W1)(
IN PVOID pBtcContext,
IN u4Byte RegAddr,
IN u1Byte Data
);
typedef VOID
(*BFP_BTC_SET_BB_REG)(
IN PVOID pBtcContext,
IN u4Byte RegAddr,
@ -488,6 +499,8 @@ typedef struct _BTC_BT_INFO{
u2Byte btHciVer;
u2Byte btRealFwVer;
u1Byte btFwVer;
u4Byte getBtFwVerCnt;
BOOLEAN bMiracastPlusBt;
BOOLEAN bBtDisableLowPwr;
@ -524,10 +537,13 @@ typedef struct _BTC_BT_LINK_INFO{
BOOLEAN bHidOnly;
BOOLEAN bPanExist;
BOOLEAN bPanOnly;
BOOLEAN bSlaveRole;
} BTC_BT_LINK_INFO, *PBTC_BT_LINK_INFO;
typedef struct _BTC_STATISTICS{
u4Byte cntBind;
u4Byte cntPowerOn;
u4Byte cntPreLoadFirmware;
u4Byte cntInitHwConfig;
u4Byte cntInitCoexDm;
u4Byte cntIpsNotify;
@ -537,6 +553,7 @@ typedef struct _BTC_STATISTICS{
u4Byte cntMediaStatusNotify;
u4Byte cntSpecialPacketNotify;
u4Byte cntBtInfoNotify;
u4Byte cntRfStatusNotify;
u4Byte cntPeriodical;
u4Byte cntCoexDmSwitch;
u4Byte cntStackOperationNotify;
@ -568,6 +585,7 @@ typedef struct _BTC_COEXIST{
BFP_BTC_W2 fBtcWrite2Byte;
BFP_BTC_R4 fBtcRead4Byte;
BFP_BTC_W4 fBtcWrite4Byte;
BFP_BTC_LOCAL_REG_W1 fBtcWriteLocalReg1Byte;
// read/write bb related
BFP_BTC_SET_BB_REG fBtcSetBbReg;
BFP_BTC_GET_BB_REG fBtcGetBbReg;
@ -592,7 +610,15 @@ extern BTC_COEXIST GLBtCoexist;
BOOLEAN
EXhalbtcoutsrc_InitlizeVariables(
IN PVOID Adapter
IN PVOID Adapter
);
VOID
EXhalbtcoutsrc_PowerOnSetting(
IN PBTC_COEXIST pBtCoexist
);
VOID
EXhalbtcoutsrc_PreLoadFirmware(
IN PBTC_COEXIST pBtCoexist
);
VOID
EXhalbtcoutsrc_InitHwConfig(
@ -640,6 +666,11 @@ EXhalbtcoutsrc_BtInfoNotify(
IN u1Byte length
);
VOID
EXhalbtcoutsrc_RfStatusNotify(
IN PBTC_COEXIST pBtCoexist,
IN u1Byte type
);
VOID
EXhalbtcoutsrc_StackOperationNotify(
IN PBTC_COEXIST pBtCoexist,
IN u1Byte type
@ -655,8 +686,7 @@ EXhalbtcoutsrc_PnpNotify(
);
VOID
EXhalbtcoutsrc_CoexDmSwitch(
IN PBTC_COEXIST pBtCoexist,
IN BOOLEAN antInverse
IN PBTC_COEXIST pBtCoexist
);
VOID
EXhalbtcoutsrc_Periodical(
@ -686,10 +716,12 @@ VOID
EXhalbtcoutsrc_UpdateMinBtRssi(
IN s1Byte btRssi
);
#if 0
VOID
EXhalbtcoutsrc_SetBtExist(
IN BOOLEAN bBtExist
);
#endif
VOID
EXhalbtcoutsrc_SetChipType(
IN u1Byte chipType
@ -697,8 +729,11 @@ EXhalbtcoutsrc_SetChipType(
VOID
EXhalbtcoutsrc_SetAntNum(
IN u1Byte type,
IN u1Byte antNum,
IN BOOLEAN antInverse
IN u1Byte antNum
);
VOID
EXhalbtcoutsrc_SetSingleAntPath(
IN u1Byte singleAntPath
);
VOID
EXhalbtcoutsrc_DisplayBtCoexInfo(

1
hal/OUTSRC-BTCoexist/Mp_Precomp.h
View File

@ -52,5 +52,6 @@
#include "HalBtc8812a2Ant.h"
#include "HalBtc8821a1Ant.h"
#include "HalBtc8821a2Ant.h"
#include "HalBtc8821aCsr2Ant.h"
#endif // __MP_PRECOMP_H__

4
hal/OUTSRC/HalPhyRf.c
View File

@ -18,7 +18,7 @@
*
******************************************************************************/
//#include "Mp_Precomp.h"
#include "Mp_Precomp.h"
#include "odm_precomp.h"
@ -161,7 +161,7 @@ ODM_TXPowerTrackingCallback_ThermalMeter(
#endif
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
if ( *(pDM_Odm->mp_mode) == 1)
if (pDM_Odm->mp_mode == TRUE)
#endif
// <Kordan> RFCalibrateInfo.RegA24 will be initialized when ODM HW configuring, but MP configures with para files.
pDM_Odm->RFCalibrateInfo.RegA24 = 0x090e1317;

24
hal/OUTSRC/Mp_Precomp.h Normal file
View File

@ -0,0 +1,24 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
//#include <Precomp.h>
//#include "odm_precomp.h"
//#include "../odm_precomp.h"

880
hal/OUTSRC/PhyDM_Adaptivity.c Normal file
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File diff suppressed because it is too large Load Diff

146
hal/OUTSRC/PhyDM_Adaptivity.h Normal file
View File

@ -0,0 +1,146 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __PHYDMADAPTIVITY_H__
#define __PHYDMADAPTIVITY_H__
#define ADAPTIVITY_VERSION "7.1"
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
typedef enum _tag_PhyDM_REGULATION_Type {
REGULATION_FCC = 0,
REGULATION_MKK = 1,
REGULATION_ETSI = 2,
REGULATION_WW = 3,
MAX_REGULATION_NUM = 4
} PhyDM_REGULATION_TYPE;
#endif
typedef enum tag_PhyDM_TRx_MUX_Type
{
PhyDM_SHUTDOWN = 0,
PhyDM_STANDBY_MODE = 1,
PhyDM_TX_MODE = 2,
PhyDM_RX_MODE = 3
}PhyDM_Trx_MUX_Type;
typedef enum tag_PhyDM_MACEDCCA_Type
{
PhyDM_IGNORE_EDCCA = 0,
PhyDM_DONT_IGNORE_EDCCA = 1
}PhyDM_MACEDCCA_Type;
VOID
Phydm_CheckAdaptivity(
IN PVOID pDM_VOID
);
VOID
Phydm_CheckEnvironment(
IN PVOID pDM_VOID
);
VOID
Phydm_NHMCounterStatisticsInit(
IN PVOID pDM_VOID
);
VOID
Phydm_NHMCounterStatistics(
IN PVOID pDM_VOID
);
VOID
Phydm_NHMBBInit(
IN PVOID pDM_VOID
);
VOID
Phydm_NHMBB(
IN PVOID pDM_VOID
);
VOID
Phydm_NHMCounterStatisticsReset(
IN PVOID pDM_VOID
);
VOID
Phydm_GetNHMCounterStatistics(
IN PVOID pDM_VOID
);
VOID
Phydm_MACEDCCAState(
IN PVOID pDM_VOID,
IN PhyDM_MACEDCCA_Type State
);
VOID
Phydm_SetEDCCAThreshold(
IN PVOID pDM_VOID,
IN s1Byte H2L,
IN s1Byte L2H
);
VOID
Phydm_SetTRxMux(
IN PVOID pDM_VOID,
IN PhyDM_Trx_MUX_Type txMode,
IN PhyDM_Trx_MUX_Type rxMode
);
BOOLEAN
Phydm_CalNHMcnt(
IN PVOID pDM_VOID
);
VOID
Phydm_SearchPwdBLowerBound(
IN PVOID pDM_VOID
);
VOID
Phydm_AdaptivityInit(
IN PVOID pDM_VOID
);
BOOLEAN
Phydm_Adaptivity(
IN PVOID pDM_VOID,
IN u1Byte IGI
);
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
VOID
Phydm_DisableEDCCA(
IN PVOID pDM_VOID
);
VOID
Phydm_DynamicEDCCA(
IN PVOID pDM_VOID
);
#endif
#endif

12851
hal/OUTSRC/odm.c
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File diff suppressed because it is too large Load Diff

842
hal/OUTSRC/odm.h
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File diff suppressed because it is too large Load Diff

213
hal/OUTSRC/odm_ACS.c Normal file
View File

@ -0,0 +1,213 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
//============================================================
// include files
//============================================================
#include "Mp_Precomp.h"
#include "odm_precomp.h"
u1Byte
ODM_GetAutoChannelSelectResult(
IN PVOID pDM_VOID,
IN u1Byte Band
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
PACS pACS = &pDM_Odm->DM_ACS;
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
if(Band == ODM_BAND_2_4G)
{
ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("[ACS] ODM_GetAutoChannelSelectResult(): CleanChannel_2G(%d)\n", pACS->CleanChannel_2G));
return (u1Byte)pACS->CleanChannel_2G;
}
else
{
ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("[ACS] ODM_GetAutoChannelSelectResult(): CleanChannel_5G(%d)\n", pACS->CleanChannel_5G));
return (u1Byte)pACS->CleanChannel_5G;
}
#else
return (u1Byte)pACS->CleanChannel_2G;
#endif
}
VOID
odm_AutoChannelSelectSetting(
IN PVOID pDM_VOID,
IN BOOLEAN IsEnable
)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
u2Byte period = 0x2710;// 40ms in default
u2Byte NHMType = 0x7;
ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("odm_AutoChannelSelectSetting()=========> \n"));
if(IsEnable)
{//20 ms
period = 0x1388;
NHMType = 0x1;
}
if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES)
{
//PHY parameters initialize for ac series
ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TIMER_11AC+2, period); //0x990[31:16]=0x2710 Time duration for NHM unit: 4us, 0x2710=40ms
//ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, BIT8|BIT9|BIT10, NHMType); //0x994[9:8]=3 enable CCX
}
else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES)
{
//PHY parameters initialize for n series
ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TIMER_11N+2, period); //0x894[31:16]=0x2710 Time duration for NHM unit: 4us, 0x2710=40ms
//ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, BIT10|BIT9|BIT8, NHMType); //0x890[9:8]=3 enable CCX
}
#endif
}
VOID
odm_AutoChannelSelectInit(
IN PVOID pDM_VOID
)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
PACS pACS = &pDM_Odm->DM_ACS;
u1Byte i;
if(!(pDM_Odm->SupportAbility & ODM_BB_NHM_CNT))
return;
if(pACS->bForceACSResult)
return;
ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("odm_AutoChannelSelectInit()=========> \n"));
pACS->CleanChannel_2G = 1;
pACS->CleanChannel_5G = 36;
for (i = 0; i < ODM_MAX_CHANNEL_2G; ++i)
{
pACS->Channel_Info_2G[0][i] = 0;
pACS->Channel_Info_2G[1][i] = 0;
}
if(pDM_Odm->SupportICType & (ODM_IC_11AC_SERIES|ODM_RTL8192D))
{
for (i = 0; i < ODM_MAX_CHANNEL_5G; ++i)
{
pACS->Channel_Info_5G[0][i] = 0;
pACS->Channel_Info_5G[1][i] = 0;
}
}
#endif
}
VOID
odm_AutoChannelSelectReset(
IN PVOID pDM_VOID
)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
PACS pACS = &pDM_Odm->DM_ACS;
if(!(pDM_Odm->SupportAbility & ODM_BB_NHM_CNT))
return;
if(pACS->bForceACSResult)
return;
ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("odm_AutoChannelSelectReset()=========> \n"));
odm_AutoChannelSelectSetting(pDM_Odm,TRUE);// for 20ms measurement
Phydm_NHMCounterStatisticsReset(pDM_Odm);
#endif
}
VOID
odm_AutoChannelSelect(
IN PVOID pDM_VOID,
IN u1Byte Channel
)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
PACS pACS = &pDM_Odm->DM_ACS;
u1Byte ChannelIDX = 0, SearchIDX = 0;
u2Byte MaxScore=0;
if(!(pDM_Odm->SupportAbility & ODM_BB_NHM_CNT))
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_AutoChannelSelect(): Return: SupportAbility ODM_BB_NHM_CNT is disabled\n"));
return;
}
if(pACS->bForceACSResult)
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_AutoChannelSelect(): Force 2G clean channel = %d, 5G clean channel = %d\n",
pACS->CleanChannel_2G, pACS->CleanChannel_5G));
return;
}
ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("odm_AutoChannelSelect(): Channel = %d=========> \n", Channel));
Phydm_GetNHMCounterStatistics(pDM_Odm);
odm_AutoChannelSelectSetting(pDM_Odm,FALSE);
if(Channel >=1 && Channel <=14)
{
ChannelIDX = Channel - 1;
pACS->Channel_Info_2G[1][ChannelIDX]++;
if(pACS->Channel_Info_2G[1][ChannelIDX] >= 2)
pACS->Channel_Info_2G[0][ChannelIDX] = (pACS->Channel_Info_2G[0][ChannelIDX] >> 1) +
(pACS->Channel_Info_2G[0][ChannelIDX] >> 2) + (pDM_Odm->NHM_cnt_0>>2);
else
pACS->Channel_Info_2G[0][ChannelIDX] = pDM_Odm->NHM_cnt_0;
ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("odm_AutoChannelSelect(): NHM_cnt_0 = %d \n", pDM_Odm->NHM_cnt_0));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("odm_AutoChannelSelect(): Channel_Info[0][%d] = %d, Channel_Info[1][%d] = %d\n", ChannelIDX, pACS->Channel_Info_2G[0][ChannelIDX], ChannelIDX, pACS->Channel_Info_2G[1][ChannelIDX]));
for(SearchIDX = 0; SearchIDX < ODM_MAX_CHANNEL_2G; SearchIDX++)
{
if(pACS->Channel_Info_2G[1][SearchIDX] != 0)
{
if(pACS->Channel_Info_2G[0][SearchIDX] >= MaxScore)
{
MaxScore = pACS->Channel_Info_2G[0][SearchIDX];
pACS->CleanChannel_2G = SearchIDX+1;
}
}
}
ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("(1)odm_AutoChannelSelect(): 2G: CleanChannel_2G = %d, MaxScore = %d \n",
pACS->CleanChannel_2G, MaxScore));
}
else if(Channel >= 36)
{
// Need to do
pACS->CleanChannel_5G = Channel;
}
#endif
}

60
hal/OUTSRC/odm_ACS.h Normal file
View File

@ -0,0 +1,60 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __ODMACS_H__
#define __ODMACS_H__
#define ODM_MAX_CHANNEL_2G 14
#define ODM_MAX_CHANNEL_5G 24
typedef struct _ACS_
{
BOOLEAN bForceACSResult;
u1Byte CleanChannel_2G;
u1Byte CleanChannel_5G;
u2Byte Channel_Info_2G[2][ODM_MAX_CHANNEL_2G]; //Channel_Info[1]: Channel Score, Channel_Info[2]:Channel_Scan_Times
u2Byte Channel_Info_5G[2][ODM_MAX_CHANNEL_5G];
}ACS, *PACS;
VOID
odm_AutoChannelSelectInit(
IN PVOID pDM_VOID
);
VOID
odm_AutoChannelSelectReset(
IN PVOID pDM_VOID
);
VOID
odm_AutoChannelSelect(
IN PVOID pDM_VOID,
IN u1Byte Channel
);
u1Byte
ODM_GetAutoChannelSelectResult(
IN PVOID pDM_VOID,
IN u1Byte Band
);
#endif

783
hal/OUTSRC/odm_AntDiv.c
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File diff suppressed because it is too large Load Diff

105
hal/OUTSRC/odm_AntDiv.h
View File

@ -42,6 +42,8 @@
#define ODM_AC_ANTDIV_SUPPORT (ODM_RTL8821|ODM_RTL8881A|ODM_RTL8812)
#define ODM_SMART_ANT_SUPPORT (ODM_RTL8188E|ODM_RTL8192E)
#define ODM_OLD_IC_ANTDIV_SUPPORT (ODM_RTL8723A|ODM_RTL8192C|ODM_RTL8192D)
#define ODM_ANTDIV_2G_SUPPORT_IC (ODM_RTL8188E|ODM_RTL8192E|ODM_RTL8723B|ODM_RTL8881A)
#define ODM_ANTDIV_5G_SUPPORT_IC (ODM_RTL8821|ODM_RTL8881A|ODM_RTL8812)
#define ODM_ANTDIV_2G BIT0
@ -50,15 +52,24 @@
#define ANTDIV_ON 1
#define ANTDIV_OFF 0
VOID
ODM_AntDivInit(
IN PDM_ODM_T pDM_Odm
);
#define INIT_ANTDIV_TIMMER 0
#define CANCEL_ANTDIV_TIMMER 1
#define RELEASE_ANTDIV_TIMMER 2
VOID
ODM_AntDiv(
IN PDM_ODM_T pDM_Odm
);
ODM_StopAntennaSwitchDm(
IN PDM_ODM_T pDM_Odm
);
VOID
ODM_SetAntConfig(
IN PDM_ODM_T pDM_Odm,
IN u1Byte antSetting // 0=A, 1=B, 2=C, ....
);
#define SwAntDivRestAfterLink ODM_SwAntDivRestAfterLink
VOID ODM_SwAntDivRestAfterLink( IN PDM_ODM_T pDM_Odm);
#if (defined(CONFIG_HW_ANTENNA_DIVERSITY))
@ -68,6 +79,14 @@ ODM_UpdateRxIdleAnt(
IN u1Byte Ant
);
VOID
odm_AntselStatistics(
IN PDM_ODM_T pDM_Odm,
IN u1Byte antsel_tr_mux,
IN u4Byte MacId,
IN u4Byte RxPWDBAll
);
#if (RTL8723B_SUPPORT == 1)||(RTL8821A_SUPPORT == 1)
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
VOID
@ -77,13 +96,39 @@ ODM_SW_AntDiv_Callback(
VOID
ODM_SW_AntDiv_WorkitemCallback(
IN PVOID pContext
);
#endif //#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
IN PVOID pContext
);
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
VOID
ODM_SW_AntDiv_Callback(void *FunctionContext);
#endif //#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
#endif
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
VOID
odm_S0S1_SwAntDivByCtrlFrame(
IN PDM_ODM_T pDM_Odm,
IN u1Byte Step
);
VOID
odm_AntselStatisticsOfCtrlFrame(
IN PDM_ODM_T pDM_Odm,
IN u1Byte antsel_tr_mux,
IN u4Byte RxPWDBAll
);
VOID
odm_S0S1_SwAntDivByCtrlFrame_ProcessRSSI(
IN PDM_ODM_T pDM_Odm,
IN PODM_PHY_INFO_T pPhyInfo,
IN PODM_PACKET_INFO_T pPktinfo
);
#endif //#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
#endif
#if(RTL8188E_SUPPORT == 1 || RTL8192E_SUPPORT == 1)
@ -105,6 +150,21 @@ odm_FastAntTrainingWorkItemCallback(
#endif
#endif
VOID
ODM_AntDivInit(
IN PDM_ODM_T pDM_Odm
);
VOID
ODM_AntDivReset(
IN PDM_ODM_T pDM_Odm
);
VOID
ODM_AntDiv(
IN PDM_ODM_T pDM_Odm
);
VOID
ODM_Process_RSSIForAntDiv(
IN OUT PDM_ODM_T pDM_Odm,
@ -132,5 +192,26 @@ ODM_SetTxAntByTxInfo(
#endif
VOID
ODM_AntDiv_Config(
IN PDM_ODM_T pDM_Odm
);
VOID
ODM_UpdateRxIdleAnt_8723B(
IN PDM_ODM_T pDM_Odm,
IN u1Byte Ant,
IN u4Byte DefaultAnt,
IN u4Byte OptionalAnt
);
VOID
ODM_AntDivTimers(
IN PDM_ODM_T pDM_Odm,
IN u1Byte state
);
#endif //#if (defined(CONFIG_HW_ANTENNA_DIVERSITY))
#endif //#ifndef __ODMANTDIV_H__

357
hal/OUTSRC/odm_CfoTracking.c Normal file
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@ -0,0 +1,357 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include "Mp_Precomp.h"
#include "odm_precomp.h"
VOID
odm_SetCrystalCap(
IN PVOID pDM_VOID,
IN u1Byte CrystalCap
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
PCFO_TRACKING pCfoTrack = &pDM_Odm->DM_CfoTrack;
BOOLEAN bEEPROMCheck;
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
PADAPTER Adapter = pDM_Odm->Adapter;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
bEEPROMCheck = (pHalData->EEPROMVersion >= 0x01)?TRUE:FALSE;
#else
bEEPROMCheck = TRUE;
#endif
if(pCfoTrack->CrystalCap == CrystalCap)
return;
pCfoTrack->CrystalCap = CrystalCap;
if(pDM_Odm->SupportICType & ODM_RTL8192D)
{
ODM_SetBBReg(pDM_Odm, REG_AFE_XTAL_CTRL, 0x000000F0, CrystalCap & 0x0F);
ODM_SetBBReg(pDM_Odm, REG_AFE_PLL_CTRL, 0xF0000000, ((CrystalCap & 0xF0) >> 4));
}
else if(pDM_Odm->SupportICType & ODM_RTL8188E)
{
// write 0x24[22:17] = 0x24[16:11] = CrystalCap
CrystalCap = CrystalCap & 0x3F;
ODM_SetBBReg(pDM_Odm, REG_AFE_XTAL_CTRL, 0x007ff800, (CrystalCap | (CrystalCap << 6)));
}
else if(pDM_Odm->SupportICType & ODM_RTL8812)
{
// write 0x2C[30:25] = 0x2C[24:19] = CrystalCap
CrystalCap = CrystalCap & 0x3F;
ODM_SetBBReg(pDM_Odm, REG_MAC_PHY_CTRL, 0x7FF80000, (CrystalCap | (CrystalCap << 6)));
}
else if (((pDM_Odm->SupportICType & ODM_RTL8723A) && bEEPROMCheck) ||
(pDM_Odm->SupportICType & ODM_RTL8723B) ||(pDM_Odm->SupportICType & ODM_RTL8192E) ||
(pDM_Odm->SupportICType & ODM_RTL8821))
{
// 0x2C[23:18] = 0x2C[17:12] = CrystalCap
CrystalCap = CrystalCap & 0x3F;
ODM_SetBBReg(pDM_Odm, REG_MAC_PHY_CTRL, 0x00FFF000, (CrystalCap | (CrystalCap << 6)));
}
else if(pDM_Odm->SupportICType & ODM_RTL8821B)
{
// write 0x28[6:1] = 0x24[30:25] = CrystalCap
CrystalCap = CrystalCap & 0x3F;
ODM_SetBBReg(pDM_Odm, REG_AFE_XTAL_CTRL, 0x7E000000, CrystalCap);
ODM_SetBBReg(pDM_Odm, REG_AFE_PLL_CTRL, 0x7E, CrystalCap);
}
else if(pDM_Odm->SupportICType & ODM_RTL8814A)
{
// write 0x2C[26:21] = 0x2C[20:15] = CrystalCap
CrystalCap = CrystalCap & 0x3F;
ODM_SetBBReg(pDM_Odm, REG_MAC_PHY_CTRL, 0x07FF8000, (CrystalCap | (CrystalCap << 6)));
}
else
{
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("odm_SetCrystalCap(): Use default setting.\n"));
ODM_SetBBReg(pDM_Odm, REG_MAC_PHY_CTRL, 0xFFF000, (CrystalCap | (CrystalCap << 6)));
}
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("odm_SetCrystalCap(): CrystalCap = 0x%x\n", CrystalCap));
}
u1Byte
odm_GetDefaultCrytaltalCap(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
u1Byte CrystalCap = 0x20;
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
PADAPTER Adapter = pDM_Odm->Adapter;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
CrystalCap = pHalData->CrystalCap;
#else
prtl8192cd_priv priv = pDM_Odm->priv;
if(priv->pmib->dot11RFEntry.xcap > 0)
CrystalCap = priv->pmib->dot11RFEntry.xcap;
#endif
CrystalCap = CrystalCap & 0x3f;
return CrystalCap;
}
VOID
odm_SetATCStatus(
IN PVOID pDM_VOID,
IN BOOLEAN ATCStatus
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
PCFO_TRACKING pCfoTrack = &pDM_Odm->DM_CfoTrack;
if(pCfoTrack->bATCStatus == ATCStatus)
return;
ODM_SetBBReg(pDM_Odm, ODM_REG(BB_ATC,pDM_Odm), ODM_BIT(BB_ATC,pDM_Odm), ATCStatus);
pCfoTrack->bATCStatus = ATCStatus;
}
BOOLEAN
odm_GetATCStatus(
IN PVOID pDM_VOID
)
{
BOOLEAN ATCStatus;
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
ATCStatus = (BOOLEAN)ODM_GetBBReg(pDM_Odm, ODM_REG(BB_ATC,pDM_Odm), ODM_BIT(BB_ATC,pDM_Odm));
return ATCStatus;
}
VOID
ODM_CfoTrackingReset(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
PCFO_TRACKING pCfoTrack = &pDM_Odm->DM_CfoTrack;
u1Byte CrystalCap;
pCfoTrack->DefXCap = odm_GetDefaultCrytaltalCap(pDM_Odm);
pCfoTrack->bAdjust = TRUE;
#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
odm_SetCrystalCap(pDM_Odm, pCfoTrack->DefXCap);
odm_SetATCStatus(pDM_Odm, TRUE);
#else
if(pCfoTrack->CrystalCap > pCfoTrack->DefXCap)
{
for(CrystalCap = pCfoTrack->CrystalCap; CrystalCap >= pCfoTrack->DefXCap; CrystalCap--)
odm_SetCrystalCap(pDM_Odm, CrystalCap);
}
else
{
for(CrystalCap = pCfoTrack->CrystalCap; CrystalCap <= pCfoTrack->DefXCap; CrystalCap++)
odm_SetCrystalCap(pDM_Odm, CrystalCap);
}
#endif
}
VOID
ODM_CfoTrackingInit(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
PCFO_TRACKING pCfoTrack = &pDM_Odm->DM_CfoTrack;
pCfoTrack->DefXCap = pCfoTrack->CrystalCap = odm_GetDefaultCrytaltalCap(pDM_Odm);
pCfoTrack->bATCStatus = odm_GetATCStatus(pDM_Odm);
pCfoTrack->bAdjust = TRUE;
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking_init()=========> \n"));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking_init(): bATCStatus = %d, CrystalCap = 0x%x \n",pCfoTrack->bATCStatus, pCfoTrack->DefXCap));
}
VOID
ODM_CfoTracking(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
PCFO_TRACKING pCfoTrack = &pDM_Odm->DM_CfoTrack;
int CFO_kHz_A, CFO_kHz_B, CFO_ave = 0;
int CFO_ave_diff;
int CrystalCap = (int)pCfoTrack->CrystalCap;
u1Byte Adjust_Xtal = 1;
//4 Support ability
if(!(pDM_Odm->SupportAbility & ODM_BB_CFO_TRACKING))
{
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Return: SupportAbility ODM_BB_CFO_TRACKING is disabled\n"));
return;
}
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking()=========> \n"));
if(!pDM_Odm->bLinked || !pDM_Odm->bOneEntryOnly)
{
//4 No link or more than one entry
ODM_CfoTrackingReset(pDM_Odm);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Reset: bLinked = %d, bOneEntryOnly = %d\n",
pDM_Odm->bLinked, pDM_Odm->bOneEntryOnly));
}
else
{
//3 1. CFO Tracking
//4 1.1 No new packet
if(pCfoTrack->packetCount == pCfoTrack->packetCount_pre)
{
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): packet counter doesn't change\n"));
return;
}
pCfoTrack->packetCount_pre = pCfoTrack->packetCount;
//4 1.2 Calculate CFO
CFO_kHz_A = (int)(pCfoTrack->CFO_tail[0] * 3125) / 1280;
CFO_kHz_B = (int)(pCfoTrack->CFO_tail[1] * 3125) / 1280;
if(pDM_Odm->RFType < ODM_2T2R)
CFO_ave = CFO_kHz_A;
else
CFO_ave = (int)(CFO_kHz_A + CFO_kHz_B) >> 1;
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): CFO_kHz_A = %dkHz, CFO_kHz_B = %dkHz, CFO_ave = %dkHz\n",
CFO_kHz_A, CFO_kHz_B, CFO_ave));
//4 1.3 Avoid abnormal large CFO
CFO_ave_diff = (pCfoTrack->CFO_ave_pre >= CFO_ave)?(pCfoTrack->CFO_ave_pre - CFO_ave):(CFO_ave - pCfoTrack->CFO_ave_pre);
if(CFO_ave_diff > 20 && pCfoTrack->largeCFOHit == 0 && !pCfoTrack->bAdjust)
{
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): first large CFO hit\n"));
pCfoTrack->largeCFOHit = 1;
return;
}
else
pCfoTrack->largeCFOHit = 0;
pCfoTrack->CFO_ave_pre = CFO_ave;
//4 1.4 Dynamic Xtal threshold
if(pCfoTrack->bAdjust == FALSE)
{
if(CFO_ave > CFO_TH_XTAL_HIGH || CFO_ave < (-CFO_TH_XTAL_HIGH))
pCfoTrack->bAdjust = TRUE;
}
else
{
if(CFO_ave < CFO_TH_XTAL_LOW && CFO_ave > (-CFO_TH_XTAL_LOW))
pCfoTrack->bAdjust = FALSE;
}
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
//4 1.5 BT case: Disable CFO tracking
if(pDM_Odm->bBtEnabled)
{
pCfoTrack->bAdjust = FALSE;
odm_SetCrystalCap(pDM_Odm, pCfoTrack->DefXCap);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Disable CFO tracking for BT!!\n"));
}
//4 1.6 Big jump
if(pCfoTrack->bAdjust)
{
if(CFO_ave > CFO_TH_XTAL_LOW)
Adjust_Xtal = Adjust_Xtal + ((CFO_ave - CFO_TH_XTAL_LOW) >> 2);
else if(CFO_ave < (-CFO_TH_XTAL_LOW))
Adjust_Xtal = Adjust_Xtal + ((CFO_TH_XTAL_LOW - CFO_ave) >> 2);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Crystal cap offset = %d\n", Adjust_Xtal));
}
#endif
//4 1.7 Adjust Crystal Cap.
if(pCfoTrack->bAdjust)
{
if(CFO_ave > CFO_TH_XTAL_LOW)
CrystalCap = CrystalCap + Adjust_Xtal;
else if(CFO_ave < (-CFO_TH_XTAL_LOW))
CrystalCap = CrystalCap - Adjust_Xtal;
if(CrystalCap > 0x3f)
CrystalCap = 0x3f;
else if (CrystalCap < 0)
CrystalCap = 0;
odm_SetCrystalCap(pDM_Odm, (u1Byte)CrystalCap);
}
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Crystal cap = 0x%x, Default Crystal cap = 0x%x\n",
pCfoTrack->CrystalCap, pCfoTrack->DefXCap));
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES)
return;
//3 2. Dynamic ATC switch
if(CFO_ave < CFO_TH_ATC && CFO_ave > -CFO_TH_ATC)
{
odm_SetATCStatus(pDM_Odm, FALSE);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Disable ATC!!\n"));
}
else
{
odm_SetATCStatus(pDM_Odm, TRUE);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Enable ATC!!\n"));
}
#endif
}
}
VOID
ODM_ParsingCFO(
IN PVOID pDM_VOID,
IN PVOID pPktinfo_VOID,
IN s1Byte* pcfotail
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
PODM_PACKET_INFO_T pPktinfo = (PODM_PACKET_INFO_T)pPktinfo_VOID;
PCFO_TRACKING pCfoTrack = &pDM_Odm->DM_CfoTrack;
u1Byte i;
if(!(pDM_Odm->SupportAbility & ODM_BB_CFO_TRACKING))
return;
#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
if(pPktinfo->bPacketMatchBSSID)
#else
if(pPktinfo->StationID != 0)
#endif
{
//3 Update CFO report for path-A & path-B
// Only paht-A and path-B have CFO tail and short CFO
for(i = ODM_RF_PATH_A; i <= ODM_RF_PATH_B; i++)
{
pCfoTrack->CFO_tail[i] = (int)pcfotail[i];
}
//3 Update packet counter
if(pCfoTrack->packetCount == 0xffffffff)
pCfoTrack->packetCount = 0;
else
pCfoTrack->packetCount++;
}
}

66
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@ -0,0 +1,66 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __ODMCFOTRACK_H__
#define __ODMCFOTRACK_H__
#define CFO_TH_XTAL_HIGH 20 // kHz
#define CFO_TH_XTAL_LOW 10 // kHz
#define CFO_TH_ATC 80 // kHz
typedef struct _CFO_TRACKING_
{
BOOLEAN bATCStatus;
BOOLEAN largeCFOHit;
BOOLEAN bAdjust;
u1Byte CrystalCap;
u1Byte DefXCap;
int CFO_tail[2];
int CFO_ave_pre;
u4Byte packetCount;
u4Byte packetCount_pre;
BOOLEAN bForceXtalCap;
BOOLEAN bReset;
}CFO_TRACKING, *PCFO_TRACKING;
VOID
ODM_CfoTrackingReset(
IN PVOID pDM_VOID
);
VOID
ODM_CfoTrackingInit(
IN PVOID pDM_VOID
);
VOID
ODM_CfoTracking(
IN PVOID pDM_VOID
);
VOID
ODM_ParsingCFO(
IN PVOID pDM_VOID,
IN PVOID pPktinfo_VOID,
IN s1Byte* pcfotail
);
#endif

2006
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339
hal/OUTSRC/odm_DIG.h Normal file
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@ -0,0 +1,339 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __ODMDIG_H__
#define __ODMDIG_H__
typedef struct _Dynamic_Initial_Gain_Threshold_
{
BOOLEAN bStopDIG; // for debug
BOOLEAN bPauseDIG;
BOOLEAN bIgnoreDIG;
BOOLEAN bPSDInProgress;
u1Byte Dig_Enable_Flag;
u1Byte Dig_Ext_Port_Stage;
int RssiLowThresh;
int RssiHighThresh;
u4Byte FALowThresh;
u4Byte FAHighThresh;
u1Byte CurSTAConnectState;
u1Byte PreSTAConnectState;
u1Byte CurMultiSTAConnectState;
u1Byte PreIGValue;
u1Byte CurIGValue;
u1Byte BackupIGValue; //MP DIG
u1Byte BT30_CurIGI;
u1Byte IGIBackup;
s1Byte BackoffVal;
s1Byte BackoffVal_range_max;
s1Byte BackoffVal_range_min;
u1Byte rx_gain_range_max;
u1Byte rx_gain_range_min;
u1Byte Rssi_val_min;
u1Byte PreCCK_CCAThres;
u1Byte CurCCK_CCAThres;
u1Byte PreCCKPDState;
u1Byte CurCCKPDState;
u1Byte CCKPDBackup;
u1Byte LargeFAHit;
u1Byte ForbiddenIGI;
u4Byte Recover_cnt;
u1Byte DIG_Dynamic_MIN_0;
u1Byte DIG_Dynamic_MIN_1;
BOOLEAN bMediaConnect_0;
BOOLEAN bMediaConnect_1;
u4Byte AntDiv_RSSI_max;
u4Byte RSSI_max;
u1Byte *pbP2pLinkInProgress;
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
BOOLEAN bTpTarget;
BOOLEAN bNoiseEst;
u4Byte TpTrainTH_min;
u1Byte IGIOffset_A;
u1Byte IGIOffset_B;
#endif
}DIG_T,*pDIG_T;
typedef struct _FALSE_ALARM_STATISTICS{
u4Byte Cnt_Parity_Fail;
u4Byte Cnt_Rate_Illegal;
u4Byte Cnt_Crc8_fail;
u4Byte Cnt_Mcs_fail;
u4Byte Cnt_Ofdm_fail;
u4Byte Cnt_Ofdm_fail_pre; //For RTL8881A
u4Byte Cnt_Cck_fail;
u4Byte Cnt_all;
u4Byte Cnt_Fast_Fsync;
u4Byte Cnt_SB_Search_fail;
u4Byte Cnt_OFDM_CCA;
u4Byte Cnt_CCK_CCA;
u4Byte Cnt_CCA_all;
u4Byte Cnt_BW_USC; //Gary
u4Byte Cnt_BW_LSC; //Gary
}FALSE_ALARM_STATISTICS, *PFALSE_ALARM_STATISTICS;
typedef enum tag_Dynamic_Init_Gain_Operation_Type_Definition
{
DIG_TYPE_THRESH_HIGH = 0,
DIG_TYPE_THRESH_LOW = 1,
DIG_TYPE_BACKOFF = 2,
DIG_TYPE_RX_GAIN_MIN = 3,
DIG_TYPE_RX_GAIN_MAX = 4,
DIG_TYPE_ENABLE = 5,
DIG_TYPE_DISABLE = 6,
DIG_OP_TYPE_MAX
}DM_DIG_OP_E;
typedef enum tag_ODM_PauseDIG_Type {
ODM_PAUSE_DIG = BIT0,
ODM_RESUME_DIG = BIT1
} ODM_Pause_DIG_TYPE;
typedef enum tag_ODM_PauseCCKPD_Type {
ODM_PAUSE_CCKPD = BIT0,
ODM_RESUME_CCKPD = BIT1
} ODM_Pause_CCKPD_TYPE;
/*
typedef enum tag_CCK_Packet_Detection_Threshold_Type_Definition
{
CCK_PD_STAGE_LowRssi = 0,
CCK_PD_STAGE_HighRssi = 1,
CCK_PD_STAGE_MAX = 3,
}DM_CCK_PDTH_E;
typedef enum tag_DIG_EXT_PORT_ALGO_Definition
{
DIG_EXT_PORT_STAGE_0 = 0,
DIG_EXT_PORT_STAGE_1 = 1,
DIG_EXT_PORT_STAGE_2 = 2,
DIG_EXT_PORT_STAGE_3 = 3,
DIG_EXT_PORT_STAGE_MAX = 4,
}DM_DIG_EXT_PORT_ALG_E;
typedef enum tag_DIG_Connect_Definition
{
DIG_STA_DISCONNECT = 0,
DIG_STA_CONNECT = 1,
DIG_STA_BEFORE_CONNECT = 2,
DIG_MultiSTA_DISCONNECT = 3,
DIG_MultiSTA_CONNECT = 4,
DIG_CONNECT_MAX
}DM_DIG_CONNECT_E;
#define DM_MultiSTA_InitGainChangeNotify(Event) {DM_DigTable.CurMultiSTAConnectState = Event;}
#define DM_MultiSTA_InitGainChangeNotify_CONNECT(_ADAPTER) \
DM_MultiSTA_InitGainChangeNotify(DIG_MultiSTA_CONNECT)
#define DM_MultiSTA_InitGainChangeNotify_DISCONNECT(_ADAPTER) \
DM_MultiSTA_InitGainChangeNotify(DIG_MultiSTA_DISCONNECT)
*/
#define DM_DIG_THRESH_HIGH 40
#define DM_DIG_THRESH_LOW 35
#define DM_FALSEALARM_THRESH_LOW 400
#define DM_FALSEALARM_THRESH_HIGH 1000
#define DM_DIG_MAX_NIC 0x3e
#define DM_DIG_MIN_NIC 0x1e //0x22//0x1c
#define DM_DIG_MAX_OF_MIN_NIC 0x3e
#define DM_DIG_MAX_AP 0x3e
#define DM_DIG_MIN_AP 0x1c
#define DM_DIG_MAX_OF_MIN 0x2A //0x32
#define DM_DIG_MIN_AP_DFS 0x20
#define DM_DIG_MAX_NIC_HP 0x46
#define DM_DIG_MIN_NIC_HP 0x2e
#define DM_DIG_MAX_AP_HP 0x42
#define DM_DIG_MIN_AP_HP 0x30
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#define DM_DIG_MAX_AP_COVERAGR 0x26
#define DM_DIG_MIN_AP_COVERAGE 0x1c
#define DM_DIG_MAX_OF_MIN_COVERAGE 0x22
#define DM_DIG_TP_Target_TH0 500
#define DM_DIG_TP_Target_TH1 1000
#define DM_DIG_TP_Training_Period 10
#endif
//vivi 92c&92d has different definition, 20110504
//this is for 92c
#if (DM_ODM_SUPPORT_TYPE & ODM_CE)
#ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV
#define DM_DIG_FA_TH0 0x80//0x20
#else
#define DM_DIG_FA_TH0 0x200//0x20
#endif
#else
#define DM_DIG_FA_TH0 0x200//0x20
#endif
#define DM_DIG_FA_TH1 0x300
#define DM_DIG_FA_TH2 0x400
//this is for 92d
#define DM_DIG_FA_TH0_92D 0x100
#define DM_DIG_FA_TH1_92D 0x400
#define DM_DIG_FA_TH2_92D 0x600
#define DM_DIG_BACKOFF_MAX 12
#define DM_DIG_BACKOFF_MIN -4
#define DM_DIG_BACKOFF_DEFAULT 10
#define DM_DIG_FA_TH0_LPS 4 //-> 4 in lps
#define DM_DIG_FA_TH1_LPS 15 //-> 15 lps
#define DM_DIG_FA_TH2_LPS 30 //-> 30 lps
#define RSSI_OFFSET_DIG 0x05
VOID
ODM_ChangeDynamicInitGainThresh(
IN PVOID pDM_VOID,
IN u4Byte DM_Type,
IN u4Byte DM_Value
);
VOID
ODM_Write_DIG(
IN PVOID pDM_VOID,
IN u1Byte CurrentIGI
);
VOID
odm_PauseDIG(
IN PVOID pDM_VOID,
IN ODM_Pause_DIG_TYPE PauseType,
IN u1Byte IGIValue
);
VOID
odm_DIGInit(
IN PVOID pDM_VOID
);
VOID
odm_DIG(
IN PVOID pDM_VOID
);
VOID
odm_DIGbyRSSI_LPS(
IN PVOID pDM_VOID
);
VOID
odm_DigForBtHsMode(
IN PVOID pDM_VOID
);
VOID
odm_FalseAlarmCounterStatistics(
IN PVOID pDM_VOID
);
VOID
odm_FAThresholdCheck(
IN PVOID pDM_VOID,
IN BOOLEAN bDFSBand,
IN BOOLEAN bPerformance,
IN u4Byte RxTp,
IN u4Byte TxTp,
OUT u4Byte* dm_FA_thres
);
u1Byte
odm_ForbiddenIGICheck(
IN PVOID pDM_VOID,
IN u1Byte DIG_Dynamic_MIN,
IN u1Byte CurrentIGI
);
VOID
odm_InbandNoiseCalculate (
IN PVOID pDM_VOID
);
BOOLEAN
odm_DigAbort(
IN PVOID pDM_VOID
);
VOID
odm_PauseCCKPacketDetection(
IN PVOID pDM_VOID,
IN ODM_Pause_CCKPD_TYPE PauseType,
IN u1Byte CCKPDThreshold
);
VOID
odm_CCKPacketDetectionThresh(
IN PVOID pDM_VOID
);
VOID
ODM_Write_CCK_CCA_Thres(
IN PVOID pDM_VOID,
IN u1Byte CurCCK_CCAThres
);
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
VOID
odm_MPT_DIGCallback(
PRT_TIMER pTimer
);
VOID
odm_MPT_DIGWorkItemCallback(
IN PVOID pContext
);
#endif
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
VOID
odm_MPT_DIGCallback(
IN PVOID pDM_VOID
);
#endif
#if (DM_ODM_SUPPORT_TYPE != ODM_CE)
VOID
ODM_MPT_DIG(
IN PVOID pDM_VOID
);
#endif
#endif

218
hal/OUTSRC/odm_DynamicBBPowerSaving.c Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
//============================================================
// include files
//============================================================
#include "Mp_Precomp.h"
#include "odm_precomp.h"
VOID
odm_DynamicBBPowerSavingInit(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
pPS_T pDM_PSTable = &pDM_Odm->DM_PSTable;
pDM_PSTable->PreCCAState = CCA_MAX;
pDM_PSTable->CurCCAState = CCA_MAX;
pDM_PSTable->PreRFState = RF_MAX;
pDM_PSTable->CurRFState = RF_MAX;
pDM_PSTable->Rssi_val_min = 0;
pDM_PSTable->initialize = 0;
}
VOID
odm_DynamicBBPowerSaving(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
if (pDM_Odm->SupportICType != ODM_RTL8723A)
return;
if(!(pDM_Odm->SupportAbility & ODM_BB_PWR_SAVE))
return;
if(!(pDM_Odm->SupportPlatform & (ODM_WIN|ODM_CE)))
return;
//1 2.Power Saving for 92C
if((pDM_Odm->SupportICType == ODM_RTL8192C) &&(pDM_Odm->RFType == ODM_2T2R))
{
odm_1R_CCA(pDM_Odm);
}
// 20100628 Joseph: Turn off BB power save for 88CE because it makesthroughput unstable.
// 20100831 Joseph: Turn ON BB power save again after modifying AGC delay from 900ns ot 600ns.
//1 3.Power Saving for 88C
else
{
ODM_RF_Saving(pDM_Odm, FALSE);
}
#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
}
VOID
odm_1R_CCA(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
pPS_T pDM_PSTable = &pDM_Odm->DM_PSTable;
if(pDM_Odm->RSSI_Min!= 0xFF)
{
if(pDM_PSTable->PreCCAState == CCA_2R)
{
if(pDM_Odm->RSSI_Min >= 35)
pDM_PSTable->CurCCAState = CCA_1R;
else
pDM_PSTable->CurCCAState = CCA_2R;
}
else{
if(pDM_Odm->RSSI_Min <= 30)
pDM_PSTable->CurCCAState = CCA_2R;
else
pDM_PSTable->CurCCAState = CCA_1R;
}
}
else{
pDM_PSTable->CurCCAState=CCA_MAX;
}
if(pDM_PSTable->PreCCAState != pDM_PSTable->CurCCAState)
{
if(pDM_PSTable->CurCCAState == CCA_1R)
{
if( pDM_Odm->RFType ==ODM_2T2R )
{
ODM_SetBBReg(pDM_Odm, 0xc04 , bMaskByte0, 0x13);
//PHY_SetBBReg(pAdapter, 0xe70, bMaskByte3, 0x20);
}
else
{
ODM_SetBBReg(pDM_Odm, 0xc04 , bMaskByte0, 0x23);
//PHY_SetBBReg(pAdapter, 0xe70, 0x7fc00000, 0x10c); // Set RegE70[30:22] = 9b'100001100
}
}
else
{
ODM_SetBBReg(pDM_Odm, 0xc04 , bMaskByte0, 0x33);
//PHY_SetBBReg(pAdapter,0xe70, bMaskByte3, 0x63);
}
pDM_PSTable->PreCCAState = pDM_PSTable->CurCCAState;
}
}
void
ODM_RF_Saving(
IN PVOID pDM_VOID,
IN u1Byte bForceInNormal
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
#if (DM_ODM_SUPPORT_TYPE != ODM_AP)
pPS_T pDM_PSTable = &pDM_Odm->DM_PSTable;
u1Byte Rssi_Up_bound = 30 ;
u1Byte Rssi_Low_bound = 25;
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
if(pDM_Odm->PatchID == 40 ) //RT_CID_819x_FUNAI_TV
{
Rssi_Up_bound = 50 ;
Rssi_Low_bound = 45;
}
#endif
if(pDM_PSTable->initialize == 0){
pDM_PSTable->Reg874 = (ODM_GetBBReg(pDM_Odm, 0x874, bMaskDWord)&0x1CC000)>>14;
pDM_PSTable->RegC70 = (ODM_GetBBReg(pDM_Odm, 0xc70, bMaskDWord)&BIT3)>>3;
pDM_PSTable->Reg85C = (ODM_GetBBReg(pDM_Odm, 0x85c, bMaskDWord)&0xFF000000)>>24;
pDM_PSTable->RegA74 = (ODM_GetBBReg(pDM_Odm, 0xa74, bMaskDWord)&0xF000)>>12;
//Reg818 = PHY_QueryBBReg(pAdapter, 0x818, bMaskDWord);
pDM_PSTable->initialize = 1;
}
if(!bForceInNormal)
{
if(pDM_Odm->RSSI_Min != 0xFF)
{
if(pDM_PSTable->PreRFState == RF_Normal)
{
if(pDM_Odm->RSSI_Min >= Rssi_Up_bound)
pDM_PSTable->CurRFState = RF_Save;
else
pDM_PSTable->CurRFState = RF_Normal;
}
else{
if(pDM_Odm->RSSI_Min <= Rssi_Low_bound)
pDM_PSTable->CurRFState = RF_Normal;
else
pDM_PSTable->CurRFState = RF_Save;
}
}
else
pDM_PSTable->CurRFState=RF_MAX;
}
else
{
pDM_PSTable->CurRFState = RF_Normal;
}
if(pDM_PSTable->PreRFState != pDM_PSTable->CurRFState)
{
if(pDM_PSTable->CurRFState == RF_Save)
{
// <tynli_note> 8723 RSSI report will be wrong. Set 0x874[5]=1 when enter BB power saving mode.
// Suggested by SD3 Yu-Nan. 2011.01.20.
if(pDM_Odm->SupportICType == ODM_RTL8723A)
{
ODM_SetBBReg(pDM_Odm, 0x874 , BIT5, 0x1); //Reg874[5]=1b'1
}
ODM_SetBBReg(pDM_Odm, 0x874 , 0x1C0000, 0x2); //Reg874[20:18]=3'b010
ODM_SetBBReg(pDM_Odm, 0xc70, BIT3, 0); //RegC70[3]=1'b0
ODM_SetBBReg(pDM_Odm, 0x85c, 0xFF000000, 0x63); //Reg85C[31:24]=0x63
ODM_SetBBReg(pDM_Odm, 0x874, 0xC000, 0x2); //Reg874[15:14]=2'b10
ODM_SetBBReg(pDM_Odm, 0xa74, 0xF000, 0x3); //RegA75[7:4]=0x3
ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x0); //Reg818[28]=1'b0
ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x1); //Reg818[28]=1'b1
}
else
{
ODM_SetBBReg(pDM_Odm, 0x874 , 0x1CC000, pDM_PSTable->Reg874);
ODM_SetBBReg(pDM_Odm, 0xc70, BIT3, pDM_PSTable->RegC70);
ODM_SetBBReg(pDM_Odm, 0x85c, 0xFF000000, pDM_PSTable->Reg85C);
ODM_SetBBReg(pDM_Odm, 0xa74, 0xF000, pDM_PSTable->RegA74);
ODM_SetBBReg(pDM_Odm,0x818, BIT28, 0x0);
if(pDM_Odm->SupportICType == ODM_RTL8723A)
{
ODM_SetBBReg(pDM_Odm,0x874 , BIT5, 0x0); //Reg874[5]=1b'0
}
}
pDM_PSTable->PreRFState =pDM_PSTable->CurRFState;
}
#endif
}

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hal/OUTSRC/odm_DynamicBBPowerSaving.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __ODMDYNAMICBBPOWERSAVING_H__
#define __ODMDYNAMICBBPOWERSAVING_H__
typedef struct _Dynamic_Power_Saving_
{
u1Byte PreCCAState;
u1Byte CurCCAState;
u1Byte PreRFState;
u1Byte CurRFState;
int Rssi_val_min;
u1Byte initialize;
u4Byte Reg874,RegC70,Reg85C,RegA74;
}PS_T,*pPS_T;
#define dm_RF_Saving ODM_RF_Saving
void ODM_RF_Saving(
IN PVOID pDM_VOID,
IN u1Byte bForceInNormal
);
VOID
odm_DynamicBBPowerSavingInit(
IN PVOID pDM_VOID
);
VOID
odm_DynamicBBPowerSaving(
IN PVOID pDM_VOID
);
VOID
odm_1R_CCA(
IN PVOID pDM_VOID
);
#endif

882
hal/OUTSRC/odm_DynamicTxPower.c Normal file
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87
hal/OUTSRC/odm_DynamicTxPower.h Normal file
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@ -0,0 +1,87 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __ODMDYNAMICTXPOWER_H__
#define __ODMDYNAMICTXPOWER_H__
#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74
#define TX_POWER_NEAR_FIELD_THRESH_LVL1 67
#define TX_POWER_NEAR_FIELD_THRESH_AP 0x3F
#define TX_POWER_NEAR_FIELD_THRESH_8812 60
#define TxHighPwrLevel_Normal 0
#define TxHighPwrLevel_Level1 1
#define TxHighPwrLevel_Level2 2
#define TxHighPwrLevel_BT1 3
#define TxHighPwrLevel_BT2 4
#define TxHighPwrLevel_15 5
#define TxHighPwrLevel_35 6
#define TxHighPwrLevel_50 7
#define TxHighPwrLevel_70 8
#define TxHighPwrLevel_100 9
VOID
odm_DynamicTxPowerInit(
IN PVOID pDM_VOID
);
VOID
odm_DynamicTxPowerRestorePowerIndex(
IN PVOID pDM_VOID
);
VOID
odm_DynamicTxPowerNIC(
IN PVOID pDM_VOID
);
#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
VOID
odm_DynamicTxPowerSavePowerIndex(
IN PVOID pDM_VOID
);
VOID
odm_DynamicTxPowerWritePowerIndex(
IN PVOID pDM_VOID,
IN u1Byte Value);
VOID
odm_DynamicTxPower_92C(
IN PVOID pDM_VOID
);
VOID
odm_DynamicTxPower_92D(
IN PVOID pDM_VOID
);
#endif
VOID
odm_DynamicTxPower(
IN PVOID pDM_VOID
);
VOID
odm_DynamicTxPowerAP(
IN PVOID pDM_VOID
);
#endif

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hal/OUTSRC/odm_EdcaTurboCheck.c Normal file
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150
hal/OUTSRC/odm_EdcaTurboCheck.h Normal file
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@ -0,0 +1,150 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __ODMEDCATURBOCHECK_H__
#define __ODMEDCATURBOCHECK_H__
typedef struct _EDCA_TURBO_
{
BOOLEAN bCurrentTurboEDCA;
BOOLEAN bIsCurRDLState;
#if(DM_ODM_SUPPORT_TYPE == ODM_CE )
u4Byte prv_traffic_idx; // edca turbo
#endif
}EDCA_T,*pEDCA_T;
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
static u4Byte edca_setting_UL[HT_IOT_PEER_MAX] =
// UNKNOWN REALTEK_90 REALTEK_92SE BROADCOM RALINK ATHEROS CISCO MERU MARVELL 92U_AP SELF_AP(DownLink/Tx)
{ 0x5e4322, 0xa44f, 0x5e4322, 0x5ea32b, 0x5ea422, 0x5ea322, 0x3ea430, 0x5ea42b, 0x5ea44f, 0x5e4322, 0x5e4322};
static u4Byte edca_setting_DL[HT_IOT_PEER_MAX] =
// UNKNOWN REALTEK_90 REALTEK_92SE BROADCOM RALINK ATHEROS CISCO MERU, MARVELL 92U_AP SELF_AP(UpLink/Rx)
{ 0xa44f, 0x5ea44f, 0x5e4322, 0x5ea42b, 0xa44f, 0xa630, 0x5ea630, 0x5ea42b, 0xa44f, 0xa42b, 0xa42b};
static u4Byte edca_setting_DL_GMode[HT_IOT_PEER_MAX] =
// UNKNOWN REALTEK_90 REALTEK_92SE BROADCOM RALINK ATHEROS CISCO MERU, MARVELL 92U_AP SELF_AP
{ 0x4322, 0xa44f, 0x5e4322, 0xa42b, 0x5e4322, 0x4322, 0xa42b, 0x5ea42b, 0xa44f, 0x5e4322, 0x5ea42b};
//============================================================
// EDCA Paramter for AP/ADSL by Mingzhi 2011-11-22
//============================================================
#elif (DM_ODM_SUPPORT_TYPE &ODM_ADSL)
enum qos_prio { BK, BE, VI, VO, VI_AG, VO_AG };
static const struct ParaRecord rtl_ap_EDCA[] =
{
//ACM,AIFSN, ECWmin, ECWmax, TXOplimit
{0, 7, 4, 10, 0}, //BK
{0, 3, 4, 6, 0}, //BE
{0, 1, 3, 4, 188}, //VI
{0, 1, 2, 3, 102}, //VO
{0, 1, 3, 4, 94}, //VI_AG
{0, 1, 2, 3, 47}, //VO_AG
};
static const struct ParaRecord rtl_sta_EDCA[] =
{
//ACM,AIFSN, ECWmin, ECWmax, TXOplimit
{0, 7, 4, 10, 0},
{0, 3, 4, 10, 0},
{0, 2, 3, 4, 188},
{0, 2, 2, 3, 102},
{0, 2, 3, 4, 94},
{0, 2, 2, 3, 47},
};
#endif
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#ifdef WIFI_WMM
VOID
ODM_IotEdcaSwitch(
IN PVOID pDM_VOID,
IN unsigned char enable
);
#endif
BOOLEAN
ODM_ChooseIotMainSTA(
IN PVOID pDM_VOID,
IN PSTA_INFO_T pstat
);
#endif
VOID
odm_EdcaTurboCheck(
IN PVOID pDM_VOID
);
VOID
ODM_EdcaTurboInit(
IN PVOID pDM_VOID
);
#if(DM_ODM_SUPPORT_TYPE==ODM_WIN)
VOID
odm_EdcaTurboCheckMP(
IN PVOID pDM_VOID
);
//check if edca turbo is disabled
BOOLEAN
odm_IsEdcaTurboDisable(
IN PVOID pDM_VOID
);
//choose edca paramter for special IOT case
VOID
ODM_EdcaParaSelByIot(
IN PVOID pDM_VOID,
OUT u4Byte *EDCA_BE_UL,
OUT u4Byte *EDCA_BE_DL
);
//check if it is UL or DL
VOID
odm_EdcaChooseTrafficIdx(
IN PVOID pDM_VOID,
IN u8Byte cur_tx_bytes,
IN u8Byte cur_rx_bytes,
IN BOOLEAN bBiasOnRx,
OUT BOOLEAN *pbIsCurRDLState
);
#elif (DM_ODM_SUPPORT_TYPE==ODM_CE)
VOID
odm_EdcaTurboCheckCE(
IN PVOID pDM_VOID
);
#else
VOID
odm_IotEngine(
IN PVOID pDM_VOID
);
VOID
odm_EdcaParaInit(
IN PVOID pDM_VOID
);
#endif
#endif

297
hal/OUTSRC/odm_HWConfig.c
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8
hal/OUTSRC/odm_HWConfig.h
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@ -24,7 +24,7 @@
/*--------------------------Define -------------------------------------------*/
#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0)
//#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0)
#define AGC_DIFF_CONFIG_MP(ic, band) (ODM_ReadAndConfig_MP_##ic##_AGC_TAB_DIFF(pDM_Odm, Array_MP_##ic##_AGC_TAB_DIFF_##band, \
sizeof(Array_MP_##ic##_AGC_TAB_DIFF_##band)/sizeof(u4Byte)))
#define AGC_DIFF_CONFIG_TC(ic, band) (ODM_ReadAndConfig_TC_##ic##_AGC_TAB_DIFF(pDM_Odm, Array_TC_##ic##_AGC_TAB_DIFF_##band, \
@ -225,6 +225,12 @@ ODM_GetHWImgVersion(
IN PDM_ODM_T pDM_Odm
);
s4Byte
odm_SignalScaleMapping(
IN OUT PDM_ODM_T pDM_Odm,
IN s4Byte CurrSig
);
#endif
#endif

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hal/OUTSRC/odm_NoiseMonitor.c Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
//============================================================
// include files
//============================================================
//#include "Mp_Precomp.h"
#include "odm_precomp.h"
//=================================================
// This function is for inband noise test utility only
// To obtain the inband noise level(dbm), do the following.
// 1. disable DIG and Power Saving
// 2. Set initial gain = 0x1a
// 3. Stop updating idle time pwer report (for driver read)
// - 0x80c[25]
//
//=================================================
#define Valid_Min -35
#define Valid_Max 10
#define ValidCnt 5
s2Byte odm_InbandNoise_Monitor_NSeries(PDM_ODM_T pDM_Odm,u8 bPauseDIG,u8 IGIValue,u32 max_time)
{
u4Byte tmp4b;
u1Byte max_rf_path=0,rf_path;
u1Byte reg_c50, reg_c58,valid_done=0;
struct noise_level noise_data;
u32 start = 0, func_start=0, func_end = 0;
func_start = ODM_GetCurrentTime(pDM_Odm);
pDM_Odm->noise_level.noise_all = 0;
if((pDM_Odm->RFType == ODM_1T2R) ||(pDM_Odm->RFType == ODM_2T2R))
max_rf_path = 2;
else
max_rf_path = 1;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("odm_DebugControlInbandNoise_Nseries() ==> \n"));
ODM_Memory_Set(pDM_Odm,&noise_data,0,sizeof(struct noise_level));
//
// Step 1. Disable DIG && Set initial gain.
//
if(bPauseDIG)
{
odm_PauseDIG(pDM_Odm,ODM_PAUSE_DIG,IGIValue);
}
//
// Step 2. Disable all power save for read registers
//
//dcmd_DebugControlPowerSave(pAdapter, PSDisable);
//
// Step 3. Get noise power level
//
start = ODM_GetCurrentTime(pDM_Odm);
while(1)
{
//Stop updating idle time pwer report (for driver read)
ODM_SetBBReg(pDM_Odm, rFPGA0_TxGainStage, BIT25, 1);
//Read Noise Floor Report
tmp4b = ODM_GetBBReg(pDM_Odm, 0x8f8,bMaskDWord );
ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("Noise Floor Report (0x8f8) = 0x%08x\n", tmp4b));
//ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0, TestInitialGain);
//if(max_rf_path == 2)
// ODM_SetBBReg(pDM_Odm, rOFDM0_XBAGCCore1, bMaskByte0, TestInitialGain);
//update idle time pwer report per 5us
ODM_SetBBReg(pDM_Odm, rFPGA0_TxGainStage, BIT25, 0);
noise_data.value[ODM_RF_PATH_A] = (u1Byte)(tmp4b&0xff);
noise_data.value[ODM_RF_PATH_B] = (u1Byte)((tmp4b&0xff00)>>8);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("value_a = 0x%x(%d), value_b = 0x%x(%d)\n",
noise_data.value[ODM_RF_PATH_A], noise_data.value[ODM_RF_PATH_A], noise_data.value[ODM_RF_PATH_B], noise_data.value[ODM_RF_PATH_B]));
for(rf_path = ODM_RF_PATH_A; rf_path < max_rf_path; rf_path++)
{
noise_data.sval[rf_path] = (s1Byte)noise_data.value[rf_path];
noise_data.sval[rf_path] /= 2;
}
ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("sval_a = %d, sval_b = %d\n",
noise_data.sval[ODM_RF_PATH_A], noise_data.sval[ODM_RF_PATH_B]));
//ODM_delay_ms(10);
//ODM_sleep_ms(10);
for(rf_path = ODM_RF_PATH_A; rf_path < max_rf_path; rf_path++)
{
if( (noise_data.valid_cnt[rf_path] < ValidCnt) && (noise_data.sval[rf_path] < Valid_Max && noise_data.sval[rf_path] >= Valid_Min))
{
noise_data.valid_cnt[rf_path]++;
noise_data.sum[rf_path] += noise_data.sval[rf_path];
ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("RF_Path:%d Valid sval = %d\n", rf_path,noise_data.sval[rf_path]));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("Sum of sval = %d, \n", noise_data.sum[rf_path]));
if(noise_data.valid_cnt[rf_path] == ValidCnt)
{
valid_done++;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("After divided, RF_Path:%d ,sum = %d \n", rf_path,noise_data.sum[rf_path]));
}
}
}
//printk("####### valid_done:%d #############\n",valid_done);
if ((valid_done==max_rf_path) || (ODM_GetProgressingTime(pDM_Odm,start) > max_time))
{
for(rf_path = ODM_RF_PATH_A; rf_path < max_rf_path; rf_path++)
{
//printk("%s PATH_%d - sum = %d, valid_cnt = %d \n",__FUNCTION__,rf_path,noise_data.sum[rf_path], noise_data.valid_cnt[rf_path]);
if(noise_data.valid_cnt[rf_path])
noise_data.sum[rf_path] /= noise_data.valid_cnt[rf_path];
else
noise_data.sum[rf_path] = 0;
}
break;
}
}
reg_c50 = (s4Byte)ODM_GetBBReg(pDM_Odm,rOFDM0_XAAGCCore1,bMaskByte0);
reg_c50 &= ~BIT7;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("0x%x = 0x%02x(%d)\n", rOFDM0_XAAGCCore1, reg_c50, reg_c50));
pDM_Odm->noise_level.noise[ODM_RF_PATH_A] = -110 + reg_c50 + noise_data.sum[ODM_RF_PATH_A];
pDM_Odm->noise_level.noise_all += pDM_Odm->noise_level.noise[ODM_RF_PATH_A];
if(max_rf_path == 2){
reg_c58 = (s4Byte)ODM_GetBBReg(pDM_Odm,rOFDM0_XBAGCCore1,bMaskByte0);
reg_c58 &= ~BIT7;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("0x%x = 0x%02x(%d)\n", rOFDM0_XBAGCCore1, reg_c58, reg_c58));
pDM_Odm->noise_level.noise[ODM_RF_PATH_B] = -110 + reg_c58 + noise_data.sum[ODM_RF_PATH_B];
pDM_Odm->noise_level.noise_all += pDM_Odm->noise_level.noise[ODM_RF_PATH_B];
}
pDM_Odm->noise_level.noise_all /= max_rf_path;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("noise_a = %d, noise_b = %d\n",
pDM_Odm->noise_level.noise[ODM_RF_PATH_A],
pDM_Odm->noise_level.noise[ODM_RF_PATH_B]));
//
// Step 4. Recover the Dig
//
if(bPauseDIG)
{
odm_PauseDIG(pDM_Odm,ODM_RESUME_DIG,IGIValue);
}
func_end = ODM_GetProgressingTime(pDM_Odm,func_start) ;
//printk("%s noise_a = %d, noise_b = %d noise_all:%d (%d ms)\n",__FUNCTION__,
// pDM_Odm->noise_level.noise[ODM_RF_PATH_A],
// pDM_Odm->noise_level.noise[ODM_RF_PATH_B],
// pDM_Odm->noise_level.noise_all,func_end);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("odm_DebugControlInbandNoise_Nseries() <== \n"));
return pDM_Odm->noise_level.noise_all;
}
s2Byte ODM_InbandNoise_Monitor(PVOID pDM_VOID,u8 bPauseDIG,u8 IGIValue,u32 max_time)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES )
{
//odm_InbandNoise_Monitor_JaguarSeries(pDM_Odm,bPauseDIG,IGIValue,max_time);
return 0;
}
else
{
return odm_InbandNoise_Monitor_NSeries(pDM_VOID,bPauseDIG,IGIValue,max_time);
}
}

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
*****************************************************************************/
#ifndef __ODMNOISEMONITOR_H__
#define __ODMNOISEMONITOR_H__
#define ODM_MAX_CHANNEL_NUM 38//14+24
struct noise_level
{
//u1Byte value_a, value_b;
u1Byte value[MAX_RF_PATH];
//s1Byte sval_a, sval_b;
s1Byte sval[MAX_RF_PATH];
//s4Byte noise_a=0, noise_b=0,sum_a=0, sum_b=0;
//s4Byte noise[ODM_RF_PATH_MAX];
s4Byte sum[MAX_RF_PATH];
//u1Byte valid_cnt_a=0, valid_cnt_b=0,
u1Byte valid[MAX_RF_PATH];
u1Byte valid_cnt[MAX_RF_PATH];
};
typedef struct _ODM_NOISE_MONITOR_
{
s1Byte noise[MAX_RF_PATH];
s2Byte noise_all;
}ODM_NOISE_MONITOR;
s2Byte ODM_InbandNoise_Monitor(PVOID pDM_VOID,u8 bPauseDIG,u8 IGIValue,u32 max_time);
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __ODMPATHDIV_H__
#define __ODMPATHDIV_H__
VOID
odm_PathDiversityInit(
IN PVOID pDM_VOID
);
VOID
odm_PathDiversity(
IN PVOID pDM_VOID
);
#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN))
//#define PATHDIV_ENABLE 1
#define dm_PathDiv_RSSI_Check ODM_PathDivChkPerPktRssi
#define PathDivCheckBeforeLink8192C ODM_PathDiversityBeforeLink92C
typedef struct _PathDiv_Parameter_define_
{
u4Byte org_5g_RegE30;
u4Byte org_5g_RegC14;
u4Byte org_5g_RegCA0;
u4Byte swt_5g_RegE30;
u4Byte swt_5g_RegC14;
u4Byte swt_5g_RegCA0;
//for 2G IQK information
u4Byte org_2g_RegC80;
u4Byte org_2g_RegC4C;
u4Byte org_2g_RegC94;
u4Byte org_2g_RegC14;
u4Byte org_2g_RegCA0;
u4Byte swt_2g_RegC80;
u4Byte swt_2g_RegC4C;
u4Byte swt_2g_RegC94;
u4Byte swt_2g_RegC14;
u4Byte swt_2g_RegCA0;
}PATHDIV_PARA,*pPATHDIV_PARA;
VOID
odm_PathDiversityInit_92C(
IN PADAPTER Adapter
);
VOID
odm_2TPathDiversityInit_92C(
IN PADAPTER Adapter
);
VOID
odm_1TPathDiversityInit_92C(
IN PADAPTER Adapter
);
BOOLEAN
odm_IsConnected_92C(
IN PADAPTER Adapter
);
BOOLEAN
ODM_PathDiversityBeforeLink92C(
//IN PADAPTER Adapter
IN PDM_ODM_T pDM_Odm
);
VOID
odm_PathDiversityAfterLink_92C(
IN PADAPTER Adapter
);
VOID
odm_SetRespPath_92C(
IN PADAPTER Adapter,
IN u1Byte DefaultRespPath
);
VOID
odm_OFDMTXPathDiversity_92C(
IN PADAPTER Adapter
);
VOID
odm_CCKTXPathDiversity_92C(
IN PADAPTER Adapter
);
VOID
odm_ResetPathDiversity_92C(
IN PADAPTER Adapter
);
VOID
odm_CCKTXPathDiversityCallback(
PRT_TIMER pTimer
);
VOID
odm_CCKTXPathDiversityWorkItemCallback(
IN PVOID pContext
);
VOID
odm_PathDivChkAntSwitchCallback(
PRT_TIMER pTimer
);
VOID
odm_PathDivChkAntSwitchWorkitemCallback(
IN PVOID pContext
);
VOID
odm_PathDivChkAntSwitch(
PDM_ODM_T pDM_Odm
);
VOID
ODM_CCKPathDiversityChkPerPktRssi(
PADAPTER Adapter,
BOOLEAN bIsDefPort,
BOOLEAN bMatchBSSID,
PRT_WLAN_STA pEntry,
PRT_RFD pRfd,
pu1Byte pDesc
);
VOID
ODM_PathDivChkPerPktRssi(
PADAPTER Adapter,
BOOLEAN bIsDefPort,
BOOLEAN bMatchBSSID,
PRT_WLAN_STA pEntry,
PRT_RFD pRfd
);
VOID
ODM_PathDivRestAfterLink(
IN PDM_ODM_T pDM_Odm
);
VOID
ODM_FillTXPathInTXDESC(
IN PADAPTER Adapter,
IN PRT_TCB pTcb,
IN pu1Byte pDesc
);
VOID
odm_PathDivInit_92D(
IN PDM_ODM_T pDM_Odm
);
u1Byte
odm_SwAntDivSelectScanChnl(
IN PADAPTER Adapter
);
VOID
odm_SwAntDivConstructScanChnl(
IN PADAPTER Adapter,
IN u1Byte ScanChnl
);
#endif //#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN))
#endif //#ifndef __ODMPATHDIV_H__

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __ODMPOWERTRACKING_H__
#define __ODMPOWERTRACKING_H__
#define DPK_DELTA_MAPPING_NUM 13
#define index_mapping_HP_NUM 15
#define OFDM_TABLE_SIZE 43
#define CCK_TABLE_SIZE 33
#define TXSCALE_TABLE_SIZE 37
#define TXPWR_TRACK_TABLE_SIZE 30
#define DELTA_SWINGIDX_SIZE 30
#define BAND_NUM 4
#define AVG_THERMAL_NUM 8
#define HP_THERMAL_NUM 8
#define IQK_MAC_REG_NUM 4
#define IQK_ADDA_REG_NUM 16
#define IQK_BB_REG_NUM_MAX 10
#if (RTL8192D_SUPPORT==1)
#define IQK_BB_REG_NUM 10
#else
#define IQK_BB_REG_NUM 9
#endif
#define IQK_Matrix_REG_NUM 8
#define IQK_Matrix_Settings_NUM 14+24+21 // Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G
extern u4Byte OFDMSwingTable[OFDM_TABLE_SIZE];
extern u1Byte CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8];
extern u1Byte CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8];
extern u4Byte OFDMSwingTable_New[OFDM_TABLE_SIZE];
extern u1Byte CCKSwingTable_Ch1_Ch13_New[CCK_TABLE_SIZE][8];
extern u1Byte CCKSwingTable_Ch14_New [CCK_TABLE_SIZE][8];
extern u4Byte TxScalingTable_Jaguar[TXSCALE_TABLE_SIZE];
// <20121018, Kordan> In case fail to read TxPowerTrack.txt, we use the table of 88E as the default table.
static u1Byte DeltaSwingTableIdx_2GA_P_8188E[] = {0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9};
static u1Byte DeltaSwingTableIdx_2GA_N_8188E[] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 11, 11};
#define dm_CheckTXPowerTracking ODM_TXPowerTrackingCheck
typedef struct _IQK_MATRIX_REGS_SETTING{
BOOLEAN bIQKDone;
s4Byte Value[3][IQK_Matrix_REG_NUM];
BOOLEAN bBWIqkResultSaved[3];
}IQK_MATRIX_REGS_SETTING,*PIQK_MATRIX_REGS_SETTING;
typedef struct ODM_RF_Calibration_Structure
{
//for tx power tracking
u4Byte RegA24; // for TempCCK
s4Byte RegE94;
s4Byte RegE9C;
s4Byte RegEB4;
s4Byte RegEBC;
u1Byte TXPowercount;
BOOLEAN bTXPowerTrackingInit;
BOOLEAN bTXPowerTracking;
u1Byte TxPowerTrackControl; //for mp mode, turn off txpwrtracking as default
u1Byte TM_Trigger;
u1Byte InternalPA5G[2]; //pathA / pathB
u1Byte ThermalMeter[2]; // ThermalMeter, index 0 for RFIC0, and 1 for RFIC1
u1Byte ThermalValue;
u1Byte ThermalValue_LCK;
u1Byte ThermalValue_IQK;
u1Byte ThermalValue_DPK;
u1Byte ThermalValue_AVG[AVG_THERMAL_NUM];
u1Byte ThermalValue_AVG_index;
u1Byte ThermalValue_RxGain;
u1Byte ThermalValue_Crystal;
u1Byte ThermalValue_DPKstore;
u1Byte ThermalValue_DPKtrack;
BOOLEAN TxPowerTrackingInProgress;
BOOLEAN bReloadtxpowerindex;
u1Byte bRfPiEnable;
u4Byte TXPowerTrackingCallbackCnt; //cosa add for debug
//------------------------- Tx power Tracking -------------------------//
u1Byte bCCKinCH14;
u1Byte CCK_index;
u1Byte OFDM_index[MAX_RF_PATH];
s1Byte PowerIndexOffset[MAX_RF_PATH];
s1Byte DeltaPowerIndex[MAX_RF_PATH];
s1Byte DeltaPowerIndexLast[MAX_RF_PATH];
BOOLEAN bTxPowerChanged;
u1Byte ThermalValue_HP[HP_THERMAL_NUM];
u1Byte ThermalValue_HP_index;
IQK_MATRIX_REGS_SETTING IQKMatrixRegSetting[IQK_Matrix_Settings_NUM];
u1Byte Delta_LCK;
s1Byte BBSwingDiff2G, BBSwingDiff5G; // Unit: dB
u1Byte DeltaSwingTableIdx_2GCCKA_P[DELTA_SWINGIDX_SIZE];
u1Byte DeltaSwingTableIdx_2GCCKA_N[DELTA_SWINGIDX_SIZE];
u1Byte DeltaSwingTableIdx_2GCCKB_P[DELTA_SWINGIDX_SIZE];
u1Byte DeltaSwingTableIdx_2GCCKB_N[DELTA_SWINGIDX_SIZE];
u1Byte DeltaSwingTableIdx_2GA_P[DELTA_SWINGIDX_SIZE];
u1Byte DeltaSwingTableIdx_2GA_N[DELTA_SWINGIDX_SIZE];
u1Byte DeltaSwingTableIdx_2GB_P[DELTA_SWINGIDX_SIZE];
u1Byte DeltaSwingTableIdx_2GB_N[DELTA_SWINGIDX_SIZE];
u1Byte DeltaSwingTableIdx_5GA_P[BAND_NUM][DELTA_SWINGIDX_SIZE];
u1Byte DeltaSwingTableIdx_5GA_N[BAND_NUM][DELTA_SWINGIDX_SIZE];
u1Byte DeltaSwingTableIdx_5GB_P[BAND_NUM][DELTA_SWINGIDX_SIZE];
u1Byte DeltaSwingTableIdx_5GB_N[BAND_NUM][DELTA_SWINGIDX_SIZE];
u1Byte DeltaSwingTableIdx_2GA_P_8188E[DELTA_SWINGIDX_SIZE];
u1Byte DeltaSwingTableIdx_2GA_N_8188E[DELTA_SWINGIDX_SIZE];
//--------------------------------------------------------------------//
//for IQK
u4Byte RegC04;
u4Byte Reg874;
u4Byte RegC08;
u4Byte RegB68;
u4Byte RegB6C;
u4Byte Reg870;
u4Byte Reg860;
u4Byte Reg864;
BOOLEAN bIQKInitialized;
BOOLEAN bLCKInProgress;
BOOLEAN bAntennaDetected;
BOOLEAN bNeedIQK;
BOOLEAN bIQKInProgress;
u1Byte Delta_IQK;
u4Byte ADDA_backup[IQK_ADDA_REG_NUM];
u4Byte IQK_MAC_backup[IQK_MAC_REG_NUM];
u4Byte IQK_BB_backup_recover[9];
u4Byte IQK_BB_backup[IQK_BB_REG_NUM];
u4Byte TxIQC_8723B[2][3][2]; // { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}
u4Byte RxIQC_8723B[2][2][2]; // { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}
// <James> IQK time measurement
u8Byte IQK_StartTime;
u8Byte IQK_ProgressingTime;
//for APK
u4Byte APKoutput[2][2]; //path A/B; output1_1a/output1_2a
u1Byte bAPKdone;
u1Byte bAPKThermalMeterIgnore;
// DPK
BOOLEAN bDPKFail;
u1Byte bDPdone;
u1Byte bDPPathAOK;
u1Byte bDPPathBOK;
u4Byte TxLOK[2];
}ODM_RF_CAL_T,*PODM_RF_CAL_T;
VOID
ODM_TXPowerTrackingCheck(
IN PVOID pDM_VOID
);
VOID
odm_TXPowerTrackingInit(
IN PVOID pDM_VOID
);
VOID
odm_TXPowerTrackingCheckAP(
IN PVOID pDM_VOID
);
VOID
odm_TXPowerTrackingThermalMeterInit(
IN PVOID pDM_VOID
);
VOID
odm_TXPowerTrackingInit(
IN PVOID pDM_VOID
);
VOID
odm_TXPowerTrackingCheckMP(
IN PVOID pDM_VOID
);
VOID
odm_TXPowerTrackingCheckCE(
IN PVOID pDM_VOID
);
#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN))
VOID
odm_TXPowerTrackingCallbackThermalMeter92C(
IN PADAPTER Adapter
);
VOID
odm_TXPowerTrackingCallbackRXGainThermalMeter92D(
IN PADAPTER Adapter
);
VOID
odm_TXPowerTrackingCallbackThermalMeter92D(
IN PADAPTER Adapter
);
VOID
odm_TXPowerTrackingDirectCall92C(
IN PADAPTER Adapter
);
VOID
odm_TXPowerTrackingThermalMeterCheck(
IN PADAPTER Adapter
);
#endif
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __ODMRXHP_H__
#define __ODMRXHP_H__
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
#define AFH_PSD 1 //0:normal PSD scan, 1: only do 20 pts PSD
#define MODE_40M 0 //0:20M, 1:40M
#define PSD_TH2 3
#define PSD_CHMIN 20 // Minimum channel number for BT AFH
#define SIR_STEP_SIZE 3
#define Smooth_Size_1 5
#define Smooth_TH_1 3
#define Smooth_Size_2 10
#define Smooth_TH_2 4
#define Smooth_Size_3 20
#define Smooth_TH_3 4
#define Smooth_Step_Size 5
#define Adaptive_SIR 1
#define PSD_RESCAN 4
#define PSD_SCAN_INTERVAL 700 //ms
typedef struct _RX_High_Power_
{
u1Byte RXHP_flag;
u1Byte PSD_func_trigger;
u1Byte PSD_bitmap_RXHP[80];
u1Byte Pre_IGI;
u1Byte Cur_IGI;
u1Byte Pre_pw_th;
u1Byte Cur_pw_th;
BOOLEAN First_time_enter;
BOOLEAN RXHP_enable;
u1Byte TP_Mode;
RT_TIMER PSDTimer;
#if USE_WORKITEM
RT_WORK_ITEM PSDTimeWorkitem;
#endif
}RXHP_T, *pRXHP_T;
#define dm_PSDMonitorCallback odm_PSDMonitorCallback
VOID odm_PSDMonitorCallback(PRT_TIMER pTimer);
VOID
odm_PSDMonitorInit(
IN PVOID pDM_VOID
);
void odm_RXHPInit(
IN PVOID pDM_VOID);
void odm_RXHP(
IN PVOID pDM_VOID);
VOID
odm_PSD_RXHPCallback(
PRT_TIMER pTimer
);
VOID
ODM_PSDDbgControl(
IN PADAPTER Adapter,
IN u4Byte mode,
IN u4Byte btRssi
);
VOID
odm_PSD_RXHPCallback(
PRT_TIMER pTimer
);
VOID
odm_PSD_RXHPWorkitemCallback(
IN PVOID pContext
);
VOID
odm_PSDMonitorWorkItemCallback(
IN PVOID pContext
);
#endif
#endif

1595
hal/OUTSRC/odm_RaInfo.c Normal file
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File diff suppressed because it is too large Load Diff

165
hal/OUTSRC/odm_RaInfo.h Normal file
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@ -0,0 +1,165 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __ODMRAINFO_H__
#define __ODMRAINFO_H__
#define AP_InitRateAdaptiveState ODM_RateAdaptiveStateApInit
#define DM_RATR_STA_INIT 0
#define DM_RATR_STA_HIGH 1
#define DM_RATR_STA_MIDDLE 2
#define DM_RATR_STA_LOW 3
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#define DM_RATR_STA_ULTRA_LOW 4
#endif
#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
typedef struct _Rate_Adaptive_Table_{
u1Byte firstconnect;
#if(DM_ODM_SUPPORT_TYPE==ODM_WIN)
BOOLEAN PT_collision_pre;
#endif
}RA_T, *pRA_T;
#endif
typedef struct _ODM_RATE_ADAPTIVE
{
u1Byte Type; // DM_Type_ByFW/DM_Type_ByDriver
u1Byte HighRSSIThresh; // if RSSI > HighRSSIThresh => RATRState is DM_RATR_STA_HIGH
u1Byte LowRSSIThresh; // if RSSI <= LowRSSIThresh => RATRState is DM_RATR_STA_LOW
u1Byte RATRState; // Current RSSI level, DM_RATR_STA_HIGH/DM_RATR_STA_MIDDLE/DM_RATR_STA_LOW
#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
u1Byte LdpcThres; // if RSSI > LdpcThres => switch from LPDC to BCC
BOOLEAN bLowerRtsRate;
#endif
#if(DM_ODM_SUPPORT_TYPE & ODM_WIN)
u1Byte RtsThres;
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
BOOLEAN bUseLdpc;
#else
u1Byte UltraLowRSSIThresh;
u4Byte LastRATR; // RATR Register Content
#endif
} ODM_RATE_ADAPTIVE, *PODM_RATE_ADAPTIVE;
VOID
odm_RSSIMonitorInit(
IN PVOID pDM_VOID
);
VOID
odm_RSSIMonitorCheck(
IN PVOID pDM_VOID
);
#if(DM_ODM_SUPPORT_TYPE==ODM_WIN)
VOID
odm_RSSIDumpToRegister(
IN PVOID pDM_VOID
);
#endif
VOID
odm_RSSIMonitorCheckMP(
IN PVOID pDM_VOID
);
VOID
odm_RSSIMonitorCheckCE(
IN PVOID pDM_VOID
);
VOID
odm_RSSIMonitorCheckAP(
IN PVOID pDM_VOID
);
VOID
odm_RateAdaptiveMaskInit(
IN PVOID pDM_VOID
);
VOID
odm_RefreshRateAdaptiveMask(
IN PVOID pDM_VOID
);
VOID
odm_RefreshRateAdaptiveMaskMP(
IN PVOID pDM_VOID
);
VOID
odm_RefreshRateAdaptiveMaskCE(
IN PVOID pDM_VOID
);
VOID
odm_RefreshRateAdaptiveMaskAPADSL(
IN PVOID pDM_VOID
);
BOOLEAN
ODM_RAStateCheck(
IN PVOID pDM_VOID,
IN s4Byte RSSI,
IN BOOLEAN bForceUpdate,
OUT pu1Byte pRATRState
);
VOID
odm_RefreshBasicRateMask(
IN PVOID pDM_VOID
);
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
VOID
ODM_DynamicARFBSelect(
IN PVOID pDM_VOID,
IN u1Byte rate,
IN BOOLEAN Collision_State
);
VOID
ODM_RateAdaptiveStateApInit(
IN PVOID PADAPTER_VOID,
IN PRT_WLAN_STA pEntry
);
#endif
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
u4Byte
ODM_Get_Rate_Bitmap(
IN PVOID pDM_VOID,
IN u4Byte macid,
IN u4Byte ra_mask,
IN u1Byte rssi_level
);
#endif
#endif //#ifndef __ODMRAINFO_H__

21
hal/OUTSRC/odm_RegDefine11AC.h
View File

@ -29,19 +29,37 @@
//PAGE 8
#define ODM_REG_CCK_RPT_FORMAT_11AC 0x804
#define ODM_REG_BB_RX_PATH_11AC 0x808
#define ODM_REG_BB_ATC_11AC 0x860
#define ODM_REG_DBG_RPT_11AC 0x8fc
//PAGE 9
#define ODM_REG_OFDM_FA_RST_11AC 0x9A4
#define ODM_REG_NHM_TIMER_11AC 0x990
#define ODM_REG_NHM_TH9_TH10_11AC 0x994
#define ODM_REG_NHM_TH3_TO_TH0_11AC 0x998
#define ODM_REG_NHM_TH7_TO_TH4_11AC 0x99c
#define ODM_REG_NHM_TH8_11AC 0x9a0
#define ODM_REG_NHM_9E8_11AC 0x9e8
//PAGE A
#define ODM_REG_CCK_CCA_11AC 0xA0A
#define ODM_REG_CCK_FA_RST_11AC 0xA2C
#define ODM_REG_CCK_FA_11AC 0xA5C
//PAGE B
#define ODM_REG_RST_RPT_11AC 0xB58
//PAGE C
#define ODM_REG_TRMUX_11AC 0xC08
#define ODM_REG_IGI_A_11AC 0xC50
//PAGE E
#define ODM_REG_IGI_B_11AC 0xE50
#define ODM_REG_TRMUX_11AC_B 0xE08
//PAGE F
#define ODM_REG_CCK_CCA_CNT_11AC 0xF08
#define ODM_REG_OFDM_FA_11AC 0xF48
#define ODM_REG_RPT_11AC 0xfa0
#define ODM_REG_NHM_CNT_11AC 0xfa8
//PAGE 18
#define ODM_REG_IGI_C_11AC 0x1850
//PAGE 1A
#define ODM_REG_IGI_D_11AC 0x1A50
//2 MAC REG LIST
#define ODM_REG_RESP_TX_11AC 0x6D8
@ -52,6 +70,7 @@
#define ODM_BIT_IGI_11AC 0xFFFFFFFF
#define ODM_BIT_CCK_RPT_FORMAT_11AC BIT16
#define ODM_BIT_BB_RX_PATH_11AC 0xF
#define ODM_BIT_BB_ATC_11AC BIT14
#endif

37
hal/OUTSRC/odm_RegDefine11N.h
View File

@ -44,20 +44,28 @@
#define ODM_REG_RF_PIN_11N 0x804
#define ODM_REG_PSD_CTRL_11N 0x808
#define ODM_REG_TX_ANT_CTRL_11N 0x80C
#define ODM_REG_BB_PWR_SAV5_11N 0x818
#define ODM_REG_BB_PWR_SAV5_11N 0x818
#define ODM_REG_CCK_RPT_FORMAT_11N 0x824
#define ODM_REG_CCK_RPT_FORMAT_11N_B 0x82C
#define ODM_REG_RX_DEFUALT_A_11N 0x858
#define ODM_REG_RX_DEFUALT_B_11N 0x85A
#define ODM_REG_BB_PWR_SAV3_11N 0x85C
#define ODM_REG_BB_PWR_SAV3_11N 0x85C
#define ODM_REG_ANTSEL_CTRL_11N 0x860
#define ODM_REG_RX_ANT_CTRL_11N 0x864
#define ODM_REG_PIN_CTRL_11N 0x870
#define ODM_REG_BB_PWR_SAV1_11N 0x874
#define ODM_REG_BB_PWR_SAV1_11N 0x874
#define ODM_REG_ANTSEL_PATH_11N 0x878
#define ODM_REG_BB_3WIRE_11N 0x88C
#define ODM_REG_SC_CNT_11N 0x8C4
#define ODM_REG_PSD_DATA_11N 0x8B4
#define ODM_REG_PSD_DATA_11N 0x8B4
#define ODM_REG_PSD_DATA_11N 0x8B4
#define ODM_REG_NHM_TIMER_11N 0x894
#define ODM_REG_NHM_TH9_TH10_11N 0x890
#define ODM_REG_NHM_TH3_TO_TH0_11N 0x898
#define ODM_REG_NHM_TH7_TO_TH4_11N 0x89c
#define ODM_REG_NHM_CNT_11N 0x8d8
//PAGE 9
#define ODM_REG_DBG_RPT_11N 0x908
#define ODM_REG_ANT_MAPPING1_11N 0x914
#define ODM_REG_ANT_MAPPING2_11N 0x918
//PAGE A
@ -78,7 +86,7 @@
#define ODM_REG_CCK_FA_MSB_11N 0xA58
#define ODM_REG_CCK_FA_LSB_11N 0xA5C
#define ODM_REG_CCK_CCA_CNT_11N 0xA60
#define ODM_REG_BB_PWR_SAV4_11N 0xA74
#define ODM_REG_BB_PWR_SAV4_11N 0xA74
//PAGE B
#define ODM_REG_LNA_SWITCH_11N 0xB2C
#define ODM_REG_PATH_SWITCH_11N 0xB30
@ -90,9 +98,9 @@
#define ODM_REG_BB_RX_PATH_11N 0xC04
#define ODM_REG_TRMUX_11N 0xC08
#define ODM_REG_OFDM_FA_RSTC_11N 0xC0C
#define ODM_REG_RXIQI_MATRIX_11N 0xC14
#define ODM_REG_RXIQI_MATRIX_11N 0xC14
#define ODM_REG_TXIQK_MATRIX_LSB1_11N 0xC4C
#define ODM_REG_IGI_A_11N 0xC50
#define ODM_REG_IGI_A_11N 0xC50
#define ODM_REG_ANTDIV_PARA2_11N 0xC54
#define ODM_REG_IGI_B_11N 0xC58
#define ODM_REG_ANTDIV_PARA3_11N 0xC5C
@ -108,9 +116,11 @@
#define ODM_REG_OFDM_FA_TYPE1_11N 0xCF0
//PAGE D
#define ODM_REG_OFDM_FA_RSTD_11N 0xD00
#define ODM_REG_BB_ATC_11N 0xD2C
#define ODM_REG_OFDM_FA_TYPE2_11N 0xDA0
#define ODM_REG_OFDM_FA_TYPE3_11N 0xDA4
#define ODM_REG_OFDM_FA_TYPE4_11N 0xDA8
#define ODM_REG_RPT_11N 0xDF4
//PAGE E
#define ODM_REG_TXAGC_A_6_18_11N 0xE00
#define ODM_REG_TXAGC_A_24_54_11N 0xE04
@ -143,12 +153,8 @@
#define ODM_REG_STANDBY_11N 0xEDC
#define ODM_REG_SLEEP_11N 0xEE0
#define ODM_REG_PMPD_ANAEN_11N 0xEEC
#define ODM_REG_IGI_C_11N 0xF84
#define ODM_REG_IGI_D_11N 0xF88
//2 MAC REG LIST
#define ODM_REG_BB_RST_11N 0x02
@ -161,14 +167,15 @@
#define ODM_REG_EDCA_BK_11N 0x50C
#define ODM_REG_TXPAUSE_11N 0x522
#define ODM_REG_RESP_TX_11N 0x6D8
#define ODM_REG_ANT_TRAIN_PARA1_11N 0x7b0
#define ODM_REG_ANT_TRAIN_PARA2_11N 0x7b4
#define ODM_REG_ANT_TRAIN_PARA1_11N 0x7b0
#define ODM_REG_ANT_TRAIN_PARA2_11N 0x7b4
//DIG Related
#define ODM_BIT_IGI_11N 0x0000007F
#define ODM_BIT_CCK_RPT_FORMAT_11N BIT9
#define ODM_BIT_BB_RX_PATH_11N 0xF
#define ODM_BIT_BB_ATC_11N BIT11
#endif

1153
hal/OUTSRC/odm_debug.c
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771
hal/OUTSRC/odm_debug.h
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File diff suppressed because it is too large Load Diff

229
hal/OUTSRC/odm_interface.c
View File

@ -22,7 +22,7 @@
// include files
//============================================================
#include "Mp_Precomp.h"
#include "odm_precomp.h"
//
@ -177,12 +177,9 @@ ODM_GetMACReg(
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
return PHY_QueryMacReg(pDM_Odm->priv, RegAddr, BitMask);
#elif(DM_ODM_SUPPORT_TYPE & (ODM_WIN))
PADAPTER Adapter = pDM_Odm->Adapter;
return PHY_QueryMacReg(Adapter, RegAddr, BitMask);
#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE))
return PHY_QueryBBReg(pDM_Odm->Adapter, RegAddr, BitMask);
return PHY_QueryBBReg(pDM_Odm->priv, RegAddr, BitMask);
#elif(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
return PHY_QueryMacReg(pDM_Odm->Adapter, RegAddr, BitMask);
#endif
}
@ -304,7 +301,7 @@ ODM_MoveMemory(
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
memcpy(pDest, pSrc, Length);
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE )
_rtw_memcpy(pDest, pSrc, Length);
#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN)
@ -312,6 +309,20 @@ ODM_MoveMemory(
#endif
}
void ODM_Memory_Set
(IN PDM_ODM_T pDM_Odm,
IN PVOID pbuf,
IN s1Byte value,
IN u4Byte length)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE )
_rtw_memset(pbuf,value, length);
#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN)
PlatformFillMemory(pbuf,length,value);
#endif
}
s4Byte ODM_CompareMemory(
IN PDM_ODM_T pDM_Odm,
IN PVOID pBuf1,
@ -342,7 +353,8 @@ ODM_AcquireSpinLock(
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
PADAPTER Adapter = pDM_Odm->Adapter;
rtw_odm_acquirespinlock(Adapter, type);
#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN)
PADAPTER Adapter = pDM_Odm->Adapter;
PlatformAcquireSpinLock(Adapter, type);
@ -357,7 +369,8 @@ ODM_ReleaseSpinLock(
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE )
PADAPTER Adapter = pDM_Odm->Adapter;
rtw_odm_releasespinlock(Adapter, type);
#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN)
PADAPTER Adapter = pDM_Odm->Adapter;
PlatformReleaseSpinLock(Adapter, type);
@ -534,7 +547,7 @@ ODM_SetTimer(
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
mod_timer(pTimer, jiffies + (msDelay+9)/10);
mod_timer(pTimer, jiffies + RTL_MILISECONDS_TO_JIFFIES(msDelay));
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
_set_timer(pTimer,msDelay ); //ms
#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN)
@ -554,9 +567,10 @@ ODM_InitializeTimer(
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
init_timer(pTimer);
pTimer->function = CallBackFunc;
pTimer->data = (unsigned long)pDM_Odm;
init_timer(pTimer);
mod_timer(pTimer, jiffies+RTL_MILISECONDS_TO_JIFFIES(10));
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
PADAPTER Adapter = pDM_Odm->Adapter;
_init_timer(pTimer,Adapter->pnetdev,CallBackFunc,pDM_Odm);
@ -614,81 +628,152 @@ ODM_ReleaseTimer(
//
// ODM FW relative API.
//
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
VOID
ODM_FillH2CCmd(
IN PADAPTER Adapter,
IN u1Byte ElementID,
IN u4Byte CmdLen,
IN pu1Byte pCmdBuffer
IN PDM_ODM_T pDM_Odm,
IN u1Byte ElementID,
IN u4Byte CmdLen,
IN pu1Byte pCmdBuffer
)
{
if(IS_HARDWARE_TYPE_JAGUAR(Adapter))
{
switch(ElementID)
{
case ODM_H2C_RSSI_REPORT:
FillH2CCmd8812(Adapter, H2C_8812_RSSI_REPORT, CmdLen, pCmdBuffer);
break;
default:
break;
}
PADAPTER Adapter = pDM_Odm->Adapter;
}
else if(IS_HARDWARE_TYPE_8192E(Adapter))
if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES)
{
switch(ElementID)
{
case ODM_H2C_RSSI_REPORT:
FillH2CCmd8812(Adapter, H2C_8812_RSSI_REPORT, CmdLen, pCmdBuffer);
break;
default:
break;
}
}
else if(IS_HARDWARE_TYPE_8723B(Adapter))
{
//
// <Roger_TODO> We should take RTL8723B into consideration, 2012.10.08
//
switch(ElementID)
{
case ODM_H2C_RSSI_REPORT:
FillH2CCmd8723B(Adapter, H2C_8723B_RSSI_REPORT, CmdLen, pCmdBuffer);
break;
#if(DM_ODM_SUPPORT_TYPE & ODM_WIN)
FillH2CCmd8812(Adapter, H2C_8812_RSSI_REPORT, CmdLen, pCmdBuffer);
#else
#if((RTL8812A_SUPPORT==1) ||(RTL8821A_SUPPORT==1))
FillH2CCmd_8812(Adapter, H2C_8812_RSSI_REPORT, CmdLen, pCmdBuffer);
#endif
#endif
break;
case ODM_H2C_IQ_CALIBRATION:
#if(DM_ODM_SUPPORT_TYPE & ODM_WIN)
FillH2CCmd8812(Adapter, H2C_8812_IQ_CALIBRATION, CmdLen, pCmdBuffer);
#else
#if((RTL8812A_SUPPORT==1) ||(RTL8821A_SUPPORT==1))
FillH2CCmd_8812(Adapter, H2C_8812_IQ_CALIBRATION, CmdLen, pCmdBuffer);
#endif
#endif
break;
default:
break;
break;
}
}
else if(IS_HARDWARE_TYPE_8188E(Adapter))
else if(pDM_Odm->SupportICType == ODM_RTL8192E)
{
switch(ElementID)
{
case ODM_H2C_PSD_RESULT:
FillH2CCmd88E(Adapter, H2C_88E_PSD_RESULT, CmdLen, pCmdBuffer);
break;
case ODM_H2C_RSSI_REPORT:
if(IS_VENDOR_8188E_I_CUT_SERIES(Adapter))
FillH2CCmd88E(Adapter, H2C_88E_RSSI_REPORT, CmdLen, pCmdBuffer);
break;
default:
break;
case ODM_H2C_RSSI_REPORT:
#if(DM_ODM_SUPPORT_TYPE & ODM_WIN)
FillH2CCmd8812(Adapter, H2C_8812_RSSI_REPORT, CmdLen, pCmdBuffer);
#else
#if(RTL8192E_SUPPORT==1)
FillH2CCmd_8192E(Adapter, H2C_8192E_RSSI_REPORT, CmdLen, pCmdBuffer);
#endif
#endif
break;
default:
break;
}
}
else if(pDM_Odm->SupportICType == ODM_RTL8723B)
{
switch(ElementID)
{
case ODM_H2C_RSSI_REPORT:
#if(DM_ODM_SUPPORT_TYPE & ODM_WIN)
FillH2CCmd8723B(Adapter, H2C_8723B_RSSI_REPORT, CmdLen, pCmdBuffer);
#else
#if(RTL8723B_SUPPORT==1)
FillH2CCmd8723B(Adapter, H2C_8723B_RSSI_SETTING, CmdLen, pCmdBuffer);
#endif
#endif
break;
case ODM_H2C_WIFI_CALIBRATION:
#if(DM_ODM_SUPPORT_TYPE & ODM_WIN)
FillH2CCmd8723B(Adapter, H2C_8723B_WIFI_CALIBRATION, CmdLen, pCmdBuffer);
#else
#if(RTL8723B_SUPPORT==1)
FillH2CCmd8723B(Adapter, H2C_8723B_BT_WLAN_CALIBRATION, CmdLen, pCmdBuffer);
#endif
#endif
break;
default:
break;
}
}
else if(pDM_Odm->SupportICType == ODM_RTL8188E)
{
switch(ElementID)
{
case ODM_H2C_RSSI_REPORT:
//if((pDM_Odm->CutVersion == ODM_CUT_I) && (!pDM_Odm->RaSupport88E)){
if(!pDM_Odm->RaSupport88E){
#if(DM_ODM_SUPPORT_TYPE & ODM_WIN)
FillH2CCmd88E(Adapter, H2C_88E_RSSI_REPORT, CmdLen, pCmdBuffer);
#else
#if(RTL8188E_SUPPORT==1)
FillH2CCmd_88E(Adapter, H2C_RSSI_REPORT, CmdLen, pCmdBuffer);
#endif
#endif
}
break;
default:
break;
}
}
#if(DM_ODM_SUPPORT_TYPE & ODM_CE)
else if(pDM_Odm->SupportICType == ODM_RTL8723A)
{
switch(ElementID)
{
case ODM_H2C_RSSI_REPORT:
#if(RTL8723A_SUPPORT==1)
FillH2CCmd(Adapter, RSSI_SETTING_EID, CmdLen, pCmdBuffer);
#endif
break;
default:
break;
}
}
else if(pDM_Odm->SupportICType == ODM_RTL8192D)
{
switch(ElementID)
{
case ODM_H2C_RSSI_REPORT:
#if(RTL8192D_SUPPORT==1)
FillH2CCmd92D(Adapter, H2C_RSSI_REPORT, CmdLen, pCmdBuffer);
#endif
break;
default:
break;
}
}
#endif
else
{
switch(ElementID)
{
case ODM_H2C_RSSI_REPORT:
FillH2CCmd92C(Adapter, H2C_RSSI_REPORT, CmdLen, pCmdBuffer);
break;
case ODM_H2C_PSD_RESULT:
FillH2CCmd92C(Adapter, H2C_92C_PSD_RESULT, CmdLen, pCmdBuffer);
break;
default:
break;
case ODM_H2C_RSSI_REPORT:
#if(DM_ODM_SUPPORT_TYPE & ODM_WIN)
FillH2CCmd92C(Adapter, H2C_RSSI_REPORT, CmdLen, pCmdBuffer);
#else
#if(RTL8192C_SUPPORT==1)
rtl8192c_FillH2CCmd(Adapter, RSSI_SETTING_EID, CmdLen, pCmdBuffer);
#endif
#endif
break;
default:
break;
}
}
}
@ -718,7 +803,7 @@ ODM_FillH2CCmd(
#endif
u4Byte
u8Byte
ODM_GetCurrentTime(
IN PDM_ODM_T pDM_Odm
)
@ -726,24 +811,24 @@ ODM_GetCurrentTime(
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
return 0;
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
return rtw_get_current_time();
return (u8Byte)rtw_get_current_time();
#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN)
return 0;
return PlatformGetCurrentTime();
#endif
}
s4Byte
u8Byte
ODM_GetProgressingTime(
IN PDM_ODM_T pDM_Odm,
IN u4Byte Start_Time
IN u8Byte Start_Time
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
return 0;
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
return rtw_get_passing_time_ms(Start_Time);
return rtw_get_passing_time_ms((u4Byte)Start_Time);
#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN)
return 0;
return (PlatformGetCurrentTime() - Start_Time)>>10;
#endif
}

64
hal/OUTSRC/odm_interface.h
View File

@ -60,36 +60,50 @@ ODM_REG(DIG,_pDM_Odm)
#define _bit_11N(_name) ODM_BIT_##_name##_11N
#define _bit_11AC(_name) ODM_BIT_##_name##_11AC
#if 1 //TODO: enable it if we need to support run-time to differentiate between 92C_SERIES and JAGUAR_SERIES.
#ifdef __ECOS
#define _rtk_cat(_name, _ic_type, _func) \
( \
((_ic_type) & ODM_IC_11N_SERIES)? _func##_11N(_name): \
_func##_11AC(_name) \
)
#else
#define _cat(_name, _ic_type, _func) \
( \
((_ic_type) & ODM_IC_11N_SERIES)? _func##_11N(_name): \
_func##_11AC(_name) \
)
#endif
#if 0 // only sample code
#define _cat(_name, _ic_type, _func) \
( \
((_ic_type) & ODM_RTL8192C)? _func##_ic(_name, _8192C): \
((_ic_type) & ODM_RTL8192D)? _func##_ic(_name, _8192D): \
((_ic_type) & ODM_RTL8192S)? _func##_ic(_name, _8192S): \
((_ic_type) & ODM_RTL8723A)? _func##_ic(_name, _8723A): \
((_ic_type) & ODM_RTL8188E)? _func##_ic(_name, _8188E): \
_func##_ic(_name, _8195) \
)
#endif
/*
// only sample code
//#define _cat(_name, _ic_type, _func) \
// ( \
// ((_ic_type) & ODM_RTL8192C)? _func##_ic(_name, _8192C): \
// ((_ic_type) & ODM_RTL8192D)? _func##_ic(_name, _8192D): \
// ((_ic_type) & ODM_RTL8192S)? _func##_ic(_name, _8192S): \
// ((_ic_type) & ODM_RTL8723A)? _func##_ic(_name, _8723A): \
// ((_ic_type) & ODM_RTL8188E)? _func##_ic(_name, _8188E): \
// _func##_ic(_name, _8195) \
// )
*/
// _name: name of register or bit.
// Example: "ODM_REG(R_A_AGC_CORE1, pDM_Odm)"
// gets "ODM_R_A_AGC_CORE1" or "ODM_R_A_AGC_CORE1_8192C", depends on SupportICType.
#ifdef __ECOS
#define ODM_REG(_name, _pDM_Odm) _rtk_cat(_name, _pDM_Odm->SupportICType, _reg)
#define ODM_BIT(_name, _pDM_Odm) _rtk_cat(_name, _pDM_Odm->SupportICType, _bit)
#else
#define ODM_REG(_name, _pDM_Odm) _cat(_name, _pDM_Odm->SupportICType, _reg)
#define ODM_BIT(_name, _pDM_Odm) _cat(_name, _pDM_Odm->SupportICType, _bit)
#endif
typedef enum _ODM_H2C_CMD
{
ODM_H2C_RSSI_REPORT = 0,
ODM_H2C_PSD_RESULT=1,
ODM_H2C_PathDiv = 2,
ODM_H2C_PathDiv = 2,
ODM_H2C_WIFI_CALIBRATION = 3,
ODM_H2C_IQ_CALIBRATION = 4,
ODM_MAX_H2CCMD
}ODM_H2C_CMD;
@ -251,6 +265,12 @@ s4Byte ODM_CompareMemory(
IN PVOID pBuf2,
IN u4Byte length
);
void ODM_Memory_Set
(IN PDM_ODM_T pDM_Odm,
IN PVOID pbuf,
IN s1Byte value,
IN u4Byte length);
//
// ODM MISC-spin lock relative API.
@ -359,13 +379,13 @@ ODM_ReleaseTimer(
//
// ODM FW relative API.
//
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
VOID
ODM_FillH2CCmd(
IN PADAPTER Adapter,
IN u1Byte ElementID,
IN u4Byte CmdLen,
IN pu1Byte pCmdBuffer
IN PDM_ODM_T pDM_Odm,
IN u1Byte ElementID,
IN u4Byte CmdLen,
IN pu1Byte pCmdBuffer
);
#else
u4Byte
@ -380,14 +400,14 @@ ODM_FillH2CCmd(
);
#endif
u4Byte
u8Byte
ODM_GetCurrentTime(
IN PDM_ODM_T pDM_Odm
);
s4Byte
u8Byte
ODM_GetProgressingTime(
IN PDM_ODM_T pDM_Odm,
IN u4Byte Start_Time
IN u8Byte Start_Time
);
#endif // __ODM_INTERFACE_H__

30
hal/OUTSRC/odm_precomp.h
View File

@ -145,6 +145,22 @@
#include "odm_RegDefine11AC.h"
#include "odm_RegDefine11N.h"
#include "odm_AntDiv.h"
#include "odm_EdcaTurboCheck.h"
#include "odm_DIG.h"
#include "odm_PathDiv.h"
#include "odm_DynamicBBPowerSaving.h"
#include "odm_PowerTracking.h"
#include "odm_RaInfo.h"
#include "odm_DynamicTxPower.h"
#include "odm_CfoTracking.h"
#include "odm_ACS.h"
#include "odm_PowerTracking.h"
#include "odm_NoiseMonitor.h"
#include "PhyDM_Adaptivity.h"
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
#include "odm_RXHP.h"
#endif
#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
#if (RTL8192C_SUPPORT==1)
@ -197,7 +213,8 @@
#if (RTL8821A_SUPPORT==1)
#include "rtl8821a/HalPhyRf_8821A.h"//for IQK,LCK,Power-tracking
#include "rtl8812a/HalPhyRf_8812A.h"//for IQK,LCK,Power-tracking
#include "rtl8812a_hal.h"
#include "rtl8812a_hal.h"
#include "rtl8821a/PhyDM_IQK_8821A.h"
#endif
#if (RTL8723B_SUPPORT==1)
@ -280,11 +297,6 @@
#include "rtl8812a/HalHWImg8812A_FW.h"
#include "rtl8812a/odm_RegConfig8812A.h"
#include "rtl8812a/odm_RTL8812A.h"
#if (TESTCHIP_SUPPORT == 1)
#include "rtl8812a/HalHWImg8812A_TestChip_MAC.h"
#include "rtl8812a/HalHWImg8812A_TestChip_RF.h"
#include "rtl8812a/HalHWImg8812A_TestChip_BB.h"
#endif
#endif
@ -295,12 +307,6 @@
#include "rtl8821a/HalHWImg8821A_FW.h"
#include "rtl8821a/odm_RegConfig8821A.h"
#include "rtl8821a/odm_RTL8821A.h"
#if (TESTCHIP_SUPPORT == 1)
#include "rtl8821a/HalHWImg8821A_TestChip_MAC.h"
#include "rtl8821a/HalHWImg8821A_TestChip_RF.h"
#include "rtl8821a/HalHWImg8821A_TestChip_BB.h"
#include "rtl8821a/HalHWImg8821A_TestChip_FW.h"
#endif
#endif
#endif // __ODM_PRECOMP_H__

86
hal/OUTSRC/odm_reg.h
View File

@ -49,6 +49,7 @@
#define ODM_FPGA_PHY0_PAGE8 0x800
#define ODM_PSD_SETTING 0x808
#define ODM_AFE_SETTING 0x818
#define ODM_TXAGC_B_6_18 0x830
#define ODM_TXAGC_B_24_54 0x834
#define ODM_TXAGC_B_MCS32_5 0x838
#define ODM_TXAGC_B_MCS0_MCS3 0x83c
@ -98,6 +99,11 @@
//RF REG
#define ODM_GAIN_SETTING 0x00
#define ODM_CHANNEL 0x18
#define ODM_RF_T_METER 0x24
#define ODM_RF_T_METER_92D 0x42
#define ODM_RF_T_METER_88E 0x42
#define ODM_RF_T_METER_92E 0x42
#define ODM_RF_T_METER_8812 0x42
//Ant Detect Reg
#define ODM_DPDT 0x300
@ -113,6 +119,86 @@
//
// Bitmap Definition
//
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP))
// TX AGC
#define rTxAGC_A_CCK11_CCK1_JAguar 0xc20
#define rTxAGC_A_Ofdm18_Ofdm6_JAguar 0xc24
#define rTxAGC_A_Ofdm54_Ofdm24_JAguar 0xc28
#define rTxAGC_A_MCS3_MCS0_JAguar 0xc2c
#define rTxAGC_A_MCS7_MCS4_JAguar 0xc30
#define rTxAGC_A_MCS11_MCS8_JAguar 0xc34
#define rTxAGC_A_MCS15_MCS12_JAguar 0xc38
#define rTxAGC_A_Nss1Index3_Nss1Index0_JAguar 0xc3c
#define rTxAGC_A_Nss1Index7_Nss1Index4_JAguar 0xc40
#define rTxAGC_A_Nss2Index1_Nss1Index8_JAguar 0xc44
#define rTxAGC_A_Nss2Index5_Nss2Index2_JAguar 0xc48
#define rTxAGC_A_Nss2Index9_Nss2Index6_JAguar 0xc4c
#if defined(CONFIG_WLAN_HAL_8814AE)
#define rTxAGC_A_MCS19_MCS16_JAguar 0xcd8
#define rTxAGC_A_MCS23_MCS20_JAguar 0xcdc
#define rTxAGC_A_Nss3Index3_Nss3Index0_JAguar 0xce0
#define rTxAGC_A_Nss3Index7_Nss3Index4_JAguar 0xce4
#define rTxAGC_A_Nss3Index9_Nss3Index8_JAguar 0xce8
#endif
#define rTxAGC_B_CCK11_CCK1_JAguar 0xe20
#define rTxAGC_B_Ofdm18_Ofdm6_JAguar 0xe24
#define rTxAGC_B_Ofdm54_Ofdm24_JAguar 0xe28
#define rTxAGC_B_MCS3_MCS0_JAguar 0xe2c
#define rTxAGC_B_MCS7_MCS4_JAguar 0xe30
#define rTxAGC_B_MCS11_MCS8_JAguar 0xe34
#define rTxAGC_B_MCS15_MCS12_JAguar 0xe38
#define rTxAGC_B_Nss1Index3_Nss1Index0_JAguar 0xe3c
#define rTxAGC_B_Nss1Index7_Nss1Index4_JAguar 0xe40
#define rTxAGC_B_Nss2Index1_Nss1Index8_JAguar 0xe44
#define rTxAGC_B_Nss2Index5_Nss2Index2_JAguar 0xe48
#define rTxAGC_B_Nss2Index9_Nss2Index6_JAguar 0xe4c
#if defined(CONFIG_WLAN_HAL_8814AE)
#define rTxAGC_B_MCS19_MCS16_JAguar 0xed8
#define rTxAGC_B_MCS23_MCS20_JAguar 0xedc
#define rTxAGC_B_Nss3Index3_Nss3Index0_JAguar 0xee0
#define rTxAGC_B_Nss3Index7_Nss3Index4_JAguar 0xee4
#define rTxAGC_B_Nss3Index9_Nss3Index8_JAguar 0xee8
#define rTxAGC_C_CCK11_CCK1_JAguar 0x1820
#define rTxAGC_C_Ofdm18_Ofdm6_JAguar 0x1824
#define rTxAGC_C_Ofdm54_Ofdm24_JAguar 0x1828
#define rTxAGC_C_MCS3_MCS0_JAguar 0x182c
#define rTxAGC_C_MCS7_MCS4_JAguar 0x1830
#define rTxAGC_C_MCS11_MCS8_JAguar 0x1834
#define rTxAGC_C_MCS15_MCS12_JAguar 0x1838
#define rTxAGC_C_Nss1Index3_Nss1Index0_JAguar 0x183c
#define rTxAGC_C_Nss1Index7_Nss1Index4_JAguar 0x1840
#define rTxAGC_C_Nss2Index1_Nss1Index8_JAguar 0x1844
#define rTxAGC_C_Nss2Index5_Nss2Index2_JAguar 0x1848
#define rTxAGC_C_Nss2Index9_Nss2Index6_JAguar 0x184c
#define rTxAGC_C_MCS19_MCS16_JAguar 0x18d8
#define rTxAGC_C_MCS23_MCS20_JAguar 0x18dc
#define rTxAGC_C_Nss3Index3_Nss3Index0_JAguar 0x18e0
#define rTxAGC_C_Nss3Index7_Nss3Index4_JAguar 0x18e4
#define rTxAGC_C_Nss3Index9_Nss3Index8_JAguar 0x18e8
#define rTxAGC_D_CCK11_CCK1_JAguar 0x1a20
#define rTxAGC_D_Ofdm18_Ofdm6_JAguar 0x1a24
#define rTxAGC_D_Ofdm54_Ofdm24_JAguar 0x1a28
#define rTxAGC_D_MCS3_MCS0_JAguar 0x1a2c
#define rTxAGC_D_MCS7_MCS4_JAguar 0x1a30
#define rTxAGC_D_MCS11_MCS8_JAguar 0x1a34
#define rTxAGC_D_MCS15_MCS12_JAguar 0x1a38
#define rTxAGC_D_Nss1Index3_Nss1Index0_JAguar 0x1a3c
#define rTxAGC_D_Nss1Index7_Nss1Index4_JAguar 0x1a40
#define rTxAGC_D_Nss2Index1_Nss1Index8_JAguar 0x1a44
#define rTxAGC_D_Nss2Index5_Nss2Index2_JAguar 0x1a48
#define rTxAGC_D_Nss2Index9_Nss2Index6_JAguar 0x1a4c
#define rTxAGC_D_MCS19_MCS16_JAguar 0x1ad8
#define rTxAGC_D_MCS23_MCS20_JAguar 0x1adc
#define rTxAGC_D_Nss3Index3_Nss3Index0_JAguar 0x1ae0
#define rTxAGC_D_Nss3Index7_Nss3Index4_JAguar 0x1ae4
#define rTxAGC_D_Nss3Index9_Nss3Index8_JAguar 0x1ae8
#endif
#define bTxAGC_byte0_Jaguar 0xff
#define bTxAGC_byte1_Jaguar 0xff00
#define bTxAGC_byte2_Jaguar 0xff0000
#define bTxAGC_byte3_Jaguar 0xff000000
#endif
#define BIT_FA_RESET BIT0

154
hal/OUTSRC/odm_types.h
View File

@ -20,6 +20,101 @@
#ifndef __ODM_TYPES_H__
#define __ODM_TYPES_H__
#define ODM_RATEMCS15_SG 0x1c
#define ODM_RATEMCS32 0x20
// CCK Rates, TxHT = 0
#define ODM_RATE1M 0x00
#define ODM_RATE2M 0x01
#define ODM_RATE5_5M 0x02
#define ODM_RATE11M 0x03
// OFDM Rates, TxHT = 0
#define ODM_RATE6M 0x04
#define ODM_RATE9M 0x05
#define ODM_RATE12M 0x06
#define ODM_RATE18M 0x07
#define ODM_RATE24M 0x08
#define ODM_RATE36M 0x09
#define ODM_RATE48M 0x0A
#define ODM_RATE54M 0x0B
// MCS Rates, TxHT = 1
#define ODM_RATEMCS0 0x0C
#define ODM_RATEMCS1 0x0D
#define ODM_RATEMCS2 0x0E
#define ODM_RATEMCS3 0x0F
#define ODM_RATEMCS4 0x10
#define ODM_RATEMCS5 0x11
#define ODM_RATEMCS6 0x12
#define ODM_RATEMCS7 0x13
#define ODM_RATEMCS8 0x14
#define ODM_RATEMCS9 0x15
#define ODM_RATEMCS10 0x16
#define ODM_RATEMCS11 0x17
#define ODM_RATEMCS12 0x18
#define ODM_RATEMCS13 0x19
#define ODM_RATEMCS14 0x1A
#define ODM_RATEMCS15 0x1B
#define ODM_RATEMCS16 0x1C
#define ODM_RATEMCS17 0x1D
#define ODM_RATEMCS18 0x1E
#define ODM_RATEMCS19 0x1F
#define ODM_RATEMCS20 0x20
#define ODM_RATEMCS21 0x21
#define ODM_RATEMCS22 0x22
#define ODM_RATEMCS23 0x23
#define ODM_RATEMCS24 0x24
#define ODM_RATEMCS25 0x25
#define ODM_RATEMCS26 0x26
#define ODM_RATEMCS27 0x27
#define ODM_RATEMCS28 0x28
#define ODM_RATEMCS29 0x29
#define ODM_RATEMCS30 0x2A
#define ODM_RATEMCS31 0x2B
#define ODM_RATEVHTSS1MCS0 0x2C
#define ODM_RATEVHTSS1MCS1 0x2D
#define ODM_RATEVHTSS1MCS2 0x2E
#define ODM_RATEVHTSS1MCS3 0x2F
#define ODM_RATEVHTSS1MCS4 0x30
#define ODM_RATEVHTSS1MCS5 0x31
#define ODM_RATEVHTSS1MCS6 0x32
#define ODM_RATEVHTSS1MCS7 0x33
#define ODM_RATEVHTSS1MCS8 0x34
#define ODM_RATEVHTSS1MCS9 0x35
#define ODM_RATEVHTSS2MCS0 0x36
#define ODM_RATEVHTSS2MCS1 0x37
#define ODM_RATEVHTSS2MCS2 0x38
#define ODM_RATEVHTSS2MCS3 0x39
#define ODM_RATEVHTSS2MCS4 0x3A
#define ODM_RATEVHTSS2MCS5 0x3B
#define ODM_RATEVHTSS2MCS6 0x3C
#define ODM_RATEVHTSS2MCS7 0x3D
#define ODM_RATEVHTSS2MCS8 0x3E
#define ODM_RATEVHTSS2MCS9 0x3F
#define ODM_RATEVHTSS3MCS0 0x40
#define ODM_RATEVHTSS3MCS1 0x41
#define ODM_RATEVHTSS3MCS2 0x42
#define ODM_RATEVHTSS3MCS3 0x43
#define ODM_RATEVHTSS3MCS4 0x44
#define ODM_RATEVHTSS3MCS5 0x45
#define ODM_RATEVHTSS3MCS6 0x46
#define ODM_RATEVHTSS3MCS7 0x47
#define ODM_RATEVHTSS3MCS8 0x48
#define ODM_RATEVHTSS3MCS9 0x49
#define ODM_RATEVHTSS4MCS0 0x4A
#define ODM_RATEVHTSS4MCS1 0x4B
#define ODM_RATEVHTSS4MCS2 0x4C
#define ODM_RATEVHTSS4MCS3 0x4D
#define ODM_RATEVHTSS4MCS4 0x4E
#define ODM_RATEVHTSS4MCS5 0x4F
#define ODM_RATEVHTSS4MCS6 0x50
#define ODM_RATEVHTSS4MCS7 0x51
#define ODM_RATEVHTSS4MCS8 0x52
#define ODM_RATEVHTSS4MCS9 0x53
//
// Define Different SW team support
//
@ -34,6 +129,12 @@
#define ODM_ENDIAN_BIG 0
#define ODM_ENDIAN_LITTLE 1
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
#define GET_PDM_ODM(__pAdapter) ((PDM_ODM_T)(&((GET_HAL_DATA(__pAdapter))->DM_OutSrc)))
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
#define GET_PDM_ODM(__pAdapter) ((PDM_ODM_T)(&((GET_HAL_DATA(__pAdapter))->odmpriv)))
#endif
#if (DM_ODM_SUPPORT_TYPE != ODM_WIN)
#define RT_PCI_INTERFACE 1
#define RT_USB_INTERFACE 2
@ -51,8 +152,10 @@ typedef enum _HAL_STATUS{
RT_STATUS_OS_API_FAILED,*/
}HAL_STATUS,*PHAL_STATUS;
#if( (DM_ODM_SUPPORT_TYPE == ODM_AP) ||(DM_ODM_SUPPORT_TYPE == ODM_ADSL) || (DM_ODM_SUPPORT_TYPE == ODM_CE))
#if( DM_ODM_SUPPORT_TYPE == ODM_AP)
#define MP_DRIVER 0
#endif
#if(DM_ODM_SUPPORT_TYPE != ODM_WIN)
#define VISTA_USB_RX_REVISE 0
@ -77,6 +180,8 @@ typedef enum _RT_SPINLOCK_TYPE{
#endif
//Shall we define Ndis 6.2 SpinLock Here ?
RT_PORT_SPINLOCK=16,
RT_VNIC_SPINLOCK=17,
RT_HVL_SPINLOCK=18,
RT_H2C_SPINLOCK = 20, // For H2C cmd. Added by tynli. 2009.11.09.
RT_BTData_SPINLOCK=25,
@ -99,6 +204,8 @@ typedef enum _RT_SPINLOCK_TYPE{
RT_PENDED_OID_SPINLOCK = 39,
RT_CHNLLIST_SPINLOCK = 40,
RT_INDIC_SPINLOCK = 41, //protect indication
RT_RFD_SPINLOCK = 42,
RT_LAST_SPINLOCK,
}RT_SPINLOCK_TYPE;
#endif
@ -117,9 +224,29 @@ typedef enum _RT_SPINLOCK_TYPE{
// To let ADSL/AP project compile ok; it should be removed after all conflict are solved. Added by Annie, 2011-10-07.
#define ADSL_AP_BUILD_WORKAROUND
#define AP_BUILD_WORKAROUND
//
#ifdef CONFIG_ANT_SWITCH
//2 [ Configure Antenna Diversity ]
#if defined(CONFIG_RTL_8881A_ANT_SWITCH) || defined(CONFIG_SLOT_0_ANT_SWITCH) || defined(CONFIG_SLOT_1_ANT_SWITCH)
#define CONFIG_HW_ANTENNA_DIVERSITY
#define ODM_EVM_ENHANCE_ANTDIV
//----------
#if(!defined(CONFIG_NO_2G_DIVERSITY) && !defined(CONFIG_2G_CGCS_RX_DIVERSITY) && !defined(CONFIG_2G_CG_TRX_DIVERSITY) && !defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY))
#define CONFIG_NO_2G_DIVERSITY
#endif
#ifdef CONFIG_NO_5G_DIVERSITY_8881A
#define CONFIG_NO_5G_DIVERSITY
#elif defined(CONFIG_5G_CGCS_RX_DIVERSITY_8881A)
#define CONFIG_5G_CGCS_RX_DIVERSITY
#elif defined(CONFIG_5G_CG_TRX_DIVERSITY_8881A)
#define CONFIG_5G_CG_TRX_DIVERSITY
#endif
#if(!defined(CONFIG_NO_5G_DIVERSITY) && !defined(CONFIG_5G_CGCS_RX_DIVERSITY) && !defined(CONFIG_5G_CG_TRX_DIVERSITY) && !defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY))
#define CONFIG_NO_5G_DIVERSITY
#endif
//----------
#if ( defined(CONFIG_NO_2G_DIVERSITY) && defined(CONFIG_NO_5G_DIVERSITY) )
#define CONFIG_NOT_SUPPORT_ANTDIV
#elif( !defined(CONFIG_NO_2G_DIVERSITY) && defined(CONFIG_NO_5G_DIVERSITY) )
@ -129,8 +256,8 @@ typedef enum _RT_SPINLOCK_TYPE{
#elif( !defined(CONFIG_NO_2G_DIVERSITY) && !defined(CONFIG_NO_5G_DIVERSITY) )
#define CONFIG_2G5G_SUPPORT_ANTDIV
#endif
//----------
#endif
#ifdef AP_BUILD_WORKAROUND
#include "../typedef.h"
#else
@ -140,7 +267,13 @@ typedef enum _RT_SPINLOCK_TYPE{
typedef unsigned short u2Byte,*pu2Byte;
typedef unsigned int u4Byte,*pu4Byte;
typedef unsigned long long u8Byte,*pu8Byte;
#if 1
/* In ARM platform, system would use the type -- "char" as "unsigned char"
* And we only use s1Byte/ps1Byte as INT8 now, so changes the type of s1Byte.*/
typedef signed char s1Byte,*ps1Byte;
#else
typedef char s1Byte,*ps1Byte;
#endif
typedef short s2Byte,*ps2Byte;
typedef long s4Byte,*ps4Byte;
typedef long long s8Byte,*ps8Byte;
@ -151,7 +284,9 @@ typedef enum _RT_SPINLOCK_TYPE{
typedef struct timer_list RT_TIMER, *PRT_TIMER;
typedef void * RT_TIMER_CALL_BACK;
#ifdef CONFIG_PCI_HCI
#define DEV_BUS_TYPE RT_PCI_INTERFACE
#endif
#define _TRUE 1
#define _FALSE 0
@ -168,7 +303,13 @@ typedef enum _RT_SPINLOCK_TYPE{
typedef unsigned short u2Byte,*pu2Byte;
typedef unsigned int u4Byte,*pu4Byte;
typedef unsigned long long u8Byte,*pu8Byte;
#if 1
/* In ARM platform, system would use the type -- "char" as "unsigned char"
* And we only use s1Byte/ps1Byte as INT8 now, so changes the type of s1Byte.*/
typedef signed char s1Byte,*ps1Byte;
#else
typedef char s1Byte,*ps1Byte;
#endif
typedef short s2Byte,*ps2Byte;
typedef long s4Byte,*ps4Byte;
typedef long long s8Byte,*ps8Byte;
@ -260,6 +401,9 @@ typedef enum _RT_SPINLOCK_TYPE{
#define RTL8881A_SUPPORT 0
#endif
#define READ_NEXT_PAIR(v1, v2, i) do { if (i+2 >= ArrayLen) break; i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0)
#define COND_ELSE 2
#define COND_ENDIF 3
#endif // __ODM_TYPES_H__

14
hal/OUTSRC/rtl8192e/Hal8192EReg.h
View File

@ -59,12 +59,14 @@
#define REG_FSISR_8192E 0x0054
#define REG_HSIMR_8192E 0x0058
#define REG_HSISR_8192E 0x005c
#define REG_PAD_CTRL1_8192E 0x0064
#define REG_WL_BT_PWR_CTRL_8192E 0x0068
#define REG_SDM_DEBUG_8192E 0x006C
#define REG_SDIO_CTRL_8192E 0x0070
#define REG_HCI_OPT_CTRL_8192E 0x0074
#define REG_AFE_CTRL4_8192E 0x0078
#define REG_8051FW_CTRL_8192E 0x0080
#define REG_8051FW_CTRL_8192E 0x0080
#define REG_WLLPS_CTRL_8192E 0x0090
#define REG_HIMR0_8192E 0x00B0
#define REG_HISR0_8192E 0x00B4
#define REG_HIMR1_8192E 0x00B8
@ -363,7 +365,10 @@
#define REG_RXFLTMAP1_8192E 0x06A2
#define REG_RXFLTMAP2_8192E 0x06A4
#define REG_BCN_PSR_RPT_8192E 0x06A8
#define REG_BT_COEX_TABLE_8192E 0x06C0
#define REG_BT_COEX_TABLE0_8192E 0x06C0
#define REG_BT_COEX_TABLE1_8192E 0x06C4
#define REG_BT_COEX_TABLE2_8192E 0x06C8
#define REG_BT_COEX_TABLE3_8192E 0x06CC
#define REG_ASSOCIATED_BFMER0_INFO_8192E 0x06E4
#define REG_ASSOCIATED_BFMER1_INFO_8192E 0x06EC
#define REG_CSI_RPT_PARAM_BW20_8192E 0x06F4
@ -376,6 +381,11 @@
#define REG_ASSOCIATED_BFMEE_SEL_8192E 0x0714
#define REG_SND_PTCL_CTRL_8192E 0x0718
// BT
#define REG_BT_STATISTICS_CTRL_8192E 0x076E // bit0~bit3 for REG_BT_STATISTICS_CTRL , bit4~bit15 for REG_BT_COEX_ENH_INTF_CTRL
#define REG_BT_STATISTICS_OTH_CTRL_8192E 0x0778
#define REG_TDMA_TIME_AND_RPT_SAM_SET_8192E 0x0790
//-----------------------------------------------------
//

1079
hal/OUTSRC/rtl8192e/HalHWImg8192E_BB.c
View File

File diff suppressed because it is too large Load Diff

4
hal/OUTSRC/rtl8192e/HalHWImg8192E_BB.h
View File

@ -22,7 +22,6 @@
#ifndef __INC_MP_BB_HW_IMG_8192E_H
#define __INC_MP_BB_HW_IMG_8192E_H
//static BOOLEAN CheckCondition(const u4Byte Condition, const u4Byte Hex);
/******************************************************************************
* AGC_TAB.TXT
@ -32,6 +31,7 @@ void
ODM_ReadAndConfig_MP_8192E_AGC_TAB( // TC: Test Chip, MP: MP Chip
IN PDM_ODM_T pDM_Odm
);
u4Byte ODM_GetVersion_MP_8192E_AGC_TAB(void);
/******************************************************************************
* PHY_REG.TXT
@ -41,6 +41,7 @@ void
ODM_ReadAndConfig_MP_8192E_PHY_REG( // TC: Test Chip, MP: MP Chip
IN PDM_ODM_T pDM_Odm
);
u4Byte ODM_GetVersion_MP_8192E_PHY_REG(void);
/******************************************************************************
* PHY_REG_PG.TXT
@ -50,6 +51,7 @@ void
ODM_ReadAndConfig_MP_8192E_PHY_REG_PG( // TC: Test Chip, MP: MP Chip
IN PDM_ODM_T pDM_Odm
);
u4Byte ODM_GetVersion_MP_8192E_PHY_REG_PG(void);
#endif
#endif // end of HWIMG_SUPPORT

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