mirror of
https://github.com/Mange/rtl8192eu-linux-driver
synced 2025-12-10 00:04:17 +00:00
Updated to v4.3.8_12406.20140929
This commit is contained in:
@@ -269,6 +269,7 @@ static u32 _InitPowerOn_8192EU(_adapter *padapter)
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{
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u16 value16;
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u32 value32;
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
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// HW Power on sequence
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u8 bMacPwrCtrlOn=_FALSE;
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@@ -282,6 +283,10 @@ static u32 _InitPowerOn_8192EU(_adapter *padapter)
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if(value32 & BIT_SPSLDO_SEL){
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//LDO
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rtw_write8(padapter, REG_LDO_SWR_CTRL, 0xC3);
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if( IS_B_CUT(pHalData->VersionID)){
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u32 voltage = (rtw_read32(padapter,0x14)& 0xFF0FFFFF )|(0x05<<20);
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rtw_write32(padapter,0x14,voltage);
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}
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}
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else {
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//SPS
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@@ -314,7 +319,7 @@ static u32 _InitPowerOn_8192EU(_adapter *padapter)
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bMacPwrCtrlOn = _TRUE;
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rtw_hal_set_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn);
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return _SUCCESS;
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}
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@@ -945,6 +950,8 @@ HalDetectSelectiveSuspendMode(
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}
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#endif
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} // HalDetectSelectiveSuspendMode
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#if 0
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/*-----------------------------------------------------------------------------
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* Function: HwSuspendModeEnable92Cu()
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*
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@@ -1002,6 +1009,8 @@ HwSuspendModeEnable_8192EU(
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}
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} // HwSuspendModeEnable92Cu
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#endif
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rt_rf_power_state RfOnOffDetect(IN PADAPTER pAdapter )
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{
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struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(pAdapter);
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@@ -1063,9 +1072,7 @@ u32 rtl8192eu_hal_init(PADAPTER Adapter)
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struct registry_priv *pregistrypriv = &Adapter->registrypriv;
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rt_rf_power_state eRfPowerStateToSet;
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#ifdef CONFIG_BT_COEXIST
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struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist);
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#endif
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u32 init_start_time = rtw_get_current_time();
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@@ -1418,11 +1425,12 @@ HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC11);
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//
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rtw_write32(Adapter, REG_BAR_MODE_CTRL, 0x0201ffff);
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if(pregistrypriv->wifi_spec)
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if(pregistrypriv->wifi_spec){
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rtw_write16(Adapter,REG_FAST_EDCA_CTRL ,0);
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//Nav limit , suggest by scott
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rtw_write8(Adapter, 0x652, 0x0);
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//Nav limit , suggest by SD1-Pisa,disable NAV_UPPER function when wifi_spec=1 for Test item: 5.2.3
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rtw_write8(Adapter, REG_NAV_UPPER, 0x0);
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}
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HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_HAL_DM);
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rtl8192e_InitHalDm(Adapter);
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@@ -1447,95 +1455,6 @@ HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_HAL_DM);
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// Added by tynli. 2010.03.30.
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pwrctrlpriv->rf_pwrstate = rf_on;
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#if 0 //to do
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RT_CLEAR_PS_LEVEL(pwrctrlpriv, RT_RF_OFF_LEVL_HALT_NIC);
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#if 1 //Todo
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// 20100326 Joseph: Copy from GPIOChangeRFWorkItemCallBack() function to check HW radio on/off.
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// 20100329 Joseph: Revise and integrate the HW/SW radio off code in initialization.
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eRfPowerStateToSet = (rt_rf_power_state) RfOnOffDetect(Adapter);
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pwrctrlpriv->rfoff_reason |= eRfPowerStateToSet==rf_on ? RF_CHANGE_BY_INIT : RF_CHANGE_BY_HW;
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pwrctrlpriv->rfoff_reason |= (pwrctrlpriv->reg_rfoff) ? RF_CHANGE_BY_SW : 0;
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if(pwrctrlpriv->rfoff_reason&RF_CHANGE_BY_HW)
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pwrctrlpriv->b_hw_radio_off = _TRUE;
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DBG_8192C("eRfPowerStateToSet=%d\n", eRfPowerStateToSet);
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if(pwrctrlpriv->reg_rfoff == _TRUE)
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{ // User disable RF via registry.
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DBG_8192C("InitializeAdapter8192CU(): Turn off RF for RegRfOff.\n");
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//MgntActSet_RF_State(Adapter, rf_off, RF_CHANGE_BY_SW, _TRUE);
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// Those action will be discard in MgntActSet_RF_State because off the same state
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//for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
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//PHY_SetRFReg(Adapter, eRFPath, 0x4, 0xC00, 0x0);
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}
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else if(pwrctrlpriv->rfoff_reason > RF_CHANGE_BY_PS)
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{ // H/W or S/W RF OFF before sleep.
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DBG_8192C(" Turn off RF for RfOffReason(%x) ----------\n", pwrctrlpriv->rfoff_reason);
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//pwrctrlpriv->rfoff_reason = RF_CHANGE_BY_INIT;
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pwrctrlpriv->rf_pwrstate = rf_on;
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//MgntActSet_RF_State(Adapter, rf_off, pwrctrlpriv->rfoff_reason, _TRUE);
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}
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else
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{
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// Perform GPIO polling to find out current RF state. added by Roger, 2010.04.09.
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if(pHalData->BoardType == BOARD_MINICARD /*&& (Adapter->MgntInfo.PowerSaveControl.bGpioRfSw)*/)
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{
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DBG_8192C("InitializeAdapter8192CU(): RF=%d \n", eRfPowerStateToSet);
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if (eRfPowerStateToSet == rf_off)
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{
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//MgntActSet_RF_State(Adapter, rf_off, RF_CHANGE_BY_HW, _TRUE);
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pwrctrlpriv->b_hw_radio_off = _TRUE;
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}
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else
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{
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pwrctrlpriv->rf_pwrstate = rf_off;
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pwrctrlpriv->rfoff_reason = RF_CHANGE_BY_INIT;
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pwrctrlpriv->b_hw_radio_off = _FALSE;
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//MgntActSet_RF_State(Adapter, rf_on, pwrctrlpriv->rfoff_reason, _TRUE);
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}
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}
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else
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{
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pwrctrlpriv->rf_pwrstate = rf_off;
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pwrctrlpriv->rfoff_reason = RF_CHANGE_BY_INIT;
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//MgntActSet_RF_State(Adapter, rf_on, pwrctrlpriv->rfoff_reason, _TRUE);
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}
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pwrctrlpriv->rfoff_reason = 0;
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pwrctrlpriv->b_hw_radio_off = _FALSE;
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pwrctrlpriv->rf_pwrstate = rf_on;
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rtw_led_control(Adapter, LED_CTL_POWER_ON);
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}
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// 2010/-8/09 MH For power down module, we need to enable register block contrl reg at 0x1c.
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// Then enable power down control bit of register 0x04 BIT4 and BIT15 as 1.
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if(pHalData->pwrdown && eRfPowerStateToSet == rf_off)
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{
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// Enable register area 0x0-0xc.
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rtw_write8(Adapter, REG_RSV_CTRL, 0x0);
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//
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// <Roger_Notes> We should configure HW PDn source for WiFi ONLY, and then
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// our HW will be set in power-down mode if PDn source from all functions are configured.
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// 2010.10.06.
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//
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//if(IS_HARDWARE_TYPE_8723AU(Adapter))
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//{
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// u1bTmp = rtw_read8(Adapter, REG_MULTI_FUNC_CTRL);
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// rtw_write8(Adapter, REG_MULTI_FUNC_CTRL, (u1bTmp|WL_HWPDN_EN));
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//}
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//else
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//{
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rtw_write16(Adapter, REG_APS_FSMCO, 0x8812);
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//}
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}
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//DrvIFIndicateCurrentPhyStatus(Adapter); // 2010/08/17 MH Disable to prevent BSOD.
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#endif
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#endif
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//0x4c6[3] 1: RTS BW = Data BW
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//0: RTS BW depends on CCA / secondary CCA result.
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@@ -1576,7 +1495,7 @@ HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_PW_TRACK);
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HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_LCK);
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//PHY_LCCalibrate_8192E((GET_HAL_DATA(Adapter)->odmpriv));
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}
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}
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#ifdef CONFIG_HIGH_CHAN_SUPER_CALIBRATION
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rtw_hal_set_chnl_bw(Adapter, 13,
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CHANNEL_WIDTH_20, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HAL_PRIME_CHNL_OFFSET_DONT_CARE);
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@@ -1592,7 +1511,7 @@ HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_LCK);
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rtw_hal_set_chnl_bw(Adapter, Adapter->registrypriv.channel,
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CHANNEL_WIDTH_20, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HAL_PRIME_CHNL_OFFSET_DONT_CARE);
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#endif
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}
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HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC21);
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@@ -1601,8 +1520,21 @@ HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC21);
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// _InitPABias(Adapter);
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#ifdef CONFIG_BT_COEXIST
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HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BT_COEXIST);
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//_InitBTCoexist(Adapter);
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HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BT_COEXIST);
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if ( pHalData->EEPROMBluetoothCoexist == 1)
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{
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// YiWei 20140624 , Fix 8192eu mailbox BT info no response issue reduce I2C clock rate to 156KHz (default 1.25Mhz)
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rtw_write8(Adapter, rPMAC_TxPacketNum, rtw_read8(Adapter, rPMAC_TxPacketNum)|0x7);
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// Init BT hw config.
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rtw_btcoex_HAL_Initialize(Adapter, _FALSE);
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}
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else
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{
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// In combo card run wifi only , must setting some hardware reg.
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rtl8192e_combo_card_WifiOnlyHwInit(Adapter);
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}
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#endif
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// 2010/08/23 MH According to Alfred's suggestion, we need to to prevent HW enter
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@@ -1733,21 +1665,9 @@ u32 rtl8192eu_hal_deinit(PADAPTER Adapter)
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
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DBG_8192C("==> %s \n",__FUNCTION__);
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#ifdef CONFIG_BT_COEXIST
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if (BT_IsBtExist(Adapter))
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{
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DBG_871X("BT module enable SIC\n");
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// Only under WIN7 we can support selective suspend and enter D3 state when system call halt adapter.
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//rtw_write16(Adapter, REG_GPIO_MUXCFG, rtw_read16(Adapter, REG_GPIO_MUXCFG)|BIT12);
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// 2010/10/13 MH If we enable SIC in the position and then call _ResetDigitalProcedure1. in XP,
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// the system will hang due to 8051 reset fail.
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}
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else
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#endif
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{
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rtw_write16(Adapter, REG_GPIO_MUXCFG, rtw_read16(Adapter, REG_GPIO_MUXCFG)&(~BIT12));
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}
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rtw_write16(Adapter, REG_GPIO_MUXCFG, rtw_read16(Adapter, REG_GPIO_MUXCFG)&(~BIT12));
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if(pHalData->bSupportUSB3 == _TRUE)
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{
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@@ -2269,16 +2189,36 @@ _func_enter_;
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case HW_VAR_RXDMA_AGG_PG_TH:
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#ifdef CONFIG_USB_RX_AGGREGATION
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{
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//threshold == 1 , Disable Rx-agg when AP is B/G mode or wifi_spec=1 to prevent bad TP.
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u8 threshold = *((u8 *)val);
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if( threshold == 0)
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{
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if( threshold == 0){
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threshold = (pHalData->RegAcUsbDmaSize & 0x0F);
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}
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rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, threshold);
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//threshold == 1 ,disable RX AGG
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if( (pHalData->UsbRxAggMode == USB_RX_AGG_USB) && (threshold == 1))
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rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH+1, 0);
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#ifdef CONFIG_80211N_HT
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{
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// 2014-07-24 Fix WIFI Logo -5.2.4/5.2.9 - DT3 low TP issue
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// Adjust RxAggrTimeout to close to zero disable RxAggr for RxAgg-USB mode, suggested by designer
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// Timeout value is calculated by 34 / (2^n)
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struct mlme_priv *pmlmepriv = &Adapter->mlmepriv;
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struct ht_priv *phtpriv = &pmlmepriv->htpriv;
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if(pHalData->UsbRxAggMode == USB_RX_AGG_USB){
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#if 1
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//BG mode || (wifi_spec=1 && BG mode Testbed)
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if((threshold == 1) && (_FALSE == phtpriv->ht_option) )
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#else
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//(wifi_spec=1 && BG mode Testbed)
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if((Adapter->registrypriv.wifi_spec==1) && (_FALSE == phtpriv->ht_option) )
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#endif
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rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH+1, 0);
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}
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}
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#endif//#ifdef CONFIG_80211N_HT
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}
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#endif
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break;
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@@ -2358,6 +2298,7 @@ _func_enter_;
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pwrctl->wowlan_wake_reason = rtw_read8(Adapter, REG_WOWLAN_WAKE_REASON);
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DBG_871X_LEVEL(_drv_always_, "wowlan_wake_reason: 0x%02x\n",
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pwrctl->wowlan_wake_reason);
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if (Adapter->intf_stop)
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Adapter->intf_stop(Adapter);
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@@ -2443,8 +2384,6 @@ _func_enter_;
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do {
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if ((rtw_read32(Adapter, REG_RXPKT_NUM)&RXDMA_IDLE)) {
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DBG_871X_LEVEL(_drv_always_, "RX_DMA_IDLE is true\n");
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if (Adapter->intf_stop)
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Adapter->intf_stop(Adapter);
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break;
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} else {
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// If RX_DMA is not idle, receive one pkt from DMA
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@@ -2465,6 +2404,9 @@ _func_enter_;
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rtw_write8(Adapter, REG_WOWLAN_WAKE_REASON, 0);
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if (Adapter->intf_stop)
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Adapter->intf_stop(Adapter);
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// Invoid SE0 reset signal during suspending
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rtw_write8(Adapter, REG_RSV_CTRL, 0x20);
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rtw_write8(Adapter, REG_RSV_CTRL, 0x60);
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@@ -2643,19 +2585,6 @@ void rtl8192eu_set_hal_ops(_adapter * padapter)
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_func_enter_;
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#ifdef CONFIG_CONCURRENT_MODE
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if(padapter->isprimary)
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#endif //CONFIG_CONCURRENT_MODE
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{
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padapter->HalData = rtw_zvmalloc(sizeof(HAL_DATA_TYPE));
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if(padapter->HalData == NULL){
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DBG_8192C("cant not alloc memory for HAL DATA \n");
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}
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}
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//_rtw_memset(padapter->HalData, 0, sizeof(HAL_DATA_TYPE));
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padapter->hal_data_sz = sizeof(HAL_DATA_TYPE);
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pHalFunc->hal_power_on = _InitPowerOn_8192EU;
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pHalFunc->hal_power_off = hal_poweroff_8192eu;
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