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Updated to v4.3.8_12406.20140929

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This commit is contained in:
CGarces
2017-05-11 20:35:20 +02:00
parent 1387cf623d
commit 9dde4572b4
229 changed files with 35553 additions and 24316 deletions
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157
core/rtw_odm.c
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@@ -37,13 +37,13 @@ const char *odm_comp_str[] = {
/* BIT12 */"ODM_COMP_DYNAMIC_PRICCA",
/* BIT13 */"ODM_COMP_RXHP",
/* BIT14 */"ODM_COMP_MP",
/* BIT15 */"ODM_COMP_DYNAMIC_ATC",
/* BIT16 */"ODM_COMP_EDCA_TURBO",
/* BIT17 */"ODM_COMP_EARLY_MODE",
/* BIT15 */"ODM_COMP_CFO_TRACKING",
/* BIT16 */"ODM_COMP_ACS",
/* BIT17 */"PHYDM_COMP_ADAPTIVITY",
/* BIT18 */NULL,
/* BIT19 */NULL,
/* BIT20 */NULL,
/* BIT21 */NULL,
/* BIT20 */"ODM_COMP_EDCA_TURBO",
/* BIT21 */"ODM_COMP_EARLY_MODE",
/* BIT22 */NULL,
/* BIT23 */NULL,
/* BIT24 */"ODM_COMP_TX_PWR_TRACK",
@@ -73,14 +73,14 @@ const char *odm_ability_str[] = {
/* BIT11 */"ODM_BB_PSD",
/* BIT12 */"ODM_BB_RXHP",
/* BIT13 */"ODM_BB_ADAPTIVITY",
/* BIT14 */"ODM_BB_DYNAMIC_ATC",
/* BIT15 */NULL,
/* BIT16 */"ODM_MAC_EDCA_TURBO",
/* BIT17 */"ODM_MAC_EARLY_MODE",
/* BIT14 */"ODM_BB_CFO_TRACKING",
/* BIT15 */"ODM_BB_NHM_CNT",
/* BIT16 */"ODM_BB_PRIMARY_CCA",
/* BIT17 */NULL,
/* BIT18 */NULL,
/* BIT19 */NULL,
/* BIT20 */NULL,
/* BIT21 */NULL,
/* BIT20 */"ODM_MAC_EDCA_TURBO",
/* BIT21 */"ODM_MAC_EARLY_MODE",
/* BIT22 */NULL,
/* BIT23 */NULL,
/* BIT24 */"ODM_RF_TX_PWR_TRACK",
@@ -132,7 +132,7 @@ void rtw_odm_dbg_level_msg(void *sel, _adapter *adapter)
int i;
rtw_hal_get_def_var(adapter, HW_DEF_ODM_DBG_LEVEL, &dbg_level);
DBG_871X_SEL_NL(sel, "odm.DebugDebugLevel = %u\n", dbg_level);
DBG_871X_SEL_NL(sel, "odm.DebugLevel = %u\n", dbg_level);
for (i=0;i<RTW_ODM_DBG_LEVEL_NUM;i++) {
if (odm_dbg_level_str[i])
DBG_871X_SEL_NL(sel, "%u %s\n", i, odm_dbg_level_str[i]);
@@ -166,11 +166,102 @@ inline void rtw_odm_ability_set(_adapter *adapter, u32 ability)
rtw_hal_set_hwreg(adapter, HW_VAR_DM_FLAG, (u8*)&ability);
}
void rtw_odm_adaptivity_ver_msg(void *sel, _adapter *adapter)
{
DBG_871X_SEL_NL(sel, "ADAPTIVITY_VERSION "ADAPTIVITY_VERSION"\n");
}
#define RTW_ADAPTIVITY_EN_DISABLE 0
#define RTW_ADAPTIVITY_EN_ENABLE 1
#define RTW_ADAPTIVITY_EN_AUTO 2
void rtw_odm_adaptivity_en_msg(void *sel, _adapter *adapter)
{
struct registry_priv *regsty = &adapter->registrypriv;
struct mlme_priv *mlme = &adapter->mlmepriv;
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
DM_ODM_T *odm = &hal_data->odmpriv;
DBG_871X_SEL_NL(sel, "RTW_ADAPTIVITY_EN_");
if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_DISABLE) {
DBG_871X_SEL(sel, "DISABLE\n");
} else if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_ENABLE) {
DBG_871X_SEL(sel, "ENABLE\n");
} else if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_AUTO) {
DBG_871X_SEL(sel, "AUTO, chplan:0x%02x, Regulation:%u,%u\n"
, mlme->ChannelPlan, odm->odm_Regulation2_4G, odm->odm_Regulation5G);
} else {
DBG_871X_SEL(sel, "INVALID\n");
}
}
#define RTW_ADAPTIVITY_MODE_NORMAL 0
#define RTW_ADAPTIVITY_MODE_CARRIER_SENSE 1
void rtw_odm_adaptivity_mode_msg(void *sel, _adapter *adapter)
{
struct registry_priv *regsty = &adapter->registrypriv;
DBG_871X_SEL_NL(sel, "RTW_ADAPTIVITY_MODE_");
if (regsty->adaptivity_mode == RTW_ADAPTIVITY_MODE_NORMAL) {
DBG_871X_SEL(sel, "NORMAL\n");
} else if (regsty->adaptivity_mode == RTW_ADAPTIVITY_MODE_CARRIER_SENSE) {
DBG_871X_SEL(sel, "CARRIER_SENSE\n");
} else {
DBG_871X_SEL(sel, "INVALID\n");
}
}
#define RTW_NHM_EN_DISABLE 0
#define RTW_NHM_EN_ENABLE 1
void rtw_odm_nhm_en_msg(void *sel, _adapter *adapter)
{
struct registry_priv *regsty = &adapter->registrypriv;
DBG_871X_SEL_NL(sel, "RTW_NHM_EN_");
if (regsty->nhm_en == RTW_NHM_EN_DISABLE) {
DBG_871X_SEL(sel, "DISABLE\n");
} else if (regsty->nhm_en == RTW_NHM_EN_ENABLE) {
DBG_871X_SEL(sel, "ENABLE\n");
} else {
DBG_871X_SEL(sel, "INVALID\n");
}
}
bool rtw_odm_adaptivity_needed(_adapter *adapter)
{
struct registry_priv *regsty = &adapter->registrypriv;
struct mlme_priv *mlme = &adapter->mlmepriv;
bool ret = _FALSE;
if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_ENABLE
|| regsty->adaptivity_en == RTW_ADAPTIVITY_EN_AUTO)
ret = _TRUE;
if (ret == _TRUE) {
rtw_odm_adaptivity_ver_msg(RTW_DBGDUMP, adapter);
rtw_odm_adaptivity_en_msg(RTW_DBGDUMP, adapter);
rtw_odm_adaptivity_mode_msg(RTW_DBGDUMP, adapter);
rtw_odm_nhm_en_msg(RTW_DBGDUMP, adapter);
}
return ret;
}
void rtw_odm_adaptivity_parm_msg(void *sel, _adapter *adapter)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter);
DM_ODM_T *odm = &pHalData->odmpriv;
rtw_odm_adaptivity_ver_msg(sel, adapter);
rtw_odm_adaptivity_en_msg(sel, adapter);
rtw_odm_adaptivity_mode_msg(sel, adapter);
rtw_odm_nhm_en_msg(sel, adapter);
DBG_871X_SEL_NL(sel, "%10s %16s %8s %10s %11s %14s\n"
, "TH_L2H_ini", "TH_EDCCA_HL_diff", "IGI_Base", "ForceEDCCA", "AdapEn_RSSI", "IGI_LowerBound");
DBG_871X_SEL_NL(sel, "0x%-8x %-16d 0x%-6x %-10d %-11u %-14u\n"
@@ -181,6 +272,14 @@ void rtw_odm_adaptivity_parm_msg(void *sel, _adapter *adapter)
, odm->AdapEn_RSSI
, odm->IGI_LowerBound
);
DBG_871X_SEL_NL(sel, "%8s %9s\n", "EDCCA_ES","Adap_Flag");
DBG_871X_SEL_NL(sel, "%-8x %-9x \n"
, odm->EDCCA_enable_state
, odm->adaptivity_flag
);
}
void rtw_odm_adaptivity_parm_set(_adapter *adapter, s8 TH_L2H_ini, s8 TH_EDCCA_HL_diff,
@@ -204,4 +303,36 @@ void rtw_odm_get_perpkt_rssi(void *sel, _adapter *adapter)
DBG_871X_SEL_NL(sel,"RxRate = %s, RSSI_A = %d(%%), RSSI_B = %d(%%)\n",
HDATA_RATE(odm->RxRate), odm->RSSI_A, odm->RSSI_B);
}
}
void rtw_odm_acquirespinlock(_adapter *adapter, RT_SPINLOCK_TYPE type)
{
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
_irqL irqL;
switch(type)
{
case RT_IQK_SPINLOCK:
_enter_critical_bh(&pdmpriv->IQKSpinLock, &irqL);
default:
break;
}
}
void rtw_odm_releasespinlock(_adapter *adapter, RT_SPINLOCK_TYPE type)
{
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
_irqL irqL;
switch(type)
{
case RT_IQK_SPINLOCK:
_exit_critical_bh(&pdmpriv->IQKSpinLock, &irqL);
default:
break;
}
}