mirror of
https://github.com/Mange/rtl8192eu-linux-driver
synced 2025-12-10 00:04:17 +00:00
Updated to 4.4.1
This commit is contained in:
CGarces
@@ -22,6 +22,20 @@
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//#include <drv_types.h>
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#include <rtl8192e_hal.h>
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s32 rtl8192e_init_xmit_priv(_adapter *padapter)
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{
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
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struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
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#ifdef CONFIG_TX_EARLY_MODE
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pHalData->bEarlyModeEnable = padapter->registrypriv.early_mode;
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#endif
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pxmitpriv->hw_ssn_seq_no = rtw_get_hwseq_no(padapter);
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pxmitpriv->nqos_ssn = 0;
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return _SUCCESS;
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}
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void _dbg_dump_tx_info(_adapter *padapter,int frame_tag, u8 *ptxdesc)
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{
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u8 bDumpTxPkt;
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@@ -250,6 +264,99 @@ void UpdateEarlyModeInfo8192E(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmit
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}
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#endif
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#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) ||(DEV_BUS_TYPE == RT_SDIO_INTERFACE))
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void rtl8192e_cal_txdesc_chksum(u8 *ptxdesc)
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{
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u16 *usPtr = (u16*)ptxdesc;
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u32 count = 16; // (32 bytes / 2 bytes per XOR) => 16 times
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u32 index;
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u16 checksum = 0;
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//Clear first
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SET_TX_DESC_TX_DESC_CHECKSUM_92E(ptxdesc, 0);
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for(index = 0 ; index < count ; index++){
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checksum = checksum ^ le16_to_cpu(*(usPtr + index));
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}
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SET_TX_DESC_TX_DESC_CHECKSUM_92E(ptxdesc, checksum);
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}
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#endif
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void fill_txdesc_sectype(struct pkt_attrib *pattrib, u8 *ptxdesc)
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{
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if ((pattrib->encrypt > 0) && !pattrib->bswenc)
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{
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switch (pattrib->encrypt)
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{
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//SEC_TYPE : 0:NO_ENC,1:WEP40/TKIP,2:WAPI,3:AES
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case _WEP40_:
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case _WEP104_:
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case _TKIP_:
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case _TKIP_WTMIC_:
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SET_TX_DESC_SEC_TYPE_92E(ptxdesc, 0x1);
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break;
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#ifdef CONFIG_WAPI_SUPPORT
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case _SMS4_:
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SET_TX_DESC_SEC_TYPE_92E(ptxdesc, 0x2);
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break;
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#endif
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case _AES_:
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SET_TX_DESC_SEC_TYPE_92E(ptxdesc, 0x3);
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break;
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case _NO_PRIVACY_:
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default:
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SET_TX_DESC_SEC_TYPE_92E(ptxdesc, 0x0);
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break;
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}
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}
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}
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void fill_txdesc_vcs(struct pkt_attrib *pattrib, u8 *ptxdesc)
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{
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//DBG_8192C("cvs_mode=%d\n", pattrib->vcs_mode);
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SET_TX_DESC_HW_RTS_ENABLE_92E(ptxdesc, 0);
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switch(pattrib->vcs_mode)
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{
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case RTS_CTS:
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SET_TX_DESC_RTS_ENABLE_92E(ptxdesc, 1);
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break;
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case CTS_TO_SELF:
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SET_TX_DESC_CTS2SELF_92E(ptxdesc, 1);
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break;
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case NONE_VCS:
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default:
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break;
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}
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#if 0 //to do
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// Protection mode related
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if(pTcb->bRTSEnable || pTcb->bCTSEnable)
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{
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SET_TX_DESC_CCA_RTS_92E(pDesc, pTcb->RTSCCA);
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//SET_TX_DESC_RTS_ENABLE_92E(pDesc, ((pTcb->bRTSEnable && !pTcb->bCTSEnable) ? 1 : 0));
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//SET_TX_DESC_CTS2SELF_92E(pDesc, ((pTcb->bCTSEnable) ? 1 : 0));
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SET_TX_DESC_CTROL_STBC_92E(pDesc, ((pTcb->bRTSSTBC) ? 1 : 0));
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SET_TX_DESC_RTS_SHORT_92E(pDesc, pTcb->bRTSShort);
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SET_TX_DESC_RTS_RATE_92E(pDesc, MRateToHwRate((u1Byte)pTcb->RTSRate));
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if(pMgntInfo->ForcedProtectionMode == PROTECTION_MODE_FORCE_ENABLE)
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{
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SET_TX_DESC_RTS_RATE_FB_LIMIT_92E(pDesc, 1);
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}
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else
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{
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SET_TX_DESC_RTS_RATE_FB_LIMIT_92E(pDesc, 0xF);
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}
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}
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#endif
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}
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u8
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BWMapping_92E(
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IN PADAPTER Adapter,
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@@ -300,7 +407,7 @@ SCMapping_92E(
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else if(pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)
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SCSettingOfDesc = VHT_DATA_SC_40_UPPER_OF_80MHZ;
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else
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DBG_871X("%s- CurrentChannelBW:%d, SCMapping: Not Correct Primary40MHz Setting \n",__FUNCTION__,pHalData->CurrentChannelBW);
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DBG_871X("%s- CurrentChannelBW:%d, SCMapping: DONOT CARE Mode Setting\n", __func__, pHalData->CurrentChannelBW);
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}
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else
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{
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@@ -313,7 +420,7 @@ SCMapping_92E(
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else if((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER))
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SCSettingOfDesc = VHT_DATA_SC_20_UPPERST_OF_80MHZ;
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else
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DBG_871X("%s- CurrentChannelBW:%d, SCMapping: Not Correct Primary40MHz Setting \n",__FUNCTION__,pHalData->CurrentChannelBW);
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DBG_871X("%s- CurrentChannelBW:%d, SCMapping: DONOT CARE Mode Setting\n", __func__, pHalData->CurrentChannelBW);
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}
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}
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else if(pHalData->CurrentChannelBW== CHANNEL_WIDTH_40)
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@@ -349,4 +456,99 @@ SCMapping_92E(
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return SCSettingOfDesc;
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}
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void fill_txdesc_phy(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc)
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{
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//DBG_8192C("bwmode=%d, ch_off=%d\n", pattrib->bwmode, pattrib->ch_offset);
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if(pattrib->ht_en)
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{
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// Set Bandwidth and sub-channel settings.
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SET_TX_DESC_DATA_BW_92E(ptxdesc, BWMapping_92E(padapter,pattrib));
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SET_TX_DESC_DATA_SC_92E(ptxdesc, SCMapping_92E(padapter,pattrib));
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}
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}
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void rtl8192e_fixed_rate(_adapter *padapter,u8 *ptxdesc)
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{
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if(padapter->fix_rate!= 0xFF){
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SET_TX_DESC_USE_RATE_92E(ptxdesc, 1);
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//if(pHalData->INIDATA_RATE[pattrib->mac_id] & BIT(7))
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{
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if(padapter->fix_rate & BIT(7))
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SET_TX_DESC_DATA_SHORT_92E(ptxdesc, 1);
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}
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SET_TX_DESC_TX_RATE_92E(ptxdesc, (padapter->fix_rate & 0x7F));
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//SET_TX_DESC_DISABLE_FB_92E(ptxdesc,1);
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if (!padapter->data_fb)
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SET_TX_DESC_DISABLE_FB_92E(ptxdesc,1);
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//ptxdesc->datarate = padapter->fix_rate;
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}
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}
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//
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// Description: In normal chip, we should send some packet to Hw which will be used by Fw
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// in FW LPS mode. The function is to fill the Tx descriptor of this packets, then
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// Fw can tell Hw to send these packet derectly.
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//
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void rtl8192e_fill_fake_txdesc(
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PADAPTER padapter,
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u8* pDesc,
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u32 BufferLen,
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u8 IsPsPoll,
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u8 IsBTQosNull,
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u8 bDataFrame)
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{
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struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
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struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
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// Clear all status
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_rtw_memset(pDesc, 0, TXDESC_SIZE);
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SET_TX_DESC_OFFSET_92E(pDesc, (TXDESC_SIZE+OFFSET_SZ));
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SET_TX_DESC_PKT_SIZE_92E(pDesc, BufferLen);
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if (pmlmeext->cur_wireless_mode & WIRELESS_11B) {
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SET_TX_DESC_RATE_ID_92E(pDesc, RATEID_IDX_B);
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} else {
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SET_TX_DESC_RATE_ID_92E(pDesc, RATEID_IDX_G);
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}
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SET_TX_DESC_QUEUE_SEL_92E(pDesc, QSLT_MGNT);
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//Set NAVUSEHDR to prevent Ps-poll AId filed to be changed to error vlaue by Hw.
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if (IsPsPoll)
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{
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SET_TX_DESC_NAV_USE_HDR_92E(pDesc, 1);
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}
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else
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{
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SET_TX_DESC_EN_HWSEQ_92E(pDesc, 1); // Hw set sequence number
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SET_TX_DESC_HWSEQ_SEL_92E(pDesc, pxmitpriv->hw_ssn_seq_no);
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}
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SET_TX_DESC_USE_RATE_92E(pDesc, 1);
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SET_TX_DESC_TX_RATE_92E(pDesc, MRateToHwRate(pmlmeext->tx_rate));
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//
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// Encrypt the data frame if under security mode excepct null data. Suggested by CCW.
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//
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if (_TRUE ==bDataFrame)
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{
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struct pkt_attrib pattrib;
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pattrib.encrypt = padapter->securitypriv.dot11PrivacyAlgrthm;
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pattrib.bswenc = _FALSE;
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fill_txdesc_sectype(&pattrib, pDesc);
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}
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#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)
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// USB interface drop packet if the checksum of descriptor isn't correct.
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// Using this checksum can let hardware recovery from packet bulk out error (e.g. Cancel URC, Bulk out error.).
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rtl8192e_cal_txdesc_chksum(pDesc);
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#endif
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}
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