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Updated to 4.4.1

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This commit is contained in:
CGarces
2017-05-11 20:47:23 +02:00
parent 9dde4572b4
commit 3d6c7de21a
396 changed files with 174471 additions and 106990 deletions
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1965
hal/rtl8192e/rtl8192e_cmd.c
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File diff suppressed because it is too large Load Diff

140
hal/rtl8192e/rtl8192e_dm.c
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@@ -243,15 +243,13 @@ dm_InitGPIOSetting(
//============================================================
static void Init_ODM_ComInfo_8192e(PADAPTER Adapter)
{
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
PDM_ODM_T pDM_Odm = &(pHalData->odmpriv);
u32 SupportAbility = 0;
u8 cut_ver,fab_ver;
Init_ODM_ComInfo(Adapter);
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_IC_TYPE,ODM_RTL8192E);
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_FAB_VER,pHalData->VersionID.VendorType);
if(IS_A_CUT(pHalData->VersionID))
@@ -267,29 +265,25 @@ static void Init_ODM_ComInfo_8192e(PADAPTER Adapter)
else
cut_ver = ODM_CUT_A;
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_CUT_VER,cut_ver);
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_ANTENNA_TYPE, pHalData->TRxAntDivType);
#ifdef CONFIG_DISABLE_ODM
pdmpriv->InitODMFlag = 0;
SupportAbility = 0;
#else
pdmpriv->InitODMFlag = ODM_RF_CALIBRATION |
ODM_RF_TX_PWR_TRACK //|
;
//if(pHalData->AntDivCfg)
// pdmpriv->InitODMFlag |= ODM_BB_ANT_DIV;
SupportAbility = ODM_RF_CALIBRATION |
ODM_RF_TX_PWR_TRACK
;
#endif
ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_ABILITY,pdmpriv->InitODMFlag);
ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_ABILITY,SupportAbility);
}
static void Update_ODM_ComInfo_8192e(PADAPTER Adapter)
{
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
PDM_ODM_T pDM_Odm = &(pHalData->odmpriv);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
u32 SupportAbility = 0;
pdmpriv->InitODMFlag = 0
SupportAbility = 0
| ODM_BB_DIG
| ODM_BB_RA_MASK
//| ODM_BB_DYNAMIC_TXPWR
@@ -298,7 +292,6 @@ static void Update_ODM_ComInfo_8192e(PADAPTER Adapter)
//| ODM_BB_CCK_PD
//| ODM_BB_PWR_SAVE
| ODM_BB_CFO_TRACKING
| ODM_MAC_EDCA_TURBO
| ODM_RF_CALIBRATION
| ODM_RF_TX_PWR_TRACK
| ODM_BB_PRIMARY_CCA
@@ -306,15 +299,23 @@ static void Update_ODM_ComInfo_8192e(PADAPTER Adapter)
// | ODM_BB_PWR_TRAIN
;
if (rtw_odm_adaptivity_needed(Adapter) == _TRUE)
pdmpriv->InitODMFlag |= ODM_BB_ADAPTIVITY;
if (rtw_odm_adaptivity_needed(Adapter) == _TRUE) {
rtw_odm_adaptivity_config_msg(RTW_DBGDUMP, Adapter);
SupportAbility |= ODM_BB_ADAPTIVITY;
}
if(!Adapter->registrypriv.qos_opt_enable){
SupportAbility |= ODM_MAC_EDCA_TURBO;
}
if(pHalData->AntDivCfg)
pdmpriv->InitODMFlag |= ODM_BB_ANT_DIV;
#ifdef CONFIG_ANTENNA_DIVERSITY
if (pHalData->AntDivCfg)
SupportAbility |= ODM_BB_ANT_DIV;
#endif
#if (MP_DRIVER==1)
if (Adapter->registrypriv.mp_mode == 1) {
pdmpriv->InitODMFlag = 0
SupportAbility = 0
| ODM_RF_CALIBRATION
| ODM_RF_TX_PWR_TRACK
;
@@ -322,12 +323,10 @@ static void Update_ODM_ComInfo_8192e(PADAPTER Adapter)
#endif//(MP_DRIVER==1)
#ifdef CONFIG_DISABLE_ODM
pdmpriv->InitODMFlag = 0;
SupportAbility = 0;
#endif//CONFIG_DISABLE_ODM
ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_ABILITY,pdmpriv->InitODMFlag);
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_ANTENNA_TYPE, pHalData->TRxAntDivType);
ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_ABILITY,SupportAbility);
}
void
@@ -335,8 +334,7 @@ rtl8192e_InitHalDm(
IN PADAPTER Adapter
)
{
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
PDM_ODM_T pDM_Odm = &(pHalData->odmpriv);
u8 i;
@@ -344,9 +342,7 @@ rtl8192e_InitHalDm(
dm_InitGPIOSetting(Adapter);
#endif
pdmpriv->DM_Type = DM_Type_ByDriver;
pdmpriv->DMFlag = DYNAMIC_FUNC_DISABLE;
pHalData->DM_Type = DM_Type_ByDriver;
Update_ODM_ComInfo_8192e(Adapter);
ODM_DMInit(pDM_Odm);
@@ -363,9 +359,7 @@ rtl8192e_HalDmWatchDog(
{
BOOLEAN bFwCurrentInPSMode = _FALSE;
BOOLEAN bFwPSAwake = _TRUE;
u8 hw_init_completed = _FALSE;
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
PDM_ODM_T pDM_Odm = &(pHalData->odmpriv);
#ifdef CONFIG_CONCURRENT_MODE
PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter;
@@ -373,9 +367,7 @@ rtl8192e_HalDmWatchDog(
_func_enter_;
hw_init_completed = Adapter->hw_init_completed;
if (hw_init_completed == _FALSE)
if (!rtw_is_hw_init_completed(Adapter))
goto skip_dm;
#ifdef CONFIG_LPS
@@ -390,9 +382,8 @@ rtl8192e_HalDmWatchDog(
bFwPSAwake = _FALSE;
#endif //CONFIG_P2P_PS
if( (hw_init_completed == _TRUE)
&& ((!bFwCurrentInPSMode) && bFwPSAwake))
{
if ((rtw_is_hw_init_completed(Adapter))
&& ((!bFwCurrentInPSMode) && bFwPSAwake)) {
//
// Calculate Tx/Rx statistics.
//
@@ -416,7 +407,7 @@ rtl8192e_HalDmWatchDog(
//ODM
if (hw_init_completed == _TRUE)
if (rtw_is_hw_init_completed(Adapter))
{
u8 bLinked=_FALSE;
u8 bsta_state=_FALSE;
@@ -466,87 +457,20 @@ skip_dm:
void rtl8192e_init_dm_priv(IN PADAPTER Adapter)
{
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
PDM_ODM_T podmpriv = &pHalData->odmpriv;
_rtw_memset(pdmpriv, 0, sizeof(struct dm_priv));
//_rtw_spinlock_init(&(pHalData->odm_stainfo_lock));
Init_ODM_ComInfo_8192e(Adapter);
ODM_InitAllTimers(podmpriv );
ODM_InitDebugSetting(podmpriv);
PHYDM_InitDebugSetting(podmpriv);
}
void rtl8192e_deinit_dm_priv(IN PADAPTER Adapter)
{
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
PDM_ODM_T podmpriv = &pHalData->odmpriv;
//_rtw_spinlock_free(&pHalData->odm_stainfo_lock);
ODM_CancelAllTimers(podmpriv);
ODM_CancelAllTimers(podmpriv);
}
#ifdef CONFIG_ANTENNA_DIVERSITY
// Add new function to reset the state of antenna diversity before link.
//
// Compare RSSI for deciding antenna
void AntDivCompare8192e(PADAPTER Adapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src)
{
//PADAPTER Adapter = pDM_Odm->Adapter ;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
if(0 != pHalData->AntDivCfg )
{
//DBG_8192C("update_network=> orgRSSI(%d)(%d),newRSSI(%d)(%d)\n",dst->Rssi,query_rx_pwr_percentage(dst->Rssi),
// src->Rssi,query_rx_pwr_percentage(src->Rssi));
//select optimum_antenna for before linked =>For antenna diversity
if(dst->Rssi >= src->Rssi )//keep org parameter
{
src->Rssi = dst->Rssi;
src->PhyInfo.Optimum_antenna = dst->PhyInfo.Optimum_antenna;
}
}
}
// Add new function to reset the state of antenna diversity before link.
u8 AntDivBeforeLink8192e(PADAPTER Adapter )
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
PDM_ODM_T pDM_Odm =&pHalData->odmpriv;
SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv);
// Condition that does not need to use antenna diversity.
if(pHalData->AntDivCfg==0)
{
//DBG_8192C("odm_AntDivBeforeLink8192C(): No AntDiv Mechanism.\n");
return _FALSE;
}
if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)
{
return _FALSE;
}
if(pDM_SWAT_Table->SWAS_NoLink_State == 0){
//switch channel
pDM_SWAT_Table->SWAS_NoLink_State = 1;
pDM_SWAT_Table->CurAntenna = (pDM_SWAT_Table->CurAntenna==MAIN_ANT)?AUX_ANT:MAIN_ANT;
//PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, pDM_SWAT_Table->CurAntenna);
rtw_antenna_select_cmd(Adapter, pDM_SWAT_Table->CurAntenna, _FALSE);
//DBG_8192C("%s change antenna to ANT_( %s ).....\n",__FUNCTION__, (pDM_SWAT_Table->CurAntenna==MAIN_ANT)?"MAIN":"AUX");
return _TRUE;
}
else
{
pDM_SWAT_Table->SWAS_NoLink_State = 0;
return _FALSE;
}
}
#endif

2161
hal/rtl8192e/rtl8192e_hal_init.c
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File diff suppressed because it is too large Load Diff

1082
hal/rtl8192e/rtl8192e_mp.c
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File diff suppressed because it is too large Load Diff

475
hal/rtl8192e/rtl8192e_phycfg.c
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File diff suppressed because it is too large Load Diff

245
hal/rtl8192e/rtl8192e_rxdesc.c
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@@ -22,151 +22,6 @@
//#include <drv_types.h>
#include <rtl8192e_hal.h>
static void process_rssi(_adapter *padapter,union recv_frame *prframe)
{
u32 last_rssi, tmp_val;
struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib;
#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
struct signal_stat * signal_stat = &padapter->recvpriv.signal_strength_data;
#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS
//DBG_8192C("process_rssi=> pattrib->rssil(%d) signal_strength(%d)\n ",pattrib->RecvSignalPower,pattrib->signal_strength);
//if(pRfd->Status.bPacketToSelf || pRfd->Status.bPacketBeacon)
{
#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
if(signal_stat->update_req) {
signal_stat->total_num = 0;
signal_stat->total_val = 0;
signal_stat->update_req = 0;
}
signal_stat->total_num++;
signal_stat->total_val += pattrib->phy_info.SignalStrength;
signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num;
#else //CONFIG_NEW_SIGNAL_STAT_PROCESS
//Adapter->RxStats.RssiCalculateCnt++; //For antenna Test
if(padapter->recvpriv.signal_strength_data.total_num++ >= PHY_RSSI_SLID_WIN_MAX)
{
padapter->recvpriv.signal_strength_data.total_num = PHY_RSSI_SLID_WIN_MAX;
last_rssi = padapter->recvpriv.signal_strength_data.elements[padapter->recvpriv.signal_strength_data.index];
padapter->recvpriv.signal_strength_data.total_val -= last_rssi;
}
padapter->recvpriv.signal_strength_data.total_val +=pattrib->phy_info.SignalStrength;
padapter->recvpriv.signal_strength_data.elements[padapter->recvpriv.signal_strength_data.index++] = pattrib->phy_info.SignalStrength;
if(padapter->recvpriv.signal_strength_data.index >= PHY_RSSI_SLID_WIN_MAX)
padapter->recvpriv.signal_strength_data.index = 0;
tmp_val = padapter->recvpriv.signal_strength_data.total_val/padapter->recvpriv.signal_strength_data.total_num;
if(padapter->recvpriv.is_signal_dbg) {
padapter->recvpriv.signal_strength= padapter->recvpriv.signal_strength_dbg;
padapter->recvpriv.rssi=(s8)translate_percentage_to_dbm(padapter->recvpriv.signal_strength_dbg);
} else {
padapter->recvpriv.signal_strength= tmp_val;
padapter->recvpriv.rssi=(s8)translate_percentage_to_dbm(tmp_val);
}
RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("UI RSSI = %d, ui_rssi.TotalVal = %d, ui_rssi.TotalNum = %d\n", tmp_val, padapter->recvpriv.signal_strength_data.total_val,padapter->recvpriv.signal_strength_data.total_num));
#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS
}
}// Process_UI_RSSI_8192C
static void process_link_qual(_adapter *padapter,union recv_frame *prframe)
{
u32 last_evm=0, tmpVal;
struct rx_pkt_attrib *pattrib;
#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
struct signal_stat * signal_stat;
#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS
if(prframe == NULL || padapter==NULL){
return;
}
pattrib = &prframe->u.hdr.attrib;
#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
signal_stat = &padapter->recvpriv.signal_qual_data;
#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS
//DBG_8192C("process_link_qual=> pattrib->signal_qual(%d)\n ",pattrib->signal_qual);
#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
if(signal_stat->update_req) {
signal_stat->total_num = 0;
signal_stat->total_val = 0;
signal_stat->update_req = 0;
}
signal_stat->total_num++;
signal_stat->total_val += pattrib->phy_info.SignalQuality;
signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num;
#else //CONFIG_NEW_SIGNAL_STAT_PROCESS
if(pattrib->phy_info.SignalQuality != 0)
{
//
// 1. Record the general EVM to the sliding window.
//
if(padapter->recvpriv.signal_qual_data.total_num++ >= PHY_LINKQUALITY_SLID_WIN_MAX)
{
padapter->recvpriv.signal_qual_data.total_num = PHY_LINKQUALITY_SLID_WIN_MAX;
last_evm = padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index];
padapter->recvpriv.signal_qual_data.total_val -= last_evm;
}
padapter->recvpriv.signal_qual_data.total_val += pattrib->phy_info.SignalQuality;
padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index++] = pattrib->phy_info.SignalQuality;
if(padapter->recvpriv.signal_qual_data.index >= PHY_LINKQUALITY_SLID_WIN_MAX)
padapter->recvpriv.signal_qual_data.index = 0;
RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("Total SQ=%d pattrib->signal_qual= %d\n", padapter->recvpriv.signal_qual_data.total_val, pattrib->phy_info.SignalQuality));
// <1> Showed on UI for user, in percentage.
tmpVal = padapter->recvpriv.signal_qual_data.total_val/padapter->recvpriv.signal_qual_data.total_num;
padapter->recvpriv.signal_qual=(u8)tmpVal;
}
else
{
RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" pattrib->signal_qual =%d\n", pattrib->phy_info.SignalQuality));
}
#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS
}
static void process_phy_info(_adapter *padapter, void *prframe)
{
union recv_frame *precvframe = (union recv_frame *)prframe;
//
// Check RSSI
//
process_rssi(padapter, precvframe);
//
// Check PWDB.
//
//process_PWDB(padapter, precvframe);
//UpdateRxSignalStatistics8192C(Adapter, pRfd);
//
// Check EVM
//
process_link_qual(padapter, precvframe);
#ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA
rtw_store_phy_info( padapter,prframe);
#endif
}
void rtl8192e_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc)
{
struct rx_pkt_attrib *pattrib = &precvframe->u.hdr.attrib;
@@ -206,103 +61,3 @@ void rtl8192e_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc)
}
/*
* Notice:
* Before calling this function,
* precvframe->u.hdr.rx_data should be ready!
*/
void rtl8192e_query_rx_phy_status(
union recv_frame *precvframe,
u8 *pphy_status)
{
PADAPTER padapter = precvframe->u.hdr.adapter;
struct rx_pkt_attrib *pattrib = &precvframe->u.hdr.attrib;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
PODM_PHY_INFO_T pPHYInfo = (PODM_PHY_INFO_T)(&pattrib->phy_info);
u8 *wlanhdr;
ODM_PACKET_INFO_T pkt_info;
u8 *sa;
struct sta_priv *pstapriv;
struct sta_info *psta;
//_irqL irqL;
pkt_info.bPacketMatchBSSID =_FALSE;
pkt_info.bPacketToSelf = _FALSE;
pkt_info.bPacketBeacon = _FALSE;
wlanhdr = get_recvframe_data(precvframe);
pkt_info.bPacketMatchBSSID = ((!IsFrameTypeCtrl(wlanhdr)) &&
!pattrib->icv_err && !pattrib->crc_err &&
_rtw_memcmp(get_hdr_bssid(wlanhdr), get_bssid(&padapter->mlmepriv), ETH_ALEN));
pkt_info.bToSelf = ((!pattrib->icv_err) && (!pattrib->crc_err)) && (_rtw_memcmp(get_ra(wlanhdr), myid(&padapter->eeprompriv), ETH_ALEN));
pkt_info.bPacketToSelf = pkt_info.bPacketMatchBSSID && (_rtw_memcmp(get_ra(wlanhdr), myid(&padapter->eeprompriv), ETH_ALEN));
pkt_info.bPacketBeacon = pkt_info.bPacketMatchBSSID && (GetFrameSubType(wlanhdr) == WIFI_BEACON);
/*
if(pkt_info.bPacketBeacon){
if(check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE) == _TRUE){
sa = padapter->mlmepriv.cur_network.network.MacAddress;
#if 0
{
DBG_8192C("==> rx beacon from AP[%02x:%02x:%02x:%02x:%02x:%02x]\n",
sa[0],sa[1],sa[2],sa[3],sa[4],sa[5]);
}
#endif
}
else
{
//to do Ad-hoc
sa = NULL;
}
}
else{
sa = get_sa(wlanhdr);
}
*/
sa = get_ta(wlanhdr);
pstapriv = &padapter->stapriv;
pkt_info.StationID = 0xFF;
psta = rtw_get_stainfo(pstapriv, sa);
if (psta)
{
pkt_info.StationID = psta->mac_id;
//DBG_8192C("%s ==> StationID(%d)\n",__FUNCTION__,pkt_info.StationID);
}
pkt_info.DataRate = pattrib->data_rate;
//rtl8192e_query_rx_phy_status(precvframe, pphy_status);
//_enter_critical_bh(&pHalData->odm_stainfo_lock, &irqL);
ODM_PhyStatusQuery(&pHalData->odmpriv,pPHYInfo,pphy_status,&(pkt_info));
if(psta) psta->rssi = pattrib->phy_info.RecvSignalPower;
//_exit_critical_bh(&pHalData->odm_stainfo_lock, &irqL);
precvframe->u.hdr.psta = NULL;
if (pkt_info.bPacketMatchBSSID &&
(check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE))
{
if (psta)
{
precvframe->u.hdr.psta = psta;
process_phy_info(padapter, precvframe);
}
}
else if (pkt_info.bPacketToSelf || pkt_info.bPacketBeacon)
{
if (check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE)
{
if (psta)
{
precvframe->u.hdr.psta = psta;
}
}
process_phy_info(padapter, precvframe);
}
}

6
hal/rtl8192e/rtl8192e_sreset.c
View File

@@ -55,10 +55,10 @@ void rtl8192e_sreset_xmit_status_check(_adapter *padapter)
else{
diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_complete_time);
if (diff_time > 4000) {
u32 ability;
u32 ability = 0;
//padapter->Wifi_Error_Status = WIFI_TX_HANG;
rtw_hal_get_hwreg(padapter, HW_VAR_DM_FLAG, (u8*)&ability);
ability = rtw_phydm_ability_get(padapter);
DBG_871X("%s tx hang %s\n", __FUNCTION__,
(ability & ODM_BB_ADAPTIVITY)? "ODM_BB_ADAPTIVITY" : "");
@@ -86,7 +86,7 @@ void rtl8192e_sreset_linked_status_check(_adapter *padapter)
u32 rx_dma_status = 0;
rx_dma_status = rtw_read32(padapter,REG_RXDMA_STATUS);
if(rx_dma_status!= 0x00){
DBG_8192C("%s REG_RXDMA_STATUS:0x%08x",__FUNCTION__,rx_dma_status);
DBG_8192C("%s REG_RXDMA_STATUS:0x%08x\n",__FUNCTION__,rx_dma_status);
}
#if 0
u32 regc50,regc58,reg824,reg800;

206
hal/rtl8192e/rtl8192e_xmit.c
View File

@@ -22,6 +22,20 @@
//#include <drv_types.h>
#include <rtl8192e_hal.h>
s32 rtl8192e_init_xmit_priv(_adapter *padapter)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
#ifdef CONFIG_TX_EARLY_MODE
pHalData->bEarlyModeEnable = padapter->registrypriv.early_mode;
#endif
pxmitpriv->hw_ssn_seq_no = rtw_get_hwseq_no(padapter);
pxmitpriv->nqos_ssn = 0;
return _SUCCESS;
}
void _dbg_dump_tx_info(_adapter *padapter,int frame_tag, u8 *ptxdesc)
{
u8 bDumpTxPkt;
@@ -250,6 +264,99 @@ void UpdateEarlyModeInfo8192E(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmit
}
#endif
#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) ||(DEV_BUS_TYPE == RT_SDIO_INTERFACE))
void rtl8192e_cal_txdesc_chksum(u8 *ptxdesc)
{
u16 *usPtr = (u16*)ptxdesc;
u32 count = 16; // (32 bytes / 2 bytes per XOR) => 16 times
u32 index;
u16 checksum = 0;
//Clear first
SET_TX_DESC_TX_DESC_CHECKSUM_92E(ptxdesc, 0);
for(index = 0 ; index < count ; index++){
checksum = checksum ^ le16_to_cpu(*(usPtr + index));
}
SET_TX_DESC_TX_DESC_CHECKSUM_92E(ptxdesc, checksum);
}
#endif
void fill_txdesc_sectype(struct pkt_attrib *pattrib, u8 *ptxdesc)
{
if ((pattrib->encrypt > 0) && !pattrib->bswenc)
{
switch (pattrib->encrypt)
{
//SEC_TYPE : 0:NO_ENC,1:WEP40/TKIP,2:WAPI,3:AES
case _WEP40_:
case _WEP104_:
case _TKIP_:
case _TKIP_WTMIC_:
SET_TX_DESC_SEC_TYPE_92E(ptxdesc, 0x1);
break;
#ifdef CONFIG_WAPI_SUPPORT
case _SMS4_:
SET_TX_DESC_SEC_TYPE_92E(ptxdesc, 0x2);
break;
#endif
case _AES_:
SET_TX_DESC_SEC_TYPE_92E(ptxdesc, 0x3);
break;
case _NO_PRIVACY_:
default:
SET_TX_DESC_SEC_TYPE_92E(ptxdesc, 0x0);
break;
}
}
}
void fill_txdesc_vcs(struct pkt_attrib *pattrib, u8 *ptxdesc)
{
//DBG_8192C("cvs_mode=%d\n", pattrib->vcs_mode);
SET_TX_DESC_HW_RTS_ENABLE_92E(ptxdesc, 0);
switch(pattrib->vcs_mode)
{
case RTS_CTS:
SET_TX_DESC_RTS_ENABLE_92E(ptxdesc, 1);
break;
case CTS_TO_SELF:
SET_TX_DESC_CTS2SELF_92E(ptxdesc, 1);
break;
case NONE_VCS:
default:
break;
}
#if 0 //to do
// Protection mode related
if(pTcb->bRTSEnable || pTcb->bCTSEnable)
{
SET_TX_DESC_CCA_RTS_92E(pDesc, pTcb->RTSCCA);
//SET_TX_DESC_RTS_ENABLE_92E(pDesc, ((pTcb->bRTSEnable && !pTcb->bCTSEnable) ? 1 : 0));
//SET_TX_DESC_CTS2SELF_92E(pDesc, ((pTcb->bCTSEnable) ? 1 : 0));
SET_TX_DESC_CTROL_STBC_92E(pDesc, ((pTcb->bRTSSTBC) ? 1 : 0));
SET_TX_DESC_RTS_SHORT_92E(pDesc, pTcb->bRTSShort);
SET_TX_DESC_RTS_RATE_92E(pDesc, MRateToHwRate((u1Byte)pTcb->RTSRate));
if(pMgntInfo->ForcedProtectionMode == PROTECTION_MODE_FORCE_ENABLE)
{
SET_TX_DESC_RTS_RATE_FB_LIMIT_92E(pDesc, 1);
}
else
{
SET_TX_DESC_RTS_RATE_FB_LIMIT_92E(pDesc, 0xF);
}
}
#endif
}
u8
BWMapping_92E(
IN PADAPTER Adapter,
@@ -300,7 +407,7 @@ SCMapping_92E(
else if(pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)
SCSettingOfDesc = VHT_DATA_SC_40_UPPER_OF_80MHZ;
else
DBG_871X("%s- CurrentChannelBW:%d, SCMapping: Not Correct Primary40MHz Setting \n",__FUNCTION__,pHalData->CurrentChannelBW);
DBG_871X("%s- CurrentChannelBW:%d, SCMapping: DONOT CARE Mode Setting\n", __func__, pHalData->CurrentChannelBW);
}
else
{
@@ -313,7 +420,7 @@ SCMapping_92E(
else if((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER))
SCSettingOfDesc = VHT_DATA_SC_20_UPPERST_OF_80MHZ;
else
DBG_871X("%s- CurrentChannelBW:%d, SCMapping: Not Correct Primary40MHz Setting \n",__FUNCTION__,pHalData->CurrentChannelBW);
DBG_871X("%s- CurrentChannelBW:%d, SCMapping: DONOT CARE Mode Setting\n", __func__, pHalData->CurrentChannelBW);
}
}
else if(pHalData->CurrentChannelBW== CHANNEL_WIDTH_40)
@@ -349,4 +456,99 @@ SCMapping_92E(
return SCSettingOfDesc;
}
void fill_txdesc_phy(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc)
{
//DBG_8192C("bwmode=%d, ch_off=%d\n", pattrib->bwmode, pattrib->ch_offset);
if(pattrib->ht_en)
{
// Set Bandwidth and sub-channel settings.
SET_TX_DESC_DATA_BW_92E(ptxdesc, BWMapping_92E(padapter,pattrib));
SET_TX_DESC_DATA_SC_92E(ptxdesc, SCMapping_92E(padapter,pattrib));
}
}
void rtl8192e_fixed_rate(_adapter *padapter,u8 *ptxdesc)
{
if(padapter->fix_rate!= 0xFF){
SET_TX_DESC_USE_RATE_92E(ptxdesc, 1);
//if(pHalData->INIDATA_RATE[pattrib->mac_id] & BIT(7))
{
if(padapter->fix_rate & BIT(7))
SET_TX_DESC_DATA_SHORT_92E(ptxdesc, 1);
}
SET_TX_DESC_TX_RATE_92E(ptxdesc, (padapter->fix_rate & 0x7F));
//SET_TX_DESC_DISABLE_FB_92E(ptxdesc,1);
if (!padapter->data_fb)
SET_TX_DESC_DISABLE_FB_92E(ptxdesc,1);
//ptxdesc->datarate = padapter->fix_rate;
}
}
//
// Description: In normal chip, we should send some packet to Hw which will be used by Fw
// in FW LPS mode. The function is to fill the Tx descriptor of this packets, then
// Fw can tell Hw to send these packet derectly.
//
void rtl8192e_fill_fake_txdesc(
PADAPTER padapter,
u8* pDesc,
u32 BufferLen,
u8 IsPsPoll,
u8 IsBTQosNull,
u8 bDataFrame)
{
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
// Clear all status
_rtw_memset(pDesc, 0, TXDESC_SIZE);
SET_TX_DESC_OFFSET_92E(pDesc, (TXDESC_SIZE+OFFSET_SZ));
SET_TX_DESC_PKT_SIZE_92E(pDesc, BufferLen);
if (pmlmeext->cur_wireless_mode & WIRELESS_11B) {
SET_TX_DESC_RATE_ID_92E(pDesc, RATEID_IDX_B);
} else {
SET_TX_DESC_RATE_ID_92E(pDesc, RATEID_IDX_G);
}
SET_TX_DESC_QUEUE_SEL_92E(pDesc, QSLT_MGNT);
//Set NAVUSEHDR to prevent Ps-poll AId filed to be changed to error vlaue by Hw.
if (IsPsPoll)
{
SET_TX_DESC_NAV_USE_HDR_92E(pDesc, 1);
}
else
{
SET_TX_DESC_EN_HWSEQ_92E(pDesc, 1); // Hw set sequence number
SET_TX_DESC_HWSEQ_SEL_92E(pDesc, pxmitpriv->hw_ssn_seq_no);
}
SET_TX_DESC_USE_RATE_92E(pDesc, 1);
SET_TX_DESC_TX_RATE_92E(pDesc, MRateToHwRate(pmlmeext->tx_rate));
//
// Encrypt the data frame if under security mode excepct null data. Suggested by CCW.
//
if (_TRUE ==bDataFrame)
{
struct pkt_attrib pattrib;
pattrib.encrypt = padapter->securitypriv.dot11PrivacyAlgrthm;
pattrib.bswenc = _FALSE;
fill_txdesc_sectype(&pattrib, pDesc);
}
#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)
// USB interface drop packet if the checksum of descriptor isn't correct.
// Using this checksum can let hardware recovery from packet bulk out error (e.g. Cancel URC, Bulk out error.).
rtl8192e_cal_txdesc_chksum(pDesc);
#endif
}

8
hal/rtl8192e/usb/rtl8192eu_led.c
View File

@@ -50,10 +50,8 @@ SwLedOn_8192EU(
u8 LedCfg;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE))
{
if (RTW_CANNOT_RUN(padapter))
return;
}
if( RT_GetInterfaceSelection(padapter) == INTF_SEL2_MINICARD ||
RT_GetInterfaceSelection(padapter) == INTF_SEL3_USB_Solo ||
@@ -131,10 +129,8 @@ SwLedOff_8192EU(
u8 LedCfg;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
if(padapter->bSurpriseRemoved == _TRUE)
{
if (RTW_CANNOT_RUN(padapter))
return;
}
if( RT_GetInterfaceSelection(padapter) == INTF_SEL2_MINICARD ||
RT_GetInterfaceSelection(padapter) == INTF_SEL3_USB_Solo ||

208
hal/rtl8192e/usb/rtl8192eu_recv.c
View File

@@ -22,215 +22,13 @@
//#include <drv_types.h>
#include <rtl8192e_hal.h>
void rtl8192eu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf)
{
precvbuf->transfer_len = 0;
precvbuf->len = 0;
precvbuf->ref_cnt = 0;
if(precvbuf->pbuf)
{
precvbuf->pdata = precvbuf->phead = precvbuf->ptail = precvbuf->pbuf;
precvbuf->pend = precvbuf->pdata + MAX_RECVBUF_SZ;
}
}
int rtl8192eu_init_recv_priv(_adapter *padapter)
{
struct recv_priv *precvpriv = &padapter->recvpriv;
int i, res = _SUCCESS;
struct recv_buf *precvbuf;
#ifdef CONFIG_RECV_THREAD_MODE
_rtw_init_sema(&precvpriv->recv_sema, 0);//will be removed
_rtw_init_sema(&precvpriv->terminate_recvthread_sema, 0);//will be removed
#endif
#ifdef PLATFORM_LINUX
tasklet_init(&precvpriv->recv_tasklet,
(void(*)(unsigned long))rtl8192eu_recv_tasklet,
(unsigned long)padapter);
#endif
#ifdef CONFIG_USB_INTERRUPT_IN_PIPE
#ifdef PLATFORM_LINUX
precvpriv->int_in_urb = usb_alloc_urb(0, GFP_KERNEL);
if(precvpriv->int_in_urb == NULL){
res= _FAIL;
DBG_8192C("alloc_urb for interrupt in endpoint fail !!!!\n");
goto exit;
}
#endif
precvpriv->int_in_buf = rtw_zmalloc(INTERRUPT_MSG_FORMAT_LEN);
if(precvpriv->int_in_buf == NULL){
res= _FAIL;
DBG_8192C("alloc_mem for interrupt in endpoint fail !!!!\n");
goto exit;
}
#endif
//init recv_buf
_rtw_init_queue(&precvpriv->free_recv_buf_queue);
_rtw_init_queue(&precvpriv->recv_buf_pending_queue);
precvpriv->pallocated_recv_buf = rtw_zmalloc(NR_RECVBUFF *sizeof(struct recv_buf) + 4);
if(precvpriv->pallocated_recv_buf==NULL){
res= _FAIL;
RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("alloc recv_buf fail!\n"));
goto exit;
}
_rtw_memset(precvpriv->pallocated_recv_buf, 0, NR_RECVBUFF *sizeof(struct recv_buf) + 4);
precvpriv->precv_buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(precvpriv->pallocated_recv_buf), 4);
precvbuf = (struct recv_buf*)precvpriv->precv_buf;
for(i=0; i < NR_RECVBUFF ; i++)
{
_rtw_init_listhead(&precvbuf->list);
_rtw_spinlock_init(&precvbuf->recvbuf_lock);
precvbuf->alloc_sz = MAX_RECVBUF_SZ;
res = rtw_os_recvbuf_resource_alloc(padapter, precvbuf);
if(res==_FAIL)
break;
precvbuf->ref_cnt = 0;
precvbuf->adapter =padapter;
//rtw_list_insert_tail(&precvbuf->list, &(precvpriv->free_recv_buf_queue.queue));
precvbuf++;
}
precvpriv->free_recv_buf_queue_cnt = NR_RECVBUFF;
#ifdef PLATFORM_LINUX
skb_queue_head_init(&precvpriv->rx_skb_queue);
#ifdef CONFIG_PREALLOC_RECV_SKB
{
int i;
SIZE_PTR tmpaddr=0;
SIZE_PTR alignment=0;
struct sk_buff *pskb=NULL;
skb_queue_head_init(&precvpriv->free_recv_skb_queue);
for(i=0; i<NR_PREALLOC_RECV_SKB; i++)
{
#ifdef CONFIG_PREALLOC_RX_SKB_BUFFER
pskb = rtw_alloc_skb_premem();
#else
pskb = rtw_skb_alloc(MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ);
#endif //CONFIG_PREALLOC_RX_SKB_BUFFER
if(pskb)
{
pskb->dev = padapter->pnetdev;
#ifndef CONFIG_PREALLOC_RX_SKB_BUFFER
tmpaddr = (SIZE_PTR)pskb->data;
alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1);
skb_reserve(pskb, (RECVBUFF_ALIGN_SZ - alignment));
#endif //!
skb_queue_tail(&precvpriv->free_recv_skb_queue, pskb);
}
pskb=NULL;
}
}
#endif
#endif
exit:
return res;
return usb_init_recv_priv(padapter, INTERRUPT_MSG_FORMAT_LEN);
}
void rtl8192eu_free_recv_priv (_adapter *padapter)
void rtl8192eu_free_recv_priv(_adapter *padapter)
{
int i;
struct recv_buf *precvbuf;
struct recv_priv *precvpriv = &padapter->recvpriv;
precvbuf = (struct recv_buf *)precvpriv->precv_buf;
for(i=0; i < NR_RECVBUFF ; i++)
{
rtw_os_recvbuf_resource_free(padapter, precvbuf);
precvbuf++;
}
if(precvpriv->pallocated_recv_buf)
rtw_mfree(precvpriv->pallocated_recv_buf, NR_RECVBUFF *sizeof(struct recv_buf) + 4);
#ifdef CONFIG_USB_INTERRUPT_IN_PIPE
#ifdef PLATFORM_LINUX
if(precvpriv->int_in_urb)
{
usb_free_urb(precvpriv->int_in_urb);
}
#endif//PLATFORM_LINUX
if(precvpriv->int_in_buf)
rtw_mfree(precvpriv->int_in_buf, INTERRUPT_MSG_FORMAT_LEN);
#endif//CONFIG_USB_INTERRUPT_IN_PIPE
#ifdef PLATFORM_LINUX
if (skb_queue_len(&precvpriv->rx_skb_queue)) {
DBG_8192C(KERN_WARNING "rx_skb_queue not empty\n");
}
rtw_skb_queue_purge(&precvpriv->rx_skb_queue);
#ifdef CONFIG_PREALLOC_RECV_SKB
if (skb_queue_len(&precvpriv->free_recv_skb_queue)) {
DBG_8192C(KERN_WARNING "free_recv_skb_queue not empty, %d\n", skb_queue_len(&precvpriv->free_recv_skb_queue));
}
#ifdef CONFIG_PREALLOC_RX_SKB_BUFFER
{
int i=0;
struct sk_buff *skb;
while ((skb = skb_dequeue(&precvpriv->free_recv_skb_queue)) != NULL)
{
if(i<NR_PREALLOC_RECV_SKB)
rtw_free_skb_premem(skb);
else
_rtw_skb_free(skb);
i++;
}
}
#else
rtw_skb_queue_purge(&precvpriv->free_recv_skb_queue);
#endif //CONFIG_PREALLOC_RX_SKB_BUFFER
#endif
#endif
usb_free_recv_priv(padapter, INTERRUPT_MSG_FORMAT_LEN);
}

226
hal/rtl8192e/usb/rtl8192eu_xmit.c
View File

@@ -33,9 +33,7 @@ s32 rtl8192eu_init_xmit_priv(_adapter *padapter)
(void(*)(unsigned long))rtl8192eu_xmit_tasklet,
(unsigned long)padapter);
#endif
#ifdef CONFIG_TX_EARLY_MODE
pHalData->bEarlyModeEnable = padapter->registrypriv.early_mode;
#endif
rtl8192e_init_xmit_priv(padapter);
return _SUCCESS;
}
@@ -53,138 +51,6 @@ u8 urb_zero_packet_chk(_adapter *padapter, int sz)
return blnSetTxDescOffset;
}
void rtl8192e_cal_txdesc_chksum(u8 *ptxdesc)
{
u16 *usPtr = (u16*)ptxdesc;
u32 count = 16; // (32 bytes / 2 bytes per XOR) => 16 times
u32 index;
u16 checksum = 0;
//Clear first
SET_TX_DESC_TX_DESC_CHECKSUM_92E(ptxdesc, 0);
for(index = 0 ; index < count ; index++){
checksum = checksum ^ le16_to_cpu(*(usPtr + index));
}
SET_TX_DESC_TX_DESC_CHECKSUM_92E(ptxdesc, checksum);
}
//
// Description: In normal chip, we should send some packet to Hw which will be used by Fw
// in FW LPS mode. The function is to fill the Tx descriptor of this packets, then
// Fw can tell Hw to send these packet derectly.
//
void rtl8192e_fill_fake_txdesc(
PADAPTER padapter,
u8* pDesc,
u32 BufferLen,
u8 IsPsPoll,
u8 IsBTQosNull)
{
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
// Clear all status
_rtw_memset(pDesc, 0, TXDESC_SIZE);
SET_TX_DESC_OFFSET_92E(pDesc, (TXDESC_SIZE+OFFSET_SZ));
SET_TX_DESC_PKT_SIZE_92E(pDesc, BufferLen);
if (pmlmeext->cur_wireless_mode & WIRELESS_11B) {
SET_TX_DESC_RATE_ID_92E(pDesc, RATR_INX_WIRELESS_B);
} else {
SET_TX_DESC_RATE_ID_92E(pDesc, RATR_INX_WIRELESS_G);
}
SET_TX_DESC_QUEUE_SEL_92E(pDesc, QSLT_MGNT);
//Set NAVUSEHDR to prevent Ps-poll AId filed to be changed to error vlaue by Hw.
if (IsPsPoll)
{
SET_TX_DESC_NAV_USE_HDR_92E(pDesc, 1);
}
else
{
SET_TX_DESC_EN_HWSEQ_92E(pDesc, 1); // Hw set sequence number
}
SET_TX_DESC_USE_RATE_92E(pDesc, 1);
SET_TX_DESC_TX_RATE_92E(pDesc, MRateToHwRate(pmlmeext->tx_rate));
#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)
// USB interface drop packet if the checksum of descriptor isn't correct.
// Using this checksum can let hardware recovery from packet bulk out error (e.g. Cancel URC, Bulk out error.).
rtl8192e_cal_txdesc_chksum(pDesc);
#endif
}
void fill_txdesc_sectype(struct pkt_attrib *pattrib, u8 *ptxdesc)
{
if ((pattrib->encrypt > 0) && !pattrib->bswenc)
{
switch (pattrib->encrypt)
{
//SEC_TYPE : 0:NO_ENC,1:WEP40/TKIP,2:WAPI,3:AES
case _WEP40_:
case _WEP104_:
case _TKIP_:
case _TKIP_WTMIC_:
SET_TX_DESC_SEC_TYPE_92E(ptxdesc, 0x1);
break;
#ifdef CONFIG_WAPI_SUPPORT
case _SMS4_:
SET_TX_DESC_SEC_TYPE_92E(ptxdesc, 0x2);
break;
#endif
case _AES_:
SET_TX_DESC_SEC_TYPE_92E(ptxdesc, 0x3);
break;
case _NO_PRIVACY_:
default:
SET_TX_DESC_SEC_TYPE_92E(ptxdesc, 0x0);
break;
}
}
}
void fill_txdesc_vcs(struct pkt_attrib *pattrib, u8 *ptxdesc)
{
//DBG_8192C("cvs_mode=%d\n", pattrib->vcs_mode);
SET_TX_DESC_HW_RTS_ENABLE_92E(ptxdesc, 0);
switch(pattrib->vcs_mode)
{
case RTS_CTS:
SET_TX_DESC_RTS_ENABLE_92E(ptxdesc, 1);
break;
case CTS_TO_SELF:
SET_TX_DESC_CTS2SELF_92E(ptxdesc, 1);
break;
case NONE_VCS:
default:
break;
}
}
void fill_txdesc_phy(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc)
{
//DBG_8192C("bwmode=%d, ch_off=%d\n", pattrib->bwmode, pattrib->ch_offset);
if(pattrib->ht_en)
{
// Set Bandwidth and sub-channel settings.
SET_TX_DESC_DATA_BW_92E(ptxdesc, BWMapping_92E(padapter,pattrib));
SET_TX_DESC_DATA_SC_92E(ptxdesc, SCMapping_92E(padapter,pattrib));
}
}
static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz ,u8 bagg_pkt)
{
int pull=0;
@@ -194,17 +60,11 @@ static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz ,u8 bag
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct pkt_attrib *pattrib = &pxmitframe->attrib;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
//struct dm_priv *pdmpriv = &pHalData->dmpriv;
u8 *ptxdesc = pmem;
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
sint bmcst = IS_MCAST(pattrib->ra);
#ifdef CONFIG_P2P
struct wifidirect_info* pwdinfo = &padapter->wdinfo;
#endif //CONFIG_P2P
#ifndef CONFIG_USE_USB_BUFFER_ALLOC_TX
if (padapter->registrypriv.mp_mode == 0)
{
@@ -265,6 +125,7 @@ static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz ,u8 bag
if (!pattrib->qos_en) {
SET_TX_DESC_EN_HWSEQ_92E(ptxdesc, 1); // Hw set sequence number
SET_TX_DESC_HWSEQ_SEL_92E(ptxdesc, pattrib->hw_ssn_sel);
} else {
SET_TX_DESC_SEQ_92E(ptxdesc, pattrib->seqnum);
}
@@ -311,31 +172,22 @@ static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz ,u8 bag
SET_TX_DESC_DATA_RATE_FB_LIMIT_92E(ptxdesc, 0x1f);
SET_TX_DESC_RTS_RATE_FB_LIMIT_92E(ptxdesc, 0xf);
if(pHalData->fw_ractrl == _FALSE) {
struct dm_priv *pdmpriv = &pHalData->dmpriv;
if(pHalData->fw_ractrl == _FALSE) {
SET_TX_DESC_USE_RATE_92E(ptxdesc, 1);
if(pdmpriv->INIDATA_RATE[pattrib->mac_id] & BIT(7))
if(pHalData->INIDATA_RATE[pattrib->mac_id] & BIT(7))
SET_TX_DESC_DATA_SHORT_92E(ptxdesc, 1);
SET_TX_DESC_TX_RATE_92E(ptxdesc, (pdmpriv->INIDATA_RATE[pattrib->mac_id] & 0x7F));
SET_TX_DESC_TX_RATE_92E(ptxdesc, (pHalData->INIDATA_RATE[pattrib->mac_id] & 0x7F));
}
//for debug
#if 1
if(padapter->fix_rate!= 0xFF){
struct dm_priv *pdmpriv = &pHalData->dmpriv;
SET_TX_DESC_USE_RATE_92E(ptxdesc, 1);
//if(pdmpriv->INIDATA_RATE[pattrib->mac_id] & BIT(7))
{
if(padapter->fix_rate & BIT(7))
SET_TX_DESC_DATA_SHORT_92E(ptxdesc, 1);
}
SET_TX_DESC_TX_RATE_92E(ptxdesc, (padapter->fix_rate & 0x7F));
SET_TX_DESC_DISABLE_FB_92E(ptxdesc,1);
//ptxdesc->datarate = padapter->fix_rate;
}
#endif
rtl8192e_fixed_rate(padapter,ptxdesc);
if (pattrib->ldpc)
SET_TX_DESC_DATA_LDPC_92E(ptxdesc, 1);
if (pattrib->stbc)
SET_TX_DESC_DATA_STBC_92E(ptxdesc, 1);
}
else
@@ -355,6 +207,18 @@ static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz ,u8 bag
SET_TX_DESC_TX_RATE_92E(ptxdesc, MRateToHwRate(pmlmeext->tx_rate));
}
#ifdef CONFIG_TDLS
#ifdef CONFIG_XMIT_ACK
/* CCX-TXRPT ack for xmit mgmt frames. */
if (pxmitframe->ack_report) {
SET_TX_DESC_SPE_RPT_92E(ptxdesc, 1);
#ifdef DBG_CCX
DBG_871X("%s set tx report\n", __func__);
#endif
}
#endif /* CONFIG_XMIT_ACK */
#endif
}
else if((pxmitframe->frame_tag&0x0f)== MGNT_FRAMETAG)
{
@@ -392,10 +256,12 @@ static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz ,u8 bag
}
#endif //CONFIG_XMIT_ACK
}
/*
else if((pxmitframe->frame_tag&0x0f) == TXAGG_FRAMETAG)
{
DBG_8192C("pxmitframe->frame_tag == TXAGG_FRAMETAG\n");
}
*/
#ifdef CONFIG_MP_INCLUDED
else if(((pxmitframe->frame_tag&0x0f) == MP_FRAMETAG) &&
(padapter->registrypriv.mp_mode == 1))
@@ -411,6 +277,10 @@ static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz ,u8 bag
SET_TX_DESC_TX_RATE_92E(ptxdesc, MRateToHwRate(pmlmeext->tx_rate));
}
#ifdef CONFIG_ANTENNA_DIVERSITY
ODM_SetTxAntByTxInfo(&pHalData->odmpriv, ptxdesc, pxmitframe->attrib.mac_id);
#endif
rtl8192e_cal_txdesc_chksum(ptxdesc);
_dbg_dump_tx_info(padapter,pxmitframe->frame_tag,ptxdesc);
return pull;
@@ -444,11 +314,12 @@ s32 rtl8192eu_xmit_buf_handler(PADAPTER padapter)
return _FAIL;
}
ret = (padapter->bDriverStopped == _TRUE) || (padapter->bSurpriseRemoved == _TRUE);
if (ret) {
RT_TRACE(_module_hal_xmit_c_, _drv_notice_,
("%s: bDriverStopped(%d) bSurpriseRemoved(%d)!\n",
__FUNCTION__, padapter->bDriverStopped, padapter->bSurpriseRemoved));
if (RTW_CANNOT_RUN(padapter)) {
RT_TRACE(_module_hal_xmit_c_, _drv_notice_
, ("%s: bDriverStopped(%s) bSurpriseRemoved(%s)!\n"
, __func__
, rtw_is_drv_stopped(padapter)?"True":"False"
, rtw_is_surprise_removed(padapter)?"True":"False"));
return _FAIL;
}
@@ -614,6 +485,9 @@ s32 rtl8192eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv
// dump frame variable
u32 ff_hwaddr;
_list *sta_plist, *sta_phead;
u8 single_sta_in_queue = _FALSE;
#ifndef IDEA_CONDITION
int res = _SUCCESS;
#endif
@@ -737,6 +611,10 @@ s32 rtl8192eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv
_enter_critical_bh(&pxmitpriv->lock, &irqL);
sta_phead = get_list_head(phwxmit->sta_queue);
sta_plist = get_next(sta_phead);
single_sta_in_queue = rtw_end_of_queue_search(sta_phead, get_next(sta_plist));
xmitframe_phead = get_list_head(&ptxservq->sta_pending);
xmitframe_plist = get_next(xmitframe_phead);
@@ -831,10 +709,13 @@ s32 rtl8192eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv
bulkPtr = ((pbuf / bulkSize) + 1) * bulkSize;
}
}//end while( aggregate same priority and same DA(AP or STA) frames)
if (_rtw_queue_empty(&ptxservq->sta_pending) == _TRUE)
rtw_list_delete(&ptxservq->tx_pending);
else if (single_sta_in_queue == _FALSE) {
/* Re-arrange the order of stations in this ac queue to balance the service for these stations */
rtw_list_delete(&ptxservq->tx_pending);
rtw_list_insert_tail(&ptxservq->tx_pending, get_list_head(phwxmit->sta_queue));
}
_exit_critical_bh(&pxmitpriv->lock, &irqL);
#ifdef CONFIG_80211N_HT
@@ -996,10 +877,9 @@ static s32 pre_xmitframe(_adapter *padapter, struct xmit_frame *pxmitframe)
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
struct pkt_attrib *pattrib = &pxmitframe->attrib;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
_enter_critical_bh(&pxmitpriv->lock, &irqL);
u8 lg_sta_num;
//DBG_8192C("==> %s \n",__FUNCTION__);
_enter_critical_bh(&pxmitpriv->lock, &irqL);
if (rtw_txframes_sta_ac_pending(padapter, pattrib) > 0)
{
@@ -1007,14 +887,12 @@ static s32 pre_xmitframe(_adapter *padapter, struct xmit_frame *pxmitframe)
goto enqueue;
}
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE)
if (rtw_xmit_ac_blocked(padapter) == _TRUE)
goto enqueue;
#ifdef CONFIG_CONCURRENT_MODE
if (check_buddy_fwstate(padapter, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE)
rtw_dev_iface_status(padapter, NULL, NULL , &lg_sta_num, NULL, NULL);
if (lg_sta_num)
goto enqueue;
#endif
pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv);
if (pxmitbuf == NULL)

1014
hal/rtl8192e/usb/usb_halinit.c
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File diff suppressed because it is too large Load Diff

803
hal/rtl8192e/usb/usb_ops_linux.c
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File diff suppressed because it is too large Load Diff