mirror of
https://github.com/Mange/rtl8192eu-linux-driver
synced 2025-12-08 07:14:03 +00:00
Updated to 4.4.1
This commit is contained in:
CGarces
551
hal/phydm/txbf/halcomtxbf.c
Normal file
551
hal/phydm/txbf/halcomtxbf.c
Normal file
File diff suppressed because it is too large
Load Diff
181
hal/phydm/txbf/halcomtxbf.h
Normal file
181
hal/phydm/txbf/halcomtxbf.h
Normal file
@@ -0,0 +1,181 @@
|
||||
#ifndef __HAL_COM_TXBF_H__
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#define __HAL_COM_TXBF_H__
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/*
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typedef BOOLEAN
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(*TXBF_GET)(
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IN PVOID pAdapter,
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IN u1Byte getType,
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OUT PVOID pOutBuf
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||||
);
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typedef BOOLEAN
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(*TXBF_SET)(
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IN PVOID pAdapter,
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IN u1Byte setType,
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OUT PVOID pInBuf
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||||
);
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*/
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#define TxBF_Nr(a, b) ((a > b) ? (b) : (a))
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typedef enum _TXBF_SET_TYPE{
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TXBF_SET_SOUNDING_ENTER,
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TXBF_SET_SOUNDING_LEAVE,
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TXBF_SET_SOUNDING_RATE,
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TXBF_SET_SOUNDING_STATUS,
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TXBF_SET_SOUNDING_FW_NDPA,
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TXBF_SET_SOUNDING_CLK,
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TXBF_SET_TX_PATH_RESET,
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TXBF_SET_GET_TX_RATE
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}TXBF_SET_TYPE,*PTXBF_SET_TYPE;
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typedef enum _TXBF_GET_TYPE{
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TXBF_GET_EXPLICIT_BEAMFORMEE,
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TXBF_GET_EXPLICIT_BEAMFORMER,
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TXBF_GET_MU_MIMO_STA,
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TXBF_GET_MU_MIMO_AP
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}TXBF_GET_TYPE,*PTXBF_GET_TYPE;
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//2 HAL TXBF related
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typedef struct _HAL_TXBF_INFO {
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u1Byte TXBFIdx;
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u1Byte NdpaIdx;
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u1Byte BW;
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u1Byte Rate;
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RT_TIMER Txbf_FwNdpaTimer;
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#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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RT_WORK_ITEM Txbf_EnterWorkItem;
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RT_WORK_ITEM Txbf_LeaveWorkItem;
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RT_WORK_ITEM Txbf_FwNdpaWorkItem;
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RT_WORK_ITEM Txbf_ClkWorkItem;
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RT_WORK_ITEM Txbf_StatusWorkItem;
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RT_WORK_ITEM Txbf_RateWorkItem;
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RT_WORK_ITEM Txbf_ResetTxPathWorkItem;
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RT_WORK_ITEM Txbf_GetTxRateWorkItem;
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#endif
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} HAL_TXBF_INFO, *PHAL_TXBF_INFO;
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|
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#if (BEAMFORMING_SUPPORT == 1)
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VOID
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halComTxbf_beamformInit(
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IN PVOID pDM_VOID
|
||||
);
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|
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VOID
|
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halComTxbf_ConfigGtab(
|
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IN PVOID pDM_VOID
|
||||
);
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|
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VOID
|
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halComTxbf_EnterWorkItemCallback(
|
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#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
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IN PADAPTER Adapter
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#else
|
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IN PVOID pDM_VOID
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#endif
|
||||
);
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VOID
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halComTxbf_LeaveWorkItemCallback(
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#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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IN PADAPTER Adapter
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#else
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IN PVOID pDM_VOID
|
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#endif
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);
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VOID
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halComTxbf_FwNdpaWorkItemCallback(
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#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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IN PADAPTER Adapter
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#else
|
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IN PVOID pDM_VOID
|
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#endif
|
||||
);
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|
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VOID
|
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halComTxbf_ClkWorkItemCallback(
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#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
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IN PADAPTER Adapter
|
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#else
|
||||
IN PVOID pDM_VOID
|
||||
#endif
|
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);
|
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|
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VOID
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halComTxbf_ResetTxPathWorkItemCallback(
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||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
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IN PADAPTER Adapter
|
||||
#else
|
||||
IN PVOID pDM_VOID
|
||||
#endif
|
||||
);
|
||||
|
||||
VOID
|
||||
halComTxbf_GetTxRateWorkItemCallback(
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
||||
IN PADAPTER Adapter
|
||||
#else
|
||||
IN PVOID pDM_VOID
|
||||
#endif
|
||||
);
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|
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VOID
|
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halComTxbf_RateWorkItemCallback(
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||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
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IN PADAPTER Adapter
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#else
|
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IN PVOID pDM_VOID
|
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#endif
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);
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|
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VOID
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halComTxbf_FwNdpaTimerCallback(
|
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IN PRT_TIMER pTimer
|
||||
);
|
||||
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VOID
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halComTxbf_StatusWorkItemCallback(
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||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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IN PADAPTER Adapter
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#else
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IN PVOID pDM_VOID
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#endif
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);
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BOOLEAN
|
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HalComTxbf_Set(
|
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IN PVOID pDM_VOID,
|
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IN u1Byte setType,
|
||||
IN PVOID pInBuf
|
||||
);
|
||||
|
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BOOLEAN
|
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HalComTxbf_Get(
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IN PADAPTER Adapter,
|
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IN u1Byte getType,
|
||||
OUT PVOID pOutBuf
|
||||
);
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#else
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#define halComTxbf_beamformInit(pDM_VOID) NULL
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#define halComTxbf_ConfigGtab(pDM_VOID) NULL
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#define halComTxbf_EnterWorkItemCallback(_Adapter) NULL
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#define halComTxbf_LeaveWorkItemCallback(_Adapter) NULL
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#define halComTxbf_FwNdpaWorkItemCallback(_Adapter) NULL
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#define halComTxbf_ClkWorkItemCallback(_Adapter) NULL
|
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#define halComTxbf_RateWorkItemCallback(_Adapter) NULL
|
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#define halComTxbf_FwNdpaTimerCallback(_Adapter) NULL
|
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#define halComTxbf_StatusWorkItemCallback(_Adapter) NULL
|
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#define HalComTxbf_Get(_Adapter, _getType, _pOutBuf)
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#endif
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#endif // #ifndef __HAL_COM_TXBF_H__
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|
||||
392
hal/phydm/txbf/haltxbf8192e.c
Normal file
392
hal/phydm/txbf/haltxbf8192e.c
Normal file
@@ -0,0 +1,392 @@
|
||||
//============================================================
|
||||
// Description:
|
||||
//
|
||||
// This file is for 8192E TXBF mechanism
|
||||
//
|
||||
//============================================================
|
||||
#include "mp_precomp.h"
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||||
#include "../phydm_precomp.h"
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|
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#if (BEAMFORMING_SUPPORT == 1)
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#if (RTL8192E_SUPPORT == 1)
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|
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VOID
|
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HalTxbf8192E_setNDPArate(
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IN PVOID pDM_VOID,
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IN u1Byte BW,
|
||||
IN u1Byte Rate
|
||||
)
|
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{
|
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PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
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|
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ODM_Write1Byte(pDM_Odm, REG_NDPA_OPT_CTRL_8192E, (Rate << 2 | BW));
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|
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}
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|
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VOID
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halTxbf8192E_RfMode(
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IN PVOID pDM_VOID,
|
||||
IN PRT_BEAMFORMING_INFO pBeamInfo
|
||||
)
|
||||
{
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PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
BOOLEAN bSelfBeamformer = FALSE;
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||||
BOOLEAN bSelfBeamformee = FALSE;
|
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BEAMFORMING_CAP BeamformCap = BEAMFORMING_CAP_NONE;
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__));
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|
||||
if (pDM_Odm->RFType == ODM_1T1R)
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||||
return;
|
||||
|
||||
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x1); /*RF Mode table write enable*/
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ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_WE_LUT, 0x80000, 0x1); /*RF Mode table write enable*/
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|
||||
if (pBeamInfo->beamformee_su_cnt > 0) {
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/*Path_A*/
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ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableAddr, 0xfffff, 0x18000); /*Select RX mode 0x30=0x18000*/
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ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData0, 0xfffff, 0x0000f); /*Set Table data*/
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ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData1, 0xfffff, 0x77fc2); /*Enable TXIQGEN in RX mode*/
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/*Path_B*/
|
||||
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableAddr, 0xfffff, 0x18000); /*Select RX mode*/
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ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData0, 0xfffff, 0x0000f); /*Set Table data*/
|
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ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData1, 0xfffff, 0x77fc2); /*Enable TXIQGEN in RX mode*/
|
||||
} else {
|
||||
/*Path_A*/
|
||||
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableAddr, 0xfffff, 0x18000); /*Select RX mode*/
|
||||
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData0, 0xfffff, 0x0000f); /*Set Table data*/
|
||||
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData1, 0xfffff, 0x77f82); /*Disable TXIQGEN in RX mode*/
|
||||
/*Path_B*/
|
||||
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableAddr, 0xfffff, 0x18000); /*Select RX mode*/
|
||||
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData0, 0xfffff, 0x0000f); /*Set Table data*/
|
||||
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData1, 0xfffff, 0x77f82); /*Disable TXIQGEN in RX mode*/
|
||||
}
|
||||
|
||||
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x0); /*RF Mode table write disable*/
|
||||
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_WE_LUT, 0x80000, 0x0); /*RF Mode table write disable*/
|
||||
|
||||
if (pBeamInfo->beamformee_su_cnt > 0) {
|
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ODM_SetBBReg(pDM_Odm, rFPGA1_TxInfo, bMaskDWord, 0x83321333);
|
||||
ODM_SetBBReg(pDM_Odm, rCCK0_AFESetting, bMaskByte3, 0xc1);
|
||||
} else
|
||||
ODM_SetBBReg(pDM_Odm, rFPGA1_TxInfo, bMaskDWord, 0x81121313);
|
||||
}
|
||||
|
||||
|
||||
|
||||
VOID
|
||||
halTxbf8192E_FwTxBFCmd(
|
||||
IN PVOID pDM_VOID
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
u1Byte Idx, Period0 = 0, Period1 = 0;
|
||||
u1Byte PageNum0 = 0xFF, PageNum1 = 0xFF;
|
||||
u1Byte u1TxBFParm[3] = {0};
|
||||
PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo;
|
||||
|
||||
for (Idx = 0; Idx < BEAMFORMEE_ENTRY_NUM; Idx++) {
|
||||
if (pBeamInfo->BeamformeeEntry[Idx].BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) {
|
||||
if (Idx == 0) {
|
||||
if (pBeamInfo->BeamformeeEntry[Idx].bSound)
|
||||
PageNum0 = 0xFE;
|
||||
else
|
||||
PageNum0 = 0xFF; //stop sounding
|
||||
Period0 = (u1Byte)(pBeamInfo->BeamformeeEntry[Idx].SoundPeriod);
|
||||
} else if (Idx == 1) {
|
||||
if (pBeamInfo->BeamformeeEntry[Idx].bSound)
|
||||
PageNum1 = 0xFE;
|
||||
else
|
||||
PageNum1 = 0xFF; //stop sounding
|
||||
Period1 = (u1Byte)(pBeamInfo->BeamformeeEntry[Idx].SoundPeriod);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
u1TxBFParm[0] = PageNum0;
|
||||
u1TxBFParm[1] = PageNum1;
|
||||
u1TxBFParm[2] = (Period1 << 4) | Period0;
|
||||
ODM_FillH2CCmd(pDM_Odm, PHYDM_H2C_TXBF, 3, u1TxBFParm);
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD,
|
||||
("[%s] PageNum0 = %d Period0 = %d, PageNum1 = %d Period1 %d\n", __func__, PageNum0, Period0, PageNum1, Period1));
|
||||
}
|
||||
|
||||
|
||||
VOID
|
||||
halTxbf8192E_DownloadNDPA(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte Idx
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
u1Byte u1bTmp = 0, tmpReg422 = 0, Head_Page;
|
||||
u1Byte BcnValidReg = 0, count = 0, DLBcnCount = 0;
|
||||
BOOLEAN bSendBeacon = FALSE;
|
||||
PADAPTER Adapter = pDM_Odm->Adapter;
|
||||
u1Byte TxPageBndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8812;
|
||||
/*default reseved 1 page for the IC type which is undefined.*/
|
||||
PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo;
|
||||
PRT_BEAMFORMEE_ENTRY pBeamEntry = pBeamInfo->BeamformeeEntry + Idx;
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__));
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
||||
*pDM_Odm->pbFwDwRsvdPageInProgress = TRUE;
|
||||
#endif
|
||||
if (Idx == 0)
|
||||
Head_Page = 0xFE;
|
||||
else
|
||||
Head_Page = 0xFE;
|
||||
|
||||
Adapter->HalFunc.GetHalDefVarHandler(Adapter, HAL_DEF_TX_PAGE_BOUNDARY, (pu1Byte)&TxPageBndy);
|
||||
|
||||
/*Set REG_CR bit 8. DMA beacon by SW.*/
|
||||
u1bTmp = ODM_Read1Byte(pDM_Odm, REG_CR_8192E+1);
|
||||
ODM_Write1Byte(pDM_Odm, REG_CR_8192E+1, (u1bTmp | BIT0));
|
||||
|
||||
/*Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.*/
|
||||
tmpReg422 = ODM_Read1Byte(pDM_Odm, REG_FWHW_TXQ_CTRL_8192E+2);
|
||||
ODM_Write1Byte(pDM_Odm, REG_FWHW_TXQ_CTRL_8192E+2, tmpReg422 & (~BIT6));
|
||||
|
||||
if (tmpReg422 & BIT6) {
|
||||
ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_WARNING, ("%s There is an Adapter is sending beacon.\n", __func__));
|
||||
bSendBeacon = TRUE;
|
||||
}
|
||||
|
||||
/*TDECTRL[15:8] 0x209[7:0] = 0xFE/0xFD NDPA Head for TXDMA*/
|
||||
ODM_Write1Byte(pDM_Odm, REG_DWBCN0_CTRL_8192E+1, Head_Page);
|
||||
|
||||
do {
|
||||
/*Clear beacon valid check bit.*/
|
||||
BcnValidReg = ODM_Read1Byte(pDM_Odm, REG_DWBCN0_CTRL_8192E+2);
|
||||
ODM_Write1Byte(pDM_Odm, REG_DWBCN0_CTRL_8192E+2, (BcnValidReg | BIT0));
|
||||
|
||||
// download NDPA rsvd page.
|
||||
Beamforming_SendHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->SoundBW, BEACON_QUEUE);
|
||||
|
||||
#if(DEV_BUS_TYPE == RT_PCI_INTERFACE)
|
||||
u1bTmp = ODM_Read1Byte(pDM_Odm, REG_MGQ_TXBD_NUM_8192E+3);
|
||||
count = 0;
|
||||
while ((count < 20) && (u1bTmp & BIT4)) {
|
||||
count++;
|
||||
ODM_delay_us(10);
|
||||
u1bTmp = ODM_Read1Byte(pDM_Odm, REG_MGQ_TXBD_NUM_8192E+3);
|
||||
}
|
||||
ODM_Write1Byte(pDM_Odm, REG_MGQ_TXBD_NUM_8192E+3, u1bTmp | BIT4);
|
||||
#endif
|
||||
|
||||
/*check rsvd page download OK.*/
|
||||
BcnValidReg = ODM_Read1Byte(pDM_Odm, REG_DWBCN0_CTRL_8192E+2);
|
||||
count = 0;
|
||||
while (!(BcnValidReg & BIT0) && count < 20) {
|
||||
count++;
|
||||
ODM_delay_us(10);
|
||||
BcnValidReg = ODM_Read1Byte(pDM_Odm, REG_DWBCN0_CTRL_8192E+2);
|
||||
}
|
||||
DLBcnCount++;
|
||||
} while (!(BcnValidReg & BIT0) && DLBcnCount < 5);
|
||||
|
||||
if (!(BcnValidReg & BIT0))
|
||||
ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_WARNING, ("%s Download RSVD page failed!\n", __func__));
|
||||
|
||||
/*TDECTRL[15:8] 0x209[7:0] = 0xF9 Beacon Head for TXDMA*/
|
||||
ODM_Write1Byte(pDM_Odm, REG_DWBCN0_CTRL_8192E+1, TxPageBndy);
|
||||
|
||||
/*To make sure that if there exists an adapter which would like to send beacon.*/
|
||||
/*If exists, the origianl value of 0x422[6] will be 1, we should check this to*/
|
||||
/*prevent from setting 0x422[6] to 0 after download reserved page, or it will cause*/
|
||||
/*the beacon cannot be sent by HW.*/
|
||||
/*2010.06.23. Added by tynli.*/
|
||||
if (bSendBeacon)
|
||||
ODM_Write1Byte(pDM_Odm, REG_FWHW_TXQ_CTRL_8192E+2, tmpReg422);
|
||||
|
||||
/*Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/
|
||||
/*Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/
|
||||
u1bTmp = ODM_Read1Byte(pDM_Odm, REG_CR_8192E+1);
|
||||
ODM_Write1Byte(pDM_Odm, REG_CR_8192E+1, (u1bTmp & (~BIT0)));
|
||||
|
||||
pBeamEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_PROGRESSED;
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
||||
*pDM_Odm->pbFwDwRsvdPageInProgress = FALSE;
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
VOID
|
||||
HalTxbf8192E_Enter(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte BFerBFeeIdx
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
u1Byte i = 0;
|
||||
u1Byte BFerIdx = (BFerBFeeIdx & 0xF0) >> 4;
|
||||
u1Byte BFeeIdx = (BFerBFeeIdx & 0xF);
|
||||
u4Byte CSI_Param;
|
||||
PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo;
|
||||
RT_BEAMFORMEE_ENTRY BeamformeeEntry;
|
||||
RT_BEAMFORMER_ENTRY BeamformerEntry;
|
||||
u2Byte STAid = 0;
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__));
|
||||
|
||||
halTxbf8192E_RfMode(pDM_Odm, pBeamformingInfo);
|
||||
|
||||
if (pDM_Odm->RFType == ODM_2T2R)
|
||||
ODM_Write4Byte(pDM_Odm, 0xd80, 0x00000000); /*Nc =2*/
|
||||
|
||||
if ((pBeamformingInfo->beamformer_su_cnt > 0) && (BFerIdx < BEAMFORMER_ENTRY_NUM)) {
|
||||
BeamformerEntry = pBeamformingInfo->BeamformerEntry[BFerIdx];
|
||||
|
||||
/*Sounding protocol control*/
|
||||
ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8192E, 0xCB);
|
||||
|
||||
/*MAC address/Partial AID of Beamformer*/
|
||||
if (BFerIdx == 0) {
|
||||
for (i = 0; i < 6 ; i++)
|
||||
ODM_Write1Byte(pDM_Odm, (REG_ASSOCIATED_BFMER0_INFO_8192E+i), BeamformerEntry.MacAddr[i]);
|
||||
} else {
|
||||
for (i = 0; i < 6 ; i++)
|
||||
ODM_Write1Byte(pDM_Odm, (REG_ASSOCIATED_BFMER1_INFO_8192E+i), BeamformerEntry.MacAddr[i]);
|
||||
}
|
||||
|
||||
/*CSI report parameters of Beamformer Default use Nc = 2*/
|
||||
CSI_Param = 0x03090309;
|
||||
|
||||
ODM_Write4Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8192E, CSI_Param);
|
||||
ODM_Write4Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW40_8192E, CSI_Param);
|
||||
ODM_Write4Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW80_8192E, CSI_Param);
|
||||
|
||||
/*Timeout value for MAC to leave NDP_RX_standby_state (60 us, Test chip) (80 us, MP chip)*/
|
||||
ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8192E+3, 0x50);
|
||||
|
||||
}
|
||||
|
||||
if ((pBeamformingInfo->beamformee_su_cnt > 0) && (BFeeIdx < BEAMFORMEE_ENTRY_NUM)) {
|
||||
BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[BFeeIdx];
|
||||
|
||||
if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS))
|
||||
STAid = BeamformeeEntry.MacId;
|
||||
else
|
||||
STAid = BeamformeeEntry.P_AID;
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s], STAid=0x%X\n", __func__, STAid));
|
||||
|
||||
/*P_AID of Beamformee & enable NDPA transmission & enable NDPA interrupt*/
|
||||
if (BFeeIdx == 0) {
|
||||
ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8192E, STAid);
|
||||
ODM_Write1Byte(pDM_Odm, REG_TXBF_CTRL_8192E+3, ODM_Read1Byte(pDM_Odm, REG_TXBF_CTRL_8192E+3) | BIT4 | BIT6 | BIT7);
|
||||
} else
|
||||
ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8192E+2, STAid | BIT12 | BIT14 | BIT15);
|
||||
|
||||
/*CSI report parameters of Beamformee*/
|
||||
if (BFeeIdx == 0) {
|
||||
/*Get BIT24 & BIT25*/
|
||||
u1Byte tmp = ODM_Read1Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8192E+3) & 0x3;
|
||||
|
||||
ODM_Write1Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8192E+3, tmp | 0x60);
|
||||
ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8192E, STAid | BIT9);
|
||||
} else {
|
||||
/*Set BIT25*/
|
||||
ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8192E+2, STAid | 0xE200);
|
||||
}
|
||||
phydm_Beamforming_Notify(pDM_Odm);
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
VOID
|
||||
HalTxbf8192E_Leave(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte Idx
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo;
|
||||
|
||||
halTxbf8192E_RfMode(pDM_Odm, pBeamInfo);
|
||||
|
||||
/* Clear P_AID of Beamformee
|
||||
* Clear MAC addresss of Beamformer
|
||||
* Clear Associated Bfmee Sel
|
||||
*/
|
||||
if (pBeamInfo->BeamformCap == BEAMFORMING_CAP_NONE)
|
||||
ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8192E, 0xC8);
|
||||
|
||||
if (Idx == 0) {
|
||||
ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8192E, 0);
|
||||
ODM_Write4Byte(pDM_Odm, REG_ASSOCIATED_BFMER0_INFO_8192E, 0);
|
||||
ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMER0_INFO_8192E+4, 0);
|
||||
ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8192E, 0);
|
||||
} else {
|
||||
ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8192E+2, ODM_Read1Byte(pDM_Odm, REG_TXBF_CTRL_8192E+2) & 0xF000);
|
||||
ODM_Write4Byte(pDM_Odm, REG_ASSOCIATED_BFMER1_INFO_8192E, 0);
|
||||
ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMER1_INFO_8192E+4, 0);
|
||||
ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8192E+2, ODM_Read2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8192E+2) & 0x60);
|
||||
}
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Idx %d\n", __func__, Idx));
|
||||
}
|
||||
|
||||
|
||||
VOID
|
||||
HalTxbf8192E_Status(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte Idx
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
u2Byte BeamCtrlVal;
|
||||
u4Byte BeamCtrlReg;
|
||||
PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo;
|
||||
RT_BEAMFORMEE_ENTRY BeamformEntry = pBeamInfo->BeamformeeEntry[Idx];
|
||||
|
||||
if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS))
|
||||
BeamCtrlVal = BeamformEntry.MacId;
|
||||
else
|
||||
BeamCtrlVal = BeamformEntry.P_AID;
|
||||
|
||||
if (Idx == 0)
|
||||
BeamCtrlReg = REG_TXBF_CTRL_8192E;
|
||||
else {
|
||||
BeamCtrlReg = REG_TXBF_CTRL_8192E+2;
|
||||
BeamCtrlVal |= BIT12 | BIT14 | BIT15;
|
||||
}
|
||||
|
||||
if (BeamformEntry.BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) {
|
||||
if (BeamformEntry.SoundBW == CHANNEL_WIDTH_20)
|
||||
BeamCtrlVal |= BIT9;
|
||||
else if (BeamformEntry.SoundBW == CHANNEL_WIDTH_40)
|
||||
BeamCtrlVal |= BIT10;
|
||||
} else
|
||||
BeamCtrlVal &= ~(BIT9 | BIT10 | BIT11);
|
||||
|
||||
ODM_Write2Byte(pDM_Odm, BeamCtrlReg, BeamCtrlVal);
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Idx %d BeamCtrlReg %x BeamCtrlVal %x\n", __func__, Idx, BeamCtrlReg, BeamCtrlVal));
|
||||
}
|
||||
|
||||
|
||||
VOID
|
||||
HalTxbf8192E_FwTxBF(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte Idx
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo;
|
||||
PRT_BEAMFORMEE_ENTRY pBeamEntry = pBeamInfo->BeamformeeEntry + Idx;
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__));
|
||||
|
||||
if (pBeamEntry->BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSING)
|
||||
halTxbf8192E_DownloadNDPA(pDM_Odm, Idx);
|
||||
|
||||
halTxbf8192E_FwTxBFCmd(pDM_Odm);
|
||||
}
|
||||
|
||||
#endif /* #if (RTL8192E_SUPPORT == 1)*/
|
||||
|
||||
#endif
|
||||
|
||||
52
hal/phydm/txbf/haltxbf8192e.h
Normal file
52
hal/phydm/txbf/haltxbf8192e.h
Normal file
@@ -0,0 +1,52 @@
|
||||
#ifndef __HAL_TXBF_8192E_H__
|
||||
#define __HAL_TXBF_8192E_H__
|
||||
|
||||
#if (BEAMFORMING_SUPPORT == 1)
|
||||
#if (RTL8192E_SUPPORT == 1)
|
||||
VOID
|
||||
HalTxbf8192E_setNDPArate(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte BW,
|
||||
IN u1Byte Rate
|
||||
);
|
||||
|
||||
VOID
|
||||
HalTxbf8192E_Enter(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte Idx
|
||||
);
|
||||
|
||||
|
||||
VOID
|
||||
HalTxbf8192E_Leave(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte Idx
|
||||
);
|
||||
|
||||
|
||||
VOID
|
||||
HalTxbf8192E_Status(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte Idx
|
||||
);
|
||||
|
||||
|
||||
VOID
|
||||
HalTxbf8192E_FwTxBF(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte Idx
|
||||
);
|
||||
#else
|
||||
|
||||
#define HalTxbf8192E_setNDPArate(pDM_VOID, BW, Rate)
|
||||
#define HalTxbf8192E_Enter(pDM_VOID, Idx)
|
||||
#define HalTxbf8192E_Leave(pDM_VOID, Idx)
|
||||
#define HalTxbf8192E_Status(pDM_VOID, Idx)
|
||||
#define HalTxbf8192E_FwTxBF(pDM_VOID, Idx)
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
653
hal/phydm/txbf/haltxbf8814a.c
Normal file
653
hal/phydm/txbf/haltxbf8814a.c
Normal file
File diff suppressed because it is too large
Load Diff
70
hal/phydm/txbf/haltxbf8814a.h
Normal file
70
hal/phydm/txbf/haltxbf8814a.h
Normal file
@@ -0,0 +1,70 @@
|
||||
#ifndef __HAL_TXBF_8814A_H__
|
||||
#define __HAL_TXBF_8814A_H__
|
||||
|
||||
#if (BEAMFORMING_SUPPORT == 1)
|
||||
#if (RTL8814A_SUPPORT == 1)
|
||||
VOID
|
||||
HalTxbf8814A_setNDPArate(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte BW,
|
||||
IN u1Byte Rate
|
||||
);
|
||||
|
||||
u1Byte
|
||||
halTxbf8814A_GetNtx(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
HalTxbf8814A_Enter(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte Idx
|
||||
);
|
||||
|
||||
|
||||
VOID
|
||||
HalTxbf8814A_Leave(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte Idx
|
||||
);
|
||||
|
||||
|
||||
VOID
|
||||
HalTxbf8814A_Status(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte Idx
|
||||
);
|
||||
|
||||
VOID
|
||||
HalTxbf8814A_ResetTxPath(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte Idx
|
||||
);
|
||||
|
||||
|
||||
VOID
|
||||
HalTxbf8814A_GetTxRate(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
HalTxbf8814A_FwTxBF(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte Idx
|
||||
);
|
||||
#else
|
||||
|
||||
#define HalTxbf8814A_setNDPArate(pDM_VOID, BW, Rate)
|
||||
#define halTxbf8814A_GetNtx(pDM_VOID) 0
|
||||
#define HalTxbf8814A_Enter(pDM_VOID, Idx)
|
||||
#define HalTxbf8814A_Leave(pDM_VOID, Idx)
|
||||
#define HalTxbf8814A_Status(pDM_VOID, Idx)
|
||||
#define HalTxbf8814A_ResetTxPath(pDM_VOID, Idx)
|
||||
#define HalTxbf8814A_GetTxRate(pDM_VOID)
|
||||
#define HalTxbf8814A_FwTxBF(pDM_VOID, Idx)
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
400
hal/phydm/txbf/haltxbf8821b.c
Normal file
400
hal/phydm/txbf/haltxbf8821b.c
Normal file
@@ -0,0 +1,400 @@
|
||||
/*============================================================*/
|
||||
/*Description:*/
|
||||
/*This file is for 8812/8821/8811 TXBF mechanism*/
|
||||
/*============================================================*/
|
||||
#include "mp_precomp.h"
|
||||
#include "../phydm_precomp.h"
|
||||
|
||||
#if (BEAMFORMING_SUPPORT == 1)
|
||||
#if (RTL8821B_SUPPORT == 1)
|
||||
|
||||
VOID
|
||||
halTxbf8821B_RfMode(
|
||||
IN PVOID pDM_VOID,
|
||||
IN PRT_BEAMFORMING_INFO pBeamInfo
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
|
||||
if (pDM_Odm->RFType == ODM_1T1R)
|
||||
return;
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] set TxIQGen\n", __func__));
|
||||
|
||||
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WeLut_Jaguar, 0x80000, 0x1); /*RF Mode table write enable*/
|
||||
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_WeLut_Jaguar, 0x80000, 0x1); /*RF Mode table write enable*/
|
||||
|
||||
if (pBeamInfo->beamformee_su_cnt > 0) {
|
||||
/*Path_A*/
|
||||
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableAddr, 0x78000, 0x3); /*Select RX mode*/
|
||||
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData0, 0xfffff, 0x3F7FF); /*Set Table data*/
|
||||
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData1, 0xfffff, 0xE26BF); /*Enable TXIQGEN in RX mode*/
|
||||
/*Path_B*/
|
||||
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableAddr, 0x78000, 0x3); /*Select RX mode*/
|
||||
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData0, 0xfffff, 0x3F7FF); /*Set Table data*/
|
||||
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData1, 0xfffff, 0xE26BF); /*Enable TXIQGEN in RX mode*/
|
||||
} else {
|
||||
/*Path_A*/
|
||||
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableAddr, 0x78000, 0x3); /*Select RX mode*/
|
||||
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData0, 0xfffff, 0x3F7FF); /*Set Table data*/
|
||||
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData1, 0xfffff, 0xC26BF); /*Disable TXIQGEN in RX mode*/
|
||||
/*Path_B*/
|
||||
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableAddr, 0x78000, 0x3); /*Select RX mode*/
|
||||
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData0, 0xfffff, 0x3F7FF); /*Set Table data*/
|
||||
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData1, 0xfffff, 0xC26BF); /*Disable TXIQGEN in RX mode*/
|
||||
}
|
||||
|
||||
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WeLut_Jaguar, 0x80000, 0x0); /*RF Mode table write disable*/
|
||||
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_WeLut_Jaguar, 0x80000, 0x0); /*RF Mode table write disable*/
|
||||
|
||||
if (pBeamInfo->beamformee_su_cnt > 0)
|
||||
ODM_SetBBReg(pDM_Odm, rTxPath_Jaguar, bMaskByte1, 0x33);
|
||||
else
|
||||
ODM_SetBBReg(pDM_Odm, rTxPath_Jaguar, bMaskByte1, 0x11);
|
||||
}
|
||||
|
||||
#if 0
|
||||
VOID
|
||||
halTxbf8821B_DownloadNDPA(
|
||||
IN PDM_ODM_T pDM_Odm,
|
||||
IN u1Byte Idx
|
||||
)
|
||||
{
|
||||
u1Byte u1bTmp = 0, tmpReg422 = 0, Head_Page;
|
||||
u1Byte BcnValidReg = 0, count = 0, DLBcnCount = 0;
|
||||
BOOLEAN bSendBeacon = FALSE;
|
||||
u1Byte TxPageBndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8812; /*default reseved 1 page for the IC type which is undefined.*/
|
||||
PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo;
|
||||
PRT_BEAMFORMEE_ENTRY pBeamEntry = pBeamInfo->BeamformeeEntry + Idx;
|
||||
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pDM_Odm->Adapter);
|
||||
PADAPTER Adapter = pDM_Odm->Adapter;
|
||||
|
||||
pHalData->bFwDwRsvdPageInProgress = TRUE;
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__));
|
||||
|
||||
if (Idx == 0)
|
||||
Head_Page = 0xFE;
|
||||
else
|
||||
Head_Page = 0xFE;
|
||||
|
||||
Adapter->HalFunc.GetHalDefVarHandler(Adapter, HAL_DEF_TX_PAGE_BOUNDARY, (pu1Byte)&TxPageBndy);
|
||||
|
||||
/*Set REG_CR bit 8. DMA beacon by SW.*/
|
||||
u1bTmp = ODM_Read1Byte(pDM_Odm, REG_CR_8821B + 1);
|
||||
ODM_Write1Byte(pDM_Odm, REG_CR_8821B + 1, (u1bTmp | BIT0));
|
||||
|
||||
|
||||
/*Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.*/
|
||||
tmpReg422 = ODM_Read1Byte(pDM_Odm, REG_FWHW_TXQ_CTRL_8821B + 2);
|
||||
ODM_Write1Byte(pDM_Odm, REG_FWHW_TXQ_CTRL_8821B + 2, tmpReg422 & (~BIT6));
|
||||
|
||||
if (tmpReg422 & BIT6) {
|
||||
ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("SetBeamformDownloadNDPA_8812(): There is an Adapter is sending beacon.\n"));
|
||||
bSendBeacon = TRUE;
|
||||
}
|
||||
|
||||
/*TDECTRL[15:8] 0x209[7:0] = 0xF6 Beacon Head for TXDMA*/
|
||||
ODM_Write1Byte(pDM_Odm, REG_TDECTRL_8812A + 1, Head_Page);
|
||||
|
||||
do {
|
||||
/*Clear beacon valid check bit.*/
|
||||
BcnValidReg = ODM_Read1Byte(pDM_Odm, REG_TDECTRL_8812A + 2);
|
||||
ODM_Write1Byte(pDM_Odm, REG_TDECTRL_8812A + 2, (BcnValidReg | BIT0));
|
||||
|
||||
/*download NDPA rsvd page.*/
|
||||
if (pBeamEntry->BeamformEntryCap & BEAMFORMER_CAP_VHT_SU)
|
||||
Beamforming_SendVHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->AID, pBeamEntry->SoundBW, BEACON_QUEUE);
|
||||
else
|
||||
Beamforming_SendHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->SoundBW, BEACON_QUEUE);
|
||||
|
||||
/*check rsvd page download OK.*/
|
||||
BcnValidReg = ODM_Read1Byte(pDM_Odm, REG_TDECTRL_8812A + 2);
|
||||
count = 0;
|
||||
while (!(BcnValidReg & BIT0) && count < 20) {
|
||||
count++;
|
||||
ODM_delay_ms(10);
|
||||
BcnValidReg = ODM_Read1Byte(pDM_Odm, REG_TDECTRL_8812A + 2);
|
||||
}
|
||||
DLBcnCount++;
|
||||
} while (!(BcnValidReg & BIT0) && DLBcnCount < 5);
|
||||
|
||||
if (!(BcnValidReg & BIT0))
|
||||
ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Download RSVD page failed!\n", __func__));
|
||||
|
||||
/*TDECTRL[15:8] 0x209[7:0] = 0xF6 Beacon Head for TXDMA*/
|
||||
ODM_Write1Byte(pDM_Odm, REG_TDECTRL_8812A + 1, TxPageBndy);
|
||||
|
||||
/*To make sure that if there exists an adapter which would like to send beacon.*/
|
||||
/*If exists, the origianl value of 0x422[6] will be 1, we should check this to*/
|
||||
/*prevent from setting 0x422[6] to 0 after download reserved page, or it will cause*/
|
||||
/*the beacon cannot be sent by HW.*/
|
||||
/*2010.06.23. Added by tynli.*/
|
||||
if (bSendBeacon)
|
||||
ODM_Write1Byte(pDM_Odm, REG_FWHW_TXQ_CTRL_8821B + 2, tmpReg422);
|
||||
|
||||
/*Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/
|
||||
/*Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/
|
||||
u1bTmp = ODM_Read1Byte(pDM_Odm, REG_CR_8821B + 1);
|
||||
ODM_Write1Byte(pDM_Odm, REG_CR_8821B + 1, (u1bTmp & (~BIT0)));
|
||||
|
||||
pBeamEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_PROGRESSED;
|
||||
|
||||
pHalData->bFwDwRsvdPageInProgress = FALSE;
|
||||
}
|
||||
|
||||
|
||||
VOID
|
||||
halTxbf8821B_FwTxBFCmd(
|
||||
IN PDM_ODM_T pDM_Odm
|
||||
)
|
||||
{
|
||||
u1Byte Idx, Period0 = 0, Period1 = 0;
|
||||
u1Byte PageNum0 = 0xFF, PageNum1 = 0xFF;
|
||||
u1Byte u1TxBFParm[3] = {0};
|
||||
PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo;
|
||||
|
||||
for (Idx = 0; Idx < BEAMFORMEE_ENTRY_NUM; Idx++) {
|
||||
/*Modified by David*/
|
||||
if (pBeamInfo->BeamformeeEntry[Idx].bUsed && pBeamInfo->BeamformeeEntry[Idx].BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) {
|
||||
if (Idx == 0) {
|
||||
if (pBeamInfo->BeamformeeEntry[Idx].bSound)
|
||||
PageNum0 = 0xFE;
|
||||
else
|
||||
PageNum0 = 0xFF; /*stop sounding*/
|
||||
Period0 = (u1Byte)(pBeamInfo->BeamformeeEntry[Idx].SoundPeriod);
|
||||
} else if (Idx == 1) {
|
||||
if (pBeamInfo->BeamformeeEntry[Idx].bSound)
|
||||
PageNum1 = 0xFE;
|
||||
else
|
||||
PageNum1 = 0xFF; /*stop sounding*/
|
||||
Period1 = (u1Byte)(pBeamInfo->BeamformeeEntry[Idx].SoundPeriod);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
u1TxBFParm[0] = PageNum0;
|
||||
u1TxBFParm[1] = PageNum1;
|
||||
u1TxBFParm[2] = (Period1 << 4) | Period0;
|
||||
FillH2CCmd(Adapter, PHYDM_H2C_TXBF, 3, u1TxBFParm);
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD,
|
||||
("[%s] PageNum0 = %d Period0 = %d, PageNum1 = %d Period1 %d\n", __func__, PageNum0, Period0, PageNum1, Period1));
|
||||
}
|
||||
|
||||
#endif
|
||||
VOID
|
||||
HalTxbf8821B_Enter(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte BFerBFeeIdx
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
u1Byte i = 0;
|
||||
u1Byte BFerIdx = (BFerBFeeIdx & 0xF0) >> 4;
|
||||
u1Byte BFeeIdx = (BFerBFeeIdx & 0xF);
|
||||
u4Byte CSI_Param;
|
||||
PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo;
|
||||
RT_BEAMFORMEE_ENTRY BeamformeeEntry;
|
||||
RT_BEAMFORMER_ENTRY BeamformerEntry;
|
||||
u2Byte STAid = 0;
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]Start!\n", __func__));
|
||||
|
||||
halTxbf8821B_RfMode(pDM_Odm, pBeamformingInfo);
|
||||
|
||||
if (pDM_Odm->RFType == ODM_2T2R)
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_CSI_CONTENT_VALUE, bMaskDWord, 0x00000000); /*Nc =2*/
|
||||
else
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_CSI_CONTENT_VALUE, bMaskDWord, 0x01081008); /*Nc =1*/
|
||||
|
||||
if ((pBeamformingInfo->beamformer_su_cnt > 0) && (BFerIdx < BEAMFORMER_ENTRY_NUM)) {
|
||||
BeamformerEntry = pBeamformingInfo->BeamformerEntry[BFerIdx];
|
||||
|
||||
/*Sounding protocol control*/
|
||||
ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8821B, 0xCB);
|
||||
|
||||
/*MAC address/Partial AID of Beamformer*/
|
||||
if (BFerIdx == 0) {
|
||||
for (i = 0; i < 6 ; i++)
|
||||
ODM_Write1Byte(pDM_Odm, (REG_BFMER0_INFO_8812A + i), BeamformerEntry.MacAddr[i]);
|
||||
/*CSI report use legacy ofdm so don't need to fill P_AID. */
|
||||
/*PlatformEFIOWrite2Byte(Adapter, REG_BFMER0_INFO_8821B+6, BeamformEntry.P_AID); */
|
||||
} else {
|
||||
for (i = 0; i < 6 ; i++)
|
||||
ODM_Write1Byte(pDM_Odm, (REG_BFMER1_INFO_8812A + i), BeamformerEntry.MacAddr[i]);
|
||||
/*CSI report use legacy ofdm so don't need to fill P_AID.*/
|
||||
/*PlatformEFIOWrite2Byte(Adapter, REG_BFMER1_INFO_8821B+6, BeamformEntry.P_AID);*/
|
||||
}
|
||||
|
||||
/*CSI report parameters of Beamformee*/
|
||||
if (BeamformerEntry.BeamformEntryCap & BEAMFORMEE_CAP_VHT_SU) {
|
||||
if (pDM_Odm->RFType == ODM_2T2R)
|
||||
CSI_Param = 0x01090109;
|
||||
else
|
||||
CSI_Param = 0x01080108;
|
||||
} else {
|
||||
if (pDM_Odm->RFType == ODM_2T2R)
|
||||
CSI_Param = 0x03090309;
|
||||
else
|
||||
CSI_Param = 0x03080308;
|
||||
}
|
||||
|
||||
ODM_Write4Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8821B, CSI_Param);
|
||||
ODM_Write4Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW40_8821B, CSI_Param);
|
||||
ODM_Write4Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW80_8821B, CSI_Param);
|
||||
|
||||
/*Timeout value for MAC to leave NDP_RX_standby_state (60 us, Test chip) (80 us, MP chip)*/
|
||||
ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8821B + 3, 0x50);
|
||||
}
|
||||
|
||||
|
||||
if ((pBeamformingInfo->beamformee_su_cnt > 0) && (BFeeIdx < BEAMFORMEE_ENTRY_NUM)) {
|
||||
BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[BFeeIdx];
|
||||
|
||||
if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS))
|
||||
STAid = BeamformeeEntry.MacId;
|
||||
else
|
||||
STAid = BeamformeeEntry.P_AID;
|
||||
|
||||
/*P_AID of Beamformee & enable NDPA transmission & enable NDPA interrupt*/
|
||||
if (BFeeIdx == 0) {
|
||||
ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8821B, STAid);
|
||||
ODM_Write1Byte(pDM_Odm, REG_TXBF_CTRL_8821B + 3, ODM_Read1Byte(pDM_Odm, REG_TXBF_CTRL_8821B + 3) | BIT4 | BIT6 | BIT7);
|
||||
} else
|
||||
ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8821B + 2, STAid | BIT12 | BIT14 | BIT15);
|
||||
|
||||
/*CSI report parameters of Beamformee*/
|
||||
if (BFeeIdx == 0) {
|
||||
/*Get BIT24 & BIT25*/
|
||||
u1Byte tmp = ODM_Read1Byte(pDM_Odm, REG_BFMEE_SEL_8812A + 3) & 0x3;
|
||||
|
||||
ODM_Write1Byte(pDM_Odm, REG_BFMEE_SEL_8812A + 3, tmp | 0x60);
|
||||
ODM_Write2Byte(pDM_Odm, REG_BFMEE_SEL_8812A, STAid | BIT9);
|
||||
} else {
|
||||
/*Set BIT25*/
|
||||
ODM_Write2Byte(pDM_Odm, REG_BFMEE_SEL_8812A + 2, STAid | 0xE200);
|
||||
}
|
||||
phydm_Beamforming_Notify(pDM_Odm);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
VOID
|
||||
HalTxbf8821B_Leave(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte Idx
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo;
|
||||
RT_BEAMFORMER_ENTRY BeamformerEntry;
|
||||
RT_BEAMFORMEE_ENTRY BeamformeeEntry;
|
||||
|
||||
if (Idx < BEAMFORMER_ENTRY_NUM) {
|
||||
BeamformerEntry = pBeamformingInfo->BeamformerEntry[Idx];
|
||||
BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[Idx];
|
||||
} else
|
||||
return;
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]Start!, IDx = %d\n", __func__, Idx));
|
||||
|
||||
/*Clear P_AID of Beamformee*/
|
||||
/*Clear MAC address of Beamformer*/
|
||||
/*Clear Associated Bfmee Sel*/
|
||||
|
||||
if (BeamformerEntry.BeamformEntryCap == BEAMFORMING_CAP_NONE) {
|
||||
ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8821B, 0xC8);
|
||||
if (Idx == 0) {
|
||||
ODM_Write4Byte(pDM_Odm, REG_BFMER0_INFO_8812A, 0);
|
||||
ODM_Write2Byte(pDM_Odm, REG_BFMER0_INFO_8812A + 4, 0);
|
||||
ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8821B, 0);
|
||||
ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW40_8821B, 0);
|
||||
ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW80_8821B, 0);
|
||||
} else {
|
||||
ODM_Write4Byte(pDM_Odm, REG_BFMER1_INFO_8812A, 0);
|
||||
ODM_Write2Byte(pDM_Odm, REG_BFMER1_INFO_8812A + 4, 0);
|
||||
ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8821B, 0);
|
||||
ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW40_8821B, 0);
|
||||
ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW80_8821B, 0);
|
||||
}
|
||||
}
|
||||
|
||||
if (BeamformeeEntry.BeamformEntryCap == BEAMFORMING_CAP_NONE) {
|
||||
halTxbf8821B_RfMode(pDM_Odm, pBeamformingInfo);
|
||||
if (Idx == 0) {
|
||||
ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8821B, 0x0);
|
||||
ODM_Write2Byte(pDM_Odm, REG_BFMEE_SEL_8812A, 0);
|
||||
} else {
|
||||
ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8821B + 2, ODM_Read2Byte(pDM_Odm, REG_TXBF_CTRL_8821B + 2) & 0xF000);
|
||||
ODM_Write2Byte(pDM_Odm, REG_BFMEE_SEL_8812A + 2, ODM_Read2Byte(pDM_Odm, REG_BFMEE_SEL_8812A + 2) & 0x60);
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
|
||||
VOID
|
||||
HalTxbf8821B_Status(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte Idx
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
u2Byte BeamCtrlVal;
|
||||
u4Byte BeamCtrlReg;
|
||||
PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo;
|
||||
RT_BEAMFORMEE_ENTRY BeamformEntry = pBeamInfo->BeamformeeEntry[Idx];
|
||||
|
||||
if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS))
|
||||
BeamCtrlVal = BeamformEntry.MacId;
|
||||
else
|
||||
BeamCtrlVal = BeamformEntry.P_AID;
|
||||
|
||||
if (Idx == 0)
|
||||
BeamCtrlReg = REG_TXBF_CTRL_8821B;
|
||||
else {
|
||||
BeamCtrlReg = REG_TXBF_CTRL_8821B + 2;
|
||||
BeamCtrlVal |= BIT12 | BIT14 | BIT15;
|
||||
}
|
||||
|
||||
if (BeamformEntry.BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) {
|
||||
if (BeamformEntry.SoundBW == CHANNEL_WIDTH_20)
|
||||
BeamCtrlVal |= BIT9;
|
||||
else if (BeamformEntry.SoundBW == CHANNEL_WIDTH_40)
|
||||
BeamCtrlVal |= BIT10;
|
||||
else if (BeamformEntry.SoundBW == CHANNEL_WIDTH_80)
|
||||
BeamCtrlVal |= BIT11;
|
||||
} else
|
||||
BeamCtrlVal &= ~(BIT9 | BIT10 | BIT11);
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] BeamCtrlVal = 0x%x!\n", __func__, BeamCtrlVal));
|
||||
|
||||
ODM_Write2Byte(pDM_Odm, BeamCtrlReg, BeamCtrlVal);
|
||||
}
|
||||
|
||||
|
||||
|
||||
VOID
|
||||
HalTxbf8821B_FwTxBF(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte Idx
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo;
|
||||
PRT_BEAMFORMEE_ENTRY pBeamEntry = pBeamInfo->BeamformeeEntry + Idx;
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__));
|
||||
#if 0
|
||||
if (pBeamEntry->BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSING)
|
||||
halTxbf8821B_DownloadNDPA(pDM_Odm, Idx);
|
||||
|
||||
halTxbf8821B_FwTxBFCmd(pDM_Odm);
|
||||
#endif
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
#endif
|
||||
43
hal/phydm/txbf/haltxbf8821b.h
Normal file
43
hal/phydm/txbf/haltxbf8821b.h
Normal file
@@ -0,0 +1,43 @@
|
||||
#ifndef __HAL_TXBF_8821B_H__
|
||||
#define __HAL_TXBF_8821B_H__
|
||||
#if (BEAMFORMING_SUPPORT == 1)
|
||||
#if (RTL8821B_SUPPORT == 1)
|
||||
VOID
|
||||
HalTxbf8821B_Enter(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte Idx
|
||||
);
|
||||
|
||||
|
||||
VOID
|
||||
HalTxbf8821B_Leave(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte Idx
|
||||
);
|
||||
|
||||
|
||||
VOID
|
||||
HalTxbf8821B_Status(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte Idx
|
||||
);
|
||||
|
||||
|
||||
VOID
|
||||
HalTxbf8821B_FwTxBF(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte Idx
|
||||
);
|
||||
|
||||
#else
|
||||
#define HalTxbf8821B_Enter(pDM_VOID, Idx)
|
||||
#define HalTxbf8821B_Leave(pDM_VOID, Idx)
|
||||
#define HalTxbf8821B_Status(pDM_VOID, Idx)
|
||||
#define HalTxbf8821B_FwTxBF(pDM_VOID, Idx)
|
||||
#endif
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
#endif // #ifndef __HAL_TXBF_8821B_H__
|
||||
|
||||
1099
hal/phydm/txbf/haltxbf8822b.c
Normal file
1099
hal/phydm/txbf/haltxbf8822b.c
Normal file
File diff suppressed because it is too large
Load Diff
53
hal/phydm/txbf/haltxbf8822b.h
Normal file
53
hal/phydm/txbf/haltxbf8822b.h
Normal file
@@ -0,0 +1,53 @@
|
||||
#ifndef __HAL_TXBF_8822B_H__
|
||||
#define __HAL_TXBF_8822B_H__
|
||||
#if (BEAMFORMING_SUPPORT == 1)
|
||||
#if (RTL8822B_SUPPORT == 1)
|
||||
|
||||
VOID
|
||||
HalTxbf8822B_Init(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
HalTxbf8822B_Enter(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte Idx
|
||||
);
|
||||
|
||||
|
||||
VOID
|
||||
HalTxbf8822B_Leave(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte Idx
|
||||
);
|
||||
|
||||
|
||||
VOID
|
||||
HalTxbf8822B_Status(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte Idx
|
||||
);
|
||||
|
||||
VOID
|
||||
HalTxbf8822B_ConfigGtab(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
HalTxbf8822B_FwTxBF(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte Idx
|
||||
);
|
||||
#else
|
||||
#define HalTxbf8822B_Init(pDM_VOID)
|
||||
#define HalTxbf8822B_Enter(pDM_VOID, Idx)
|
||||
#define HalTxbf8822B_Leave(pDM_VOID, Idx)
|
||||
#define HalTxbf8822B_Status(pDM_VOID, Idx)
|
||||
#define HalTxbf8822B_FwTxBF(pDM_VOID, Idx)
|
||||
#define HalTxbf8822B_ConfigGtab(pDM_VOID)
|
||||
#endif
|
||||
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
||||
1384
hal/phydm/txbf/haltxbfinterface.c
Normal file
1384
hal/phydm/txbf/haltxbfinterface.c
Normal file
File diff suppressed because it is too large
Load Diff
158
hal/phydm/txbf/haltxbfinterface.h
Normal file
158
hal/phydm/txbf/haltxbfinterface.h
Normal file
@@ -0,0 +1,158 @@
|
||||
#ifndef __HAL_TXBF_INTERFACE_H__
|
||||
#define __HAL_TXBF_INTERFACE_H__
|
||||
|
||||
#if (BEAMFORMING_SUPPORT == 1)
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
||||
VOID
|
||||
Beamforming_GidPAid(
|
||||
PADAPTER Adapter,
|
||||
PRT_TCB pTcb
|
||||
);
|
||||
|
||||
RT_STATUS
|
||||
Beamforming_GetReportFrame(
|
||||
IN PADAPTER Adapter,
|
||||
IN PRT_RFD pRfd,
|
||||
IN POCTET_STRING pPduOS
|
||||
);
|
||||
|
||||
VOID
|
||||
Beamforming_GetNDPAFrame(
|
||||
IN PVOID pDM_VOID,
|
||||
IN OCTET_STRING pduOS
|
||||
);
|
||||
|
||||
BOOLEAN
|
||||
SendFWHTNDPAPacket(
|
||||
IN PVOID pDM_VOID,
|
||||
IN pu1Byte RA,
|
||||
IN CHANNEL_WIDTH BW
|
||||
);
|
||||
|
||||
BOOLEAN
|
||||
SendFWVHTNDPAPacket(
|
||||
IN PVOID pDM_VOID,
|
||||
IN pu1Byte RA,
|
||||
IN u2Byte AID,
|
||||
IN CHANNEL_WIDTH BW
|
||||
);
|
||||
|
||||
BOOLEAN
|
||||
SendSWVHTNDPAPacket(
|
||||
IN PVOID pDM_VOID,
|
||||
IN pu1Byte RA,
|
||||
IN u2Byte AID,
|
||||
IN CHANNEL_WIDTH BW
|
||||
);
|
||||
|
||||
BOOLEAN
|
||||
SendSWHTNDPAPacket(
|
||||
IN PVOID pDM_VOID,
|
||||
IN pu1Byte RA,
|
||||
IN CHANNEL_WIDTH BW
|
||||
);
|
||||
|
||||
#ifdef SUPPORT_MU_BF
|
||||
#if (SUPPORT_MU_BF == 1)
|
||||
RT_STATUS
|
||||
Beamforming_GetVHTGIDMgntFrame(
|
||||
IN PADAPTER Adapter,
|
||||
IN PRT_RFD pRfd,
|
||||
IN POCTET_STRING pPduOS
|
||||
);
|
||||
|
||||
BOOLEAN
|
||||
SendSWVHTGIDMgntFrame(
|
||||
IN PVOID pDM_VOID,
|
||||
IN pu1Byte RA,
|
||||
IN u1Byte Idx
|
||||
);
|
||||
|
||||
BOOLEAN
|
||||
SendSWVHTBFReportPoll(
|
||||
IN PVOID pDM_VOID,
|
||||
IN pu1Byte RA,
|
||||
IN BOOLEAN bFinalPoll
|
||||
);
|
||||
|
||||
BOOLEAN
|
||||
SendSWVHTMUNDPAPacket(
|
||||
IN PVOID pDM_VOID,
|
||||
IN CHANNEL_WIDTH BW
|
||||
);
|
||||
#else
|
||||
#define Beamforming_GetVHTGIDMgntFrame(Adapter, pRfd, pPduOS) RT_STATUS_FAILURE
|
||||
#define SendSWVHTGIDMgntFrame(pDM_VOID, RA)
|
||||
#define SendSWVHTBFReportPoll(pDM_VOID, RA, bFinalPoll)
|
||||
#define SendSWVHTMUNDPAPacket(pDM_VOID, BW)
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
|
||||
|
||||
u4Byte
|
||||
Beamforming_GetReportFrame(
|
||||
IN PVOID pDM_VOID,
|
||||
union recv_frame *precv_frame
|
||||
);
|
||||
|
||||
BOOLEAN
|
||||
SendFWHTNDPAPacket(
|
||||
IN PVOID pDM_VOID,
|
||||
IN pu1Byte RA,
|
||||
IN CHANNEL_WIDTH BW
|
||||
);
|
||||
|
||||
BOOLEAN
|
||||
SendSWHTNDPAPacket(
|
||||
IN PVOID pDM_VOID,
|
||||
IN pu1Byte RA,
|
||||
IN CHANNEL_WIDTH BW
|
||||
);
|
||||
|
||||
BOOLEAN
|
||||
SendFWVHTNDPAPacket(
|
||||
IN PVOID pDM_VOID,
|
||||
IN pu1Byte RA,
|
||||
IN u2Byte AID,
|
||||
IN CHANNEL_WIDTH BW
|
||||
);
|
||||
|
||||
BOOLEAN
|
||||
SendSWVHTNDPAPacket(
|
||||
IN PVOID pDM_VOID,
|
||||
IN pu1Byte RA,
|
||||
IN u2Byte AID,
|
||||
IN CHANNEL_WIDTH BW
|
||||
);
|
||||
#endif
|
||||
|
||||
VOID
|
||||
Beamforming_GetNDPAFrame(
|
||||
IN PVOID pDM_VOID,
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
||||
IN OCTET_STRING pduOS
|
||||
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
|
||||
union recv_frame *precv_frame
|
||||
#endif
|
||||
);
|
||||
|
||||
#else
|
||||
#define Beamforming_GetNDPAFrame(pDM_Odm, _PduOS)
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
|
||||
#define Beamforming_GetReportFrame(Adapter, precv_frame) RT_STATUS_FAILURE
|
||||
#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
||||
#define Beamforming_GetReportFrame(Adapter, pRfd, pPduOS) RT_STATUS_FAILURE
|
||||
#define Beamforming_GetVHTGIDMgntFrame(Adapter, pRfd, pPduOS) RT_STATUS_FAILURE
|
||||
#endif
|
||||
#define SendFWHTNDPAPacket(pDM_VOID, RA, BW)
|
||||
#define SendSWHTNDPAPacket(pDM_VOID, RA, BW)
|
||||
#define SendFWVHTNDPAPacket(pDM_VOID, RA, AID, BW)
|
||||
#define SendSWVHTNDPAPacket(pDM_VOID, RA, AID, BW)
|
||||
#define SendSWVHTGIDMgntFrame(pDM_VOID, RA, idx)
|
||||
#define SendSWVHTBFReportPoll(pDM_VOID, RA, bFinalPoll)
|
||||
#define SendSWVHTMUNDPAPacket(pDM_VOID, BW)
|
||||
#endif
|
||||
|
||||
#endif
|
||||
527
hal/phydm/txbf/haltxbfjaguar.c
Normal file
527
hal/phydm/txbf/haltxbfjaguar.c
Normal file
File diff suppressed because it is too large
Load Diff
67
hal/phydm/txbf/haltxbfjaguar.h
Normal file
67
hal/phydm/txbf/haltxbfjaguar.h
Normal file
@@ -0,0 +1,67 @@
|
||||
#ifndef __HAL_TXBF_JAGUAR_H__
|
||||
#define __HAL_TXBF_JAGUAR_H__
|
||||
|
||||
#if (BEAMFORMING_SUPPORT == 1)
|
||||
#if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1))
|
||||
VOID
|
||||
HalTxbf8812A_setNDPArate(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte BW,
|
||||
IN u1Byte Rate
|
||||
);
|
||||
|
||||
|
||||
VOID
|
||||
HalTxbfJaguar_Enter(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte Idx
|
||||
);
|
||||
|
||||
|
||||
VOID
|
||||
HalTxbfJaguar_Leave(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte Idx
|
||||
);
|
||||
|
||||
|
||||
VOID
|
||||
HalTxbfJaguar_Status(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte Idx
|
||||
);
|
||||
|
||||
|
||||
VOID
|
||||
HalTxbfJaguar_FwTxBF(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte Idx
|
||||
);
|
||||
|
||||
|
||||
VOID
|
||||
HalTxbfJaguar_Patch(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte Operation
|
||||
);
|
||||
|
||||
|
||||
VOID
|
||||
HalTxbfJaguar_Clk_8812A(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
#else
|
||||
|
||||
#define HalTxbf8812A_setNDPArate(pDM_VOID, BW, Rate)
|
||||
#define HalTxbfJaguar_Enter(pDM_VOID, Idx)
|
||||
#define HalTxbfJaguar_Leave(pDM_VOID, Idx)
|
||||
#define HalTxbfJaguar_Status(pDM_VOID, Idx)
|
||||
#define HalTxbfJaguar_FwTxBF(pDM_VOID, Idx)
|
||||
#define HalTxbfJaguar_Patch(pDM_VOID, Operation)
|
||||
#define HalTxbfJaguar_Clk_8812A(pDM_VOID)
|
||||
#endif
|
||||
|
||||
#endif
|
||||
#endif // #ifndef __HAL_TXBF_JAGUAR_H__
|
||||
|
||||
Reference in New Issue
Block a user