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Updated to 4.4.1

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This commit is contained in:
CGarces
2017-05-11 20:47:23 +02:00
parent 9dde4572b4
commit 3d6c7de21a
396 changed files with 174471 additions and 106990 deletions
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184
core/rtw_odm.c
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@@ -40,23 +40,25 @@ const char *odm_comp_str[] = {
/* BIT15 */"ODM_COMP_CFO_TRACKING",
/* BIT16 */"ODM_COMP_ACS",
/* BIT17 */"PHYDM_COMP_ADAPTIVITY",
/* BIT18 */NULL,
/* BIT19 */NULL,
/* BIT18 */"PHYDM_COMP_RA_DBG",
/* BIT19 */"PHYDM_COMP_TXBF",
/* BIT20 */"ODM_COMP_EDCA_TURBO",
/* BIT21 */"ODM_COMP_EARLY_MODE",
/* BIT22 */NULL,
/* BIT22 */"ODM_FW_DEBUG_TRACE",
/* BIT23 */NULL,
/* BIT24 */"ODM_COMP_TX_PWR_TRACK",
/* BIT25 */"ODM_COMP_RX_GAIN_TRACK",
/* BIT26 */"ODM_COMP_CALIBRATION",
/* BIT27 */NULL,
/* BIT28 */NULL,
/* BIT29 */NULL,
/* BIT28 */"ODM_PHY_CONFIG",
/* BIT29 */"BEAMFORMING_DEBUG",
/* BIT30 */"ODM_COMP_COMMON",
/* BIT31 */"ODM_COMP_INIT",
/* BIT32 */"ODM_COMP_NOISY_DETECT",
/* BIT33 */"ODM_COMP_DFS",
};
#define RTW_ODM_COMP_MAX 32
#define RTW_ODM_COMP_MAX 34
const char *odm_ability_str[] = {
/* BIT0 */"ODM_BB_DIG",
@@ -76,7 +78,7 @@ const char *odm_ability_str[] = {
/* BIT14 */"ODM_BB_CFO_TRACKING",
/* BIT15 */"ODM_BB_NHM_CNT",
/* BIT16 */"ODM_BB_PRIMARY_CCA",
/* BIT17 */NULL,
/* BIT17 */"ODM_BB_TXBF",
/* BIT18 */NULL,
/* BIT19 */NULL,
/* BIT20 */"ODM_MAC_EDCA_TURBO",
@@ -106,21 +108,22 @@ void rtw_odm_dbg_comp_msg(void *sel, _adapter *adapter)
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter);
DM_ODM_T *odm = &pHalData->odmpriv;
int cnt = 0;
u64 dbg_comp;
u64 dbg_comp = 0;
int i;
rtw_hal_get_def_var(adapter, HW_DEF_ODM_DBG_FLAG, &dbg_comp);
DBG_871X_SEL_NL(sel, "odm.DebugComponents = 0x%016llx \n", dbg_comp);
rtw_hal_get_odm_var(adapter, HAL_ODM_DBG_FLAG, &dbg_comp, NULL);
DBG_871X_SEL_NL(sel, "odm.DebugComponents = 0x%016llx\n", dbg_comp);
for (i=0;i<RTW_ODM_COMP_MAX;i++) {
if (odm_comp_str[i])
DBG_871X_SEL_NL(sel, "%cBIT%-2d %s\n",
(BIT0 << i) & dbg_comp ? '+' : ' ', i, odm_comp_str[i]);
DBG_871X_SEL_NL(sel, "%cBIT%-2d %s\n",
(BIT0 & (dbg_comp >> i)) ? '+' : ' ', i, odm_comp_str[i]);
}
}
inline void rtw_odm_dbg_comp_set(_adapter *adapter, u64 comps)
{
rtw_hal_set_def_var(adapter, HW_DEF_ODM_DBG_FLAG, &comps);
rtw_hal_set_odm_var(adapter, HAL_ODM_DBG_FLAG, &comps, _FALSE);
}
void rtw_odm_dbg_level_msg(void *sel, _adapter *adapter)
@@ -128,10 +131,10 @@ void rtw_odm_dbg_level_msg(void *sel, _adapter *adapter)
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter);
DM_ODM_T *odm = &pHalData->odmpriv;
int cnt = 0;
u32 dbg_level;
u32 dbg_level = 0;
int i;
rtw_hal_get_def_var(adapter, HW_DEF_ODM_DBG_LEVEL, &dbg_level);
rtw_hal_get_odm_var(adapter, HAL_ODM_DBG_LEVEL, &dbg_level, NULL);
DBG_871X_SEL_NL(sel, "odm.DebugLevel = %u\n", dbg_level);
for (i=0;i<RTW_ODM_DBG_LEVEL_NUM;i++) {
if (odm_dbg_level_str[i])
@@ -141,7 +144,7 @@ void rtw_odm_dbg_level_msg(void *sel, _adapter *adapter)
inline void rtw_odm_dbg_level_set(_adapter *adapter, u32 level)
{
rtw_hal_set_def_var(adapter, HW_DEF_ODM_DBG_LEVEL, &level);
rtw_hal_set_odm_var(adapter, HAL_ODM_DBG_LEVEL, &level, _FALSE);
}
void rtw_odm_ability_msg(void *sel, _adapter *adapter)
@@ -152,18 +155,44 @@ void rtw_odm_ability_msg(void *sel, _adapter *adapter)
u32 ability = 0;
int i;
rtw_hal_get_hwreg(adapter, HW_VAR_DM_FLAG, (u8*)&ability);
ability = rtw_phydm_ability_get(adapter);
DBG_871X_SEL_NL(sel, "odm.SupportAbility = 0x%08x\n", ability);
for (i=0;i<RTW_ODM_ABILITY_MAX;i++) {
if (odm_ability_str[i])
DBG_871X_SEL_NL(sel, "%cBIT%-2d %s\n",
(BIT0 << i) & ability ? '+' : ' ', i, odm_ability_str[i]);
DBG_871X_SEL_NL(sel, "%cBIT%-2d %s\n",
(BIT0 << i) & ability ? '+' : ' ', i, odm_ability_str[i]);
}
}
inline void rtw_odm_ability_set(_adapter *adapter, u32 ability)
{
rtw_hal_set_hwreg(adapter, HW_VAR_DM_FLAG, (u8*)&ability);
rtw_phydm_ability_set(adapter, ability);
}
/* set ODM_CMNINFO_IC_TYPE based on chip_type */
void rtw_odm_init_ic_type(_adapter *adapter)
{
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
DM_ODM_T *odm = &hal_data->odmpriv;
u4Byte ic_type = chip_type_to_odm_ic_type(rtw_get_chip_type(adapter));
rtw_warn_on(!ic_type);
ODM_CmnInfoInit(odm, ODM_CMNINFO_IC_TYPE, ic_type);
}
inline void rtw_odm_set_force_igi_lb(_adapter *adapter, u8 lb)
{
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
hal_data->u1ForcedIgiLb = lb;
}
inline u8 rtw_odm_get_force_igi_lb(_adapter *adapter)
{
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
return hal_data->u1ForcedIgiLb;
}
void rtw_odm_adaptivity_ver_msg(void *sel, _adapter *adapter)
@@ -173,7 +202,6 @@ void rtw_odm_adaptivity_ver_msg(void *sel, _adapter *adapter)
#define RTW_ADAPTIVITY_EN_DISABLE 0
#define RTW_ADAPTIVITY_EN_ENABLE 1
#define RTW_ADAPTIVITY_EN_AUTO 2
void rtw_odm_adaptivity_en_msg(void *sel, _adapter *adapter)
{
@@ -188,9 +216,6 @@ void rtw_odm_adaptivity_en_msg(void *sel, _adapter *adapter)
DBG_871X_SEL(sel, "DISABLE\n");
} else if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_ENABLE) {
DBG_871X_SEL(sel, "ENABLE\n");
} else if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_AUTO) {
DBG_871X_SEL(sel, "AUTO, chplan:0x%02x, Regulation:%u,%u\n"
, mlme->ChannelPlan, odm->odm_Regulation2_4G, odm->odm_Regulation5G);
} else {
DBG_871X_SEL(sel, "INVALID\n");
}
@@ -214,41 +239,49 @@ void rtw_odm_adaptivity_mode_msg(void *sel, _adapter *adapter)
}
}
#define RTW_NHM_EN_DISABLE 0
#define RTW_NHM_EN_ENABLE 1
#define RTW_ADAPTIVITY_DML_DISABLE 0
#define RTW_ADAPTIVITY_DML_ENABLE 1
void rtw_odm_nhm_en_msg(void *sel, _adapter *adapter)
void rtw_odm_adaptivity_dml_msg(void *sel, _adapter *adapter)
{
struct registry_priv *regsty = &adapter->registrypriv;
DBG_871X_SEL_NL(sel, "RTW_NHM_EN_");
DBG_871X_SEL_NL(sel, "RTW_ADAPTIVITY_DML_");
if (regsty->nhm_en == RTW_NHM_EN_DISABLE) {
if (regsty->adaptivity_dml == RTW_ADAPTIVITY_DML_DISABLE) {
DBG_871X_SEL(sel, "DISABLE\n");
} else if (regsty->nhm_en == RTW_NHM_EN_ENABLE) {
} else if (regsty->adaptivity_dml == RTW_ADAPTIVITY_DML_ENABLE) {
DBG_871X_SEL(sel, "ENABLE\n");
} else {
DBG_871X_SEL(sel, "INVALID\n");
}
}
void rtw_odm_adaptivity_dc_backoff_msg(void *sel, _adapter *adapter)
{
struct registry_priv *regsty = &adapter->registrypriv;
DBG_871X_SEL_NL(sel, "RTW_ADAPTIVITY_DC_BACKOFF:%u\n", regsty->adaptivity_dc_backoff);
}
void rtw_odm_adaptivity_config_msg(void *sel, _adapter *adapter)
{
rtw_odm_adaptivity_ver_msg(sel, adapter);
rtw_odm_adaptivity_en_msg(sel, adapter);
rtw_odm_adaptivity_mode_msg(sel, adapter);
rtw_odm_adaptivity_dml_msg(sel, adapter);
rtw_odm_adaptivity_dc_backoff_msg(sel, adapter);
}
bool rtw_odm_adaptivity_needed(_adapter *adapter)
{
struct registry_priv *regsty = &adapter->registrypriv;
struct mlme_priv *mlme = &adapter->mlmepriv;
bool ret = _FALSE;
if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_ENABLE
|| regsty->adaptivity_en == RTW_ADAPTIVITY_EN_AUTO)
if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_ENABLE)
ret = _TRUE;
if (ret == _TRUE) {
rtw_odm_adaptivity_ver_msg(RTW_DBGDUMP, adapter);
rtw_odm_adaptivity_en_msg(RTW_DBGDUMP, adapter);
rtw_odm_adaptivity_mode_msg(RTW_DBGDUMP, adapter);
rtw_odm_nhm_en_msg(RTW_DBGDUMP, adapter);
}
return ret;
}
@@ -257,43 +290,35 @@ void rtw_odm_adaptivity_parm_msg(void *sel, _adapter *adapter)
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter);
DM_ODM_T *odm = &pHalData->odmpriv;
rtw_odm_adaptivity_ver_msg(sel, adapter);
rtw_odm_adaptivity_en_msg(sel, adapter);
rtw_odm_adaptivity_mode_msg(sel, adapter);
rtw_odm_nhm_en_msg(sel, adapter);
rtw_odm_adaptivity_config_msg(sel, adapter);
DBG_871X_SEL_NL(sel, "%10s %16s %8s %10s %11s %14s\n"
, "TH_L2H_ini", "TH_EDCCA_HL_diff", "IGI_Base", "ForceEDCCA", "AdapEn_RSSI", "IGI_LowerBound");
DBG_871X_SEL_NL(sel, "0x%-8x %-16d 0x%-6x %-10d %-11u %-14u\n"
DBG_871X_SEL_NL(sel, "%10s %16s %16s %22s %12s\n"
, "TH_L2H_ini", "TH_EDCCA_HL_diff", "TH_L2H_ini_mode2", "TH_EDCCA_HL_diff_mode2", "EDCCA_enable");
DBG_871X_SEL_NL(sel, "0x%-8x %-16d 0x%-14x %-22d %-12d\n"
, (u8)odm->TH_L2H_ini
, odm->TH_EDCCA_HL_diff
, odm->IGI_Base
, odm->ForceEDCCA
, odm->AdapEn_RSSI
, odm->IGI_LowerBound
, (u8)odm->TH_L2H_ini_mode2
, odm->TH_EDCCA_HL_diff_mode2
, odm->EDCCA_enable
);
DBG_871X_SEL_NL(sel, "%8s %9s\n", "EDCCA_ES","Adap_Flag");
DBG_871X_SEL_NL(sel, "%-8x %-9x \n"
, odm->EDCCA_enable_state
DBG_871X_SEL_NL(sel, "%15s %9s\n", "AdapEnableState", "Adap_Flag");
DBG_871X_SEL_NL(sel, "%-15x %-9x\n"
, odm->Adaptivity_enable
, odm->adaptivity_flag
);
}
void rtw_odm_adaptivity_parm_set(_adapter *adapter, s8 TH_L2H_ini, s8 TH_EDCCA_HL_diff,
s8 IGI_Base, bool ForceEDCCA, u8 AdapEn_RSSI, u8 IGI_LowerBound)
void rtw_odm_adaptivity_parm_set(_adapter *adapter, s8 TH_L2H_ini, s8 TH_EDCCA_HL_diff, s8 TH_L2H_ini_mode2, s8 TH_EDCCA_HL_diff_mode2, u8 EDCCA_enable)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter);
DM_ODM_T *odm = &pHalData->odmpriv;
odm->TH_L2H_ini = TH_L2H_ini;
odm->TH_EDCCA_HL_diff = TH_EDCCA_HL_diff;
odm->IGI_Base = IGI_Base;
odm->ForceEDCCA = ForceEDCCA;
odm->AdapEn_RSSI = AdapEn_RSSI;
odm->IGI_LowerBound = IGI_LowerBound;
odm->TH_L2H_ini_mode2 = TH_L2H_ini_mode2;
odm->TH_EDCCA_HL_diff_mode2 = TH_EDCCA_HL_diff_mode2;
odm->EDCCA_enable = EDCCA_enable;
}
void rtw_odm_get_perpkt_rssi(void *sel, _adapter *adapter)
@@ -309,13 +334,12 @@ void rtw_odm_get_perpkt_rssi(void *sel, _adapter *adapter)
void rtw_odm_acquirespinlock(_adapter *adapter, RT_SPINLOCK_TYPE type)
{
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
_irqL irqL;
switch(type)
{
case RT_IQK_SPINLOCK:
_enter_critical_bh(&pdmpriv->IQKSpinLock, &irqL);
_enter_critical_bh(&pHalData->IQKSpinLock, &irqL);
default:
break;
}
@@ -324,15 +348,45 @@ void rtw_odm_acquirespinlock(_adapter *adapter, RT_SPINLOCK_TYPE type)
void rtw_odm_releasespinlock(_adapter *adapter, RT_SPINLOCK_TYPE type)
{
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
_irqL irqL;
switch(type)
{
case RT_IQK_SPINLOCK:
_exit_critical_bh(&pdmpriv->IQKSpinLock, &irqL);
_exit_critical_bh(&pHalData->IQKSpinLock, &irqL);
default:
break;
}
}
#ifdef CONFIG_DFS_MASTER
inline u8 rtw_odm_get_dfs_domain(_adapter *adapter)
{
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
PDM_ODM_T pDM_Odm = &(hal_data->odmpriv);
return pDM_Odm->DFS_RegionDomain;
}
inline VOID rtw_odm_radar_detect_reset(_adapter *adapter)
{
phydm_radar_detect_reset(GET_ODM(adapter));
}
inline VOID rtw_odm_radar_detect_disable(_adapter *adapter)
{
phydm_radar_detect_disable(GET_ODM(adapter));
}
/* called after ch, bw is set */
inline VOID rtw_odm_radar_detect_enable(_adapter *adapter)
{
phydm_radar_detect_enable(GET_ODM(adapter));
}
inline BOOLEAN rtw_odm_radar_detect(_adapter *adapter)
{
return phydm_radar_detect(GET_ODM(adapter));
}
#endif /* CONFIG_DFS_MASTER */