mirror of
https://github.com/Mange/rtl8192eu-linux-driver
synced 2024-12-25 13:31:44 +00:00
1387cf623d
Version information: 20140812_rtl8192EU_linux_v4.3.1.1_11320 2014-08-12 version 4.3.1.1_11320 Source: ftp://files.dlink.com.au/products/DWA-131/REV_E/Drivers/DWA-131_Linux_driver_v4.3.1.1.zip This version does not currently work on newer kernels, but it does contain USB ID 2001:3319, which a lot of other repos in GitHub does not.
96 lines
2.5 KiB
C
96 lines
2.5 KiB
C
|
|
/*++
|
|
Copyright (c) Realtek Semiconductor Corp. All rights reserved.
|
|
|
|
Module Name:
|
|
Hal8192EPwrSeq.c
|
|
|
|
Abstract:
|
|
This file includes all kinds of Power Action event for RTL8192E and corresponding hardware configurtions which are released from HW SD.
|
|
|
|
Major Change History:
|
|
When Who What
|
|
---------- --------------- -------------------------------
|
|
2011-08-08 Roger Create.
|
|
|
|
--*/
|
|
|
|
//#include "Mp_Precomp.h"
|
|
|
|
#include "Hal8192EPwrSeq.h"
|
|
|
|
/*
|
|
drivers should parse below arrays and do the corresponding actions
|
|
*/
|
|
//3 Power on Array
|
|
WLAN_PWR_CFG rtl8192E_power_on_flow[RTL8192E_TRANS_CARDEMU_TO_ACT_STEPS+RTL8192E_TRANS_END_STEPS]=
|
|
{
|
|
RTL8192E_TRANS_CARDEMU_TO_ACT
|
|
RTL8192E_TRANS_END
|
|
};
|
|
|
|
//3Radio off GPIO Array
|
|
WLAN_PWR_CFG rtl8192E_radio_off_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192E_TRANS_END_STEPS]=
|
|
{
|
|
RTL8192E_TRANS_ACT_TO_CARDEMU
|
|
RTL8192E_TRANS_END
|
|
};
|
|
|
|
//3Card Disable Array
|
|
WLAN_PWR_CFG rtl8192E_card_disable_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8192E_TRANS_END_STEPS]=
|
|
{
|
|
RTL8192E_TRANS_ACT_TO_CARDEMU
|
|
RTL8192E_TRANS_CARDEMU_TO_CARDDIS
|
|
RTL8192E_TRANS_END
|
|
};
|
|
|
|
//3 Card Enable Array
|
|
WLAN_PWR_CFG rtl8192E_card_enable_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8192E_TRANS_END_STEPS]=
|
|
{
|
|
RTL8192E_TRANS_CARDDIS_TO_CARDEMU
|
|
RTL8192E_TRANS_CARDEMU_TO_ACT
|
|
RTL8192E_TRANS_END
|
|
};
|
|
|
|
//3Suspend Array
|
|
WLAN_PWR_CFG rtl8192E_suspend_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192E_TRANS_CARDEMU_TO_SUS_STEPS+RTL8192E_TRANS_END_STEPS]=
|
|
{
|
|
RTL8192E_TRANS_ACT_TO_CARDEMU
|
|
RTL8192E_TRANS_CARDEMU_TO_SUS
|
|
RTL8192E_TRANS_END
|
|
};
|
|
|
|
//3 Resume Array
|
|
WLAN_PWR_CFG rtl8192E_resume_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192E_TRANS_CARDEMU_TO_SUS_STEPS+RTL8192E_TRANS_END_STEPS]=
|
|
{
|
|
RTL8192E_TRANS_SUS_TO_CARDEMU
|
|
RTL8192E_TRANS_CARDEMU_TO_ACT
|
|
RTL8192E_TRANS_END
|
|
};
|
|
|
|
|
|
|
|
//3HWPDN Array
|
|
WLAN_PWR_CFG rtl8192E_hwpdn_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8192E_TRANS_END_STEPS]=
|
|
{
|
|
RTL8192E_TRANS_ACT_TO_CARDEMU
|
|
RTL8192E_TRANS_CARDEMU_TO_PDN
|
|
RTL8192E_TRANS_END
|
|
};
|
|
|
|
//3 Enter LPS
|
|
WLAN_PWR_CFG rtl8192E_enter_lps_flow[RTL8192E_TRANS_ACT_TO_LPS_STEPS+RTL8192E_TRANS_END_STEPS]=
|
|
{
|
|
//FW behavior
|
|
RTL8192E_TRANS_ACT_TO_LPS
|
|
RTL8192E_TRANS_END
|
|
};
|
|
|
|
//3 Leave LPS
|
|
WLAN_PWR_CFG rtl8192E_leave_lps_flow[RTL8192E_TRANS_LPS_TO_ACT_STEPS+RTL8192E_TRANS_END_STEPS]=
|
|
{
|
|
//FW behavior
|
|
RTL8192E_TRANS_LPS_TO_ACT
|
|
RTL8192E_TRANS_END
|
|
};
|