mirror of
https://github.com/Mange/rtl8192eu-linux-driver
synced 2024-11-01 11:15:31 +00:00
654 lines
21 KiB
C
654 lines
21 KiB
C
//============================================================
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// Description:
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//
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// This file is for 8814A TXBF mechanism
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//
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//============================================================
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#include "mp_precomp.h"
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#include "../phydm_precomp.h"
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#if (BEAMFORMING_SUPPORT == 1)
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#if (RTL8814A_SUPPORT == 1)
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VOID
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HalTxbf8814A_setNDPArate(
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IN PVOID pDM_VOID,
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IN u1Byte BW,
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IN u1Byte Rate
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)
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{
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PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
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ODM_Write1Byte(pDM_Odm, REG_NDPA_OPT_CTRL_8814A, BW);
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ODM_Write1Byte(pDM_Odm, REG_NDPA_RATE_8814A, (u1Byte) Rate);
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}
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#define PHYDM_MEMORY_MAP_BUF_READ 0x8000
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#define PHYDM_CTRL_INFO_PAGE 0x660
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VOID
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phydm_DataRate_8814A(
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IN PDM_ODM_T pDM_Odm,
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IN u1Byte macId,
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OUT pu4Byte data,
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IN u1Byte dataLen
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)
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{
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u1Byte i = 0;
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u2Byte XReadDataAddr = 0;
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ODM_Write2Byte(pDM_Odm, REG_PKTBUF_DBG_CTRL_8814A, PHYDM_CTRL_INFO_PAGE);
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XReadDataAddr = PHYDM_MEMORY_MAP_BUF_READ + macId*32; /*Ctrl Info: 32Bytes for each macid(n)*/
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if ((XReadDataAddr < PHYDM_MEMORY_MAP_BUF_READ) || (XReadDataAddr > 0x8FFF)) {
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ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("XReadDataAddr(0x%x) is not correct!\n", XReadDataAddr));
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return;
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}
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/* Read data */
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for (i = 0; i < dataLen; i++)
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*(data+i) = ODM_Read2Byte(pDM_Odm, XReadDataAddr+i);
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}
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VOID
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HalTxbf8814A_GetTxRate(
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IN PVOID pDM_VOID
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)
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{
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PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
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PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo;
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PRT_BEAMFORMEE_ENTRY pEntry;
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u4Byte TxRptData = 0;
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u1Byte DataRate = 0xFF;
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pEntry = &(pBeamInfo->BeamformeeEntry[pBeamInfo->BeamformeeCurIdx]);
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phydm_DataRate_8814A(pDM_Odm, (u1Byte)pEntry->MacId, &TxRptData, 1);
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DataRate = (u1Byte)TxRptData;
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DataRate &= bMask7bits; /*Bit7 indicates SGI*/
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pDM_Odm->TxBfDataRate = DataRate;
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ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] pDM_Odm->TxBfDataRate = 0x%x\n", __func__, pDM_Odm->TxBfDataRate));
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}
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VOID
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HalTxbf8814A_ResetTxPath(
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IN PVOID pDM_VOID,
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IN u1Byte idx
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)
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{
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PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
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#if DEV_BUS_TYPE == RT_USB_INTERFACE
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PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo;
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RT_BEAMFORMEE_ENTRY BeamformeeEntry;
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u1Byte Nr_index = 0;
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if (idx < BEAMFORMEE_ENTRY_NUM)
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BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[idx];
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else
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return;
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if ((pDM_Odm->LastUSBHub) != (*pDM_Odm->HubUsbMode)) {
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Nr_index = TxBF_Nr(halTxbf8814A_GetNtx(pDM_Odm), BeamformeeEntry.CompSteeringNumofBFer);
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if (idx == 0) {
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switch (Nr_index) {
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case 0:
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break;
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case 1: /*Nsts = 2 BC*/
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ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF0, bMaskByte3LowNibble | bMaskL3Bytes, 0x9366); /*tx2path, BC*/
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ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x936);
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ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskLWord, 0x9360);
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break;
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case 2: /*Nsts = 3 BCD*/
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ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF0, bMaskByte3LowNibble | bMaskL3Bytes, 0x93e93ee); /*tx3path, BCD*/
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ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x93e);
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ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskDWord, 0x93e93e0);
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break;
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default: /*Nr>3, same as Case 3*/
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ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF0, bMaskByte3LowNibble | bMaskL3Bytes, 0x93f93ff); /*tx4path, ABCD*/
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ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x93f);
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ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskDWord, 0x93f93f0);
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break;
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}
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} else {
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switch (Nr_index) {
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case 0:
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break;
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case 1: /*Nsts = 2 BC*/
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ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1, bMaskByte3LowNibble | bMaskL3Bytes, 0x9366); /*tx2path, BC*/
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ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x936);
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ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskLWord, 0x9360);
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break;
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case 2: /*Nsts = 3 BCD*/
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ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1, bMaskByte3LowNibble | bMaskL3Bytes, 0x93e93ee); /*tx3path, BCD*/
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ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x93e);
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ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskDWord, 0x93e93e0);
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break;
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default: /*Nr>3, same as Case 3*/
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ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1, bMaskByte3LowNibble | bMaskL3Bytes, 0x93f93ff); /*tx4path, ABCD*/
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ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x93f);
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ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskDWord, 0x93f93f0);
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break;
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}
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}
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pDM_Odm->LastUSBHub = *pDM_Odm->HubUsbMode;
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} else
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return;
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#endif
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}
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u1Byte
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halTxbf8814A_GetNtx(
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IN PVOID pDM_VOID
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)
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{
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PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
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u1Byte Ntx = 0;
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#if DEV_BUS_TYPE == RT_USB_INTERFACE
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if (pDM_Odm->SupportInterface == ODM_ITRF_USB) {
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if (*pDM_Odm->HubUsbMode == 2) {/*USB3.0*/
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if (pDM_Odm->RFType == ODM_4T4R)
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Ntx = 3;
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else if (pDM_Odm->RFType == ODM_3T3R)
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Ntx = 2;
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else
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Ntx = 1;
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} else if (*pDM_Odm->HubUsbMode == 1) /*USB 2.0 always 2Tx*/
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Ntx = 1;
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else
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Ntx = 1;
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} else
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#endif
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{
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if (pDM_Odm->RFType == ODM_4T4R)
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Ntx = 3;
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else if (pDM_Odm->RFType == ODM_3T3R)
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Ntx = 2;
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else
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Ntx = 1;
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}
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ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Ntx = %d\n", __func__, Ntx));
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return Ntx;
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}
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u1Byte
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halTxbf8814A_GetNrx(
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IN PVOID pDM_VOID
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)
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{
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PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
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u1Byte Nrx = 0;
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if (pDM_Odm->RFType == ODM_4T4R)
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Nrx = 3;
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else if (pDM_Odm->RFType == ODM_3T3R)
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Nrx = 2;
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else if (pDM_Odm->RFType == ODM_2T2R)
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Nrx = 1;
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else if (pDM_Odm->RFType == ODM_2T3R)
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Nrx = 2;
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else if (pDM_Odm->RFType == ODM_2T4R)
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Nrx = 3;
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else if (pDM_Odm->RFType == ODM_1T1R)
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Nrx = 0;
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else if (pDM_Odm->RFType == ODM_1T2R)
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Nrx = 1;
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else
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Nrx = 0;
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ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Nrx = %d\n", __func__, Nrx));
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return Nrx;
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}
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VOID
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halTxbf8814A_RfMode(
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IN PVOID pDM_VOID,
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IN PRT_BEAMFORMING_INFO pBeamformingInfo,
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IN u1Byte idx
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)
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{
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PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
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u1Byte i, Nr_index = 0;
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RT_BEAMFORMEE_ENTRY BeamformeeEntry;
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if (idx < BEAMFORMEE_ENTRY_NUM)
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BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[idx];
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else
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return;
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Nr_index = TxBF_Nr(halTxbf8814A_GetNtx(pDM_Odm), BeamformeeEntry.CompSteeringNumofBFer);
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if (pDM_Odm->RFType == ODM_1T1R)
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return;
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for (i = ODM_RF_PATH_A; i < MAX_RF_PATH; i++) {
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ODM_SetRFReg(pDM_Odm, i, RF_WeLut_Jaguar, 0x80000, 0x1);
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/*RF Mode table write enable*/
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}
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if (pBeamformingInfo->beamformee_su_cnt > 0) {
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for (i = ODM_RF_PATH_A; i < MAX_RF_PATH; i++) {
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ODM_SetRFReg(pDM_Odm, i, RF_ModeTableAddr, 0xfffff, 0x18000);
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/*Select RX mode*/
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ODM_SetRFReg(pDM_Odm, i, RF_ModeTableData0, 0xfffff, 0xBE77F);
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/*Set Table data*/
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ODM_SetRFReg(pDM_Odm, i, RF_ModeTableData1, 0xfffff, 0x226BF);
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/*Enable TXIQGEN in RX mode*/
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}
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ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData1, 0xfffff, 0xE26BF);
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/*Enable TXIQGEN in RX mode*/
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}
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for (i = ODM_RF_PATH_A; i < MAX_RF_PATH; i++) {
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ODM_SetRFReg(pDM_Odm, i, RF_WeLut_Jaguar, 0x80000, 0x0);
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/*RF Mode table write disable*/
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}
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if (pBeamformingInfo->beamformee_su_cnt > 0) {
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#if DEV_BUS_TYPE == RT_USB_INTERFACE
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pDM_Odm->LastUSBHub = *pDM_Odm->HubUsbMode;
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#endif
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/*for 8814 19ac(idx 1), 19b4(idx 0), different Tx ant setting*/
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ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1, BIT28 | BIT29, 0x2); /*enable BB TxBF ant mapping register*/
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if (idx == 0) {
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switch (Nr_index) {
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case 0:
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break;
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case 1: /*Nsts = 2 BC*/
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ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF0, bMaskByte3LowNibble | bMaskL3Bytes, 0x9366); /*tx2path, BC*/
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ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x936);
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ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskLWord, 0x9360);
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break;
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case 2: /*Nsts = 3 BCD*/
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ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF0, bMaskByte3LowNibble | bMaskL3Bytes, 0x93e93ee); /*tx3path, BCD*/
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ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x93e);
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ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskDWord, 0x93e93e0);
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break;
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default: /*Nr>3, same as Case 3*/
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ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF0, bMaskByte3LowNibble | bMaskL3Bytes, 0x93f93ff); /*tx4path, ABCD*/
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ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x93f);
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ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskDWord, 0x93f93f0);
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break;
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}
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} else {
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switch (Nr_index) {
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case 0:
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break;
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case 1: /*Nsts = 2 BC*/
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ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1, bMaskByte3LowNibble | bMaskL3Bytes, 0x9366); /*tx2path, BC*/
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ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x936);
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ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskLWord, 0x9360);
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break;
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case 2: /*Nsts = 3 BCD*/
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ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1, bMaskByte3LowNibble | bMaskL3Bytes, 0x93e93ee); /*tx3path, BCD*/
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ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x93e);
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ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskDWord, 0x93e93e0);
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break;
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default: /*Nr>3, same as Case 3*/
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ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1, bMaskByte3LowNibble | bMaskL3Bytes, 0x93f93ff); /*tx4path, ABCD*/
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ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x93f);
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ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskDWord, 0x93f93f0);
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break;
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}
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}
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}
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if ((pBeamformingInfo->beamformee_su_cnt == 0) && (pBeamformingInfo->beamformer_su_cnt == 0)) {
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ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1, bMaskByte3 | bMaskByte2HighNibble, 0x932); /*set TxPath selection for 8814a BFer bug refine*/
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ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2, bMaskDWord, 0x93e9360);
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}
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}
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#if 0
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VOID
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halTxbf8814A_DownloadNDPA(
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IN PADAPTER Adapter,
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IN u1Byte Idx
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)
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{
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u1Byte u1bTmp = 0, tmpReg422 = 0;
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u1Byte BcnValidReg = 0, count = 0, DLBcnCount = 0;
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u2Byte Head_Page = 0x7FE;
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BOOLEAN bSendBeacon = FALSE;
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
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u2Byte TxPageBndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8814A; /*default reseved 1 page for the IC type which is undefined.*/
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PRT_BEAMFORMING_INFO pBeamInfo = GET_BEAMFORM_INFO(Adapter);
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PRT_BEAMFORMEE_ENTRY pBeamEntry = pBeamInfo->BeamformeeEntry + Idx;
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pHalData->bFwDwRsvdPageInProgress = TRUE;
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Adapter->HalFunc.GetHalDefVarHandler(Adapter, HAL_DEF_TX_PAGE_BOUNDARY, (pu2Byte)&TxPageBndy);
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/*Set REG_CR bit 8. DMA beacon by SW.*/
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u1bTmp = PlatformEFIORead1Byte(Adapter, REG_CR_8814A + 1);
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PlatformEFIOWrite1Byte(Adapter, REG_CR_8814A + 1, (u1bTmp | BIT0));
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/*Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.*/
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tmpReg422 = PlatformEFIORead1Byte(Adapter, REG_FWHW_TXQ_CTRL_8814A + 2);
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PlatformEFIOWrite1Byte(Adapter, REG_FWHW_TXQ_CTRL_8814A + 2, tmpReg422 & (~BIT6));
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if (tmpReg422 & BIT6) {
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RT_TRACE(COMP_INIT, DBG_LOUD, ("SetBeamformDownloadNDPA_8814A(): There is an Adapter is sending beacon.\n"));
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bSendBeacon = TRUE;
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}
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/*0x204[11:0] Beacon Head for TXDMA*/
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PlatformEFIOWrite2Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A, Head_Page);
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do {
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/*Clear beacon valid check bit.*/
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BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A + 1);
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PlatformEFIOWrite1Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A + 1, (BcnValidReg | BIT7));
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/*download NDPA rsvd page.*/
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if (pBeamEntry->BeamformEntryCap & BEAMFORMER_CAP_VHT_SU)
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Beamforming_SendVHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->AID, pBeamEntry->SoundBW, BEACON_QUEUE);
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else
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Beamforming_SendHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->SoundBW, BEACON_QUEUE);
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/*check rsvd page download OK.*/
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BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A + 1);
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count = 0;
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while (!(BcnValidReg & BIT7) && count < 20) {
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count++;
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delay_us(10);
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BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A + 2);
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}
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DLBcnCount++;
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} while (!(BcnValidReg & BIT7) && DLBcnCount < 5);
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|
|
if (!(BcnValidReg & BIT0))
|
|
RT_DISP(FBEAM, FBEAM_ERROR, ("%s Download RSVD page failed!\n", __func__));
|
|
|
|
/*0x204[11:0] Beacon Head for TXDMA*/
|
|
PlatformEFIOWrite2Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A, TxPageBndy);
|
|
|
|
/*To make sure that if there exists an adapter which would like to send beacon.*/
|
|
/*If exists, the origianl value of 0x422[6] will be 1, we should check this to*/
|
|
/*prevent from setting 0x422[6] to 0 after download reserved page, or it will cause */
|
|
/*the beacon cannot be sent by HW.*/
|
|
/*2010.06.23. Added by tynli.*/
|
|
if (bSendBeacon)
|
|
PlatformEFIOWrite1Byte(Adapter, REG_FWHW_TXQ_CTRL_8814A + 2, tmpReg422);
|
|
|
|
/*Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/
|
|
/*Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/
|
|
u1bTmp = PlatformEFIORead1Byte(Adapter, REG_CR_8814A + 1);
|
|
PlatformEFIOWrite1Byte(Adapter, REG_CR_8814A + 1, (u1bTmp & (~BIT0)));
|
|
|
|
pBeamEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_PROGRESSED;
|
|
|
|
pHalData->bFwDwRsvdPageInProgress = FALSE;
|
|
}
|
|
|
|
VOID
|
|
halTxbf8814A_FwTxBFCmd(
|
|
IN PADAPTER Adapter
|
|
)
|
|
{
|
|
u1Byte Idx, Period = 0;
|
|
u1Byte PageNum0 = 0xFF, PageNum1 = 0xFF;
|
|
u1Byte u1TxBFParm[3] = {0};
|
|
|
|
PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo);
|
|
PRT_BEAMFORMING_INFO pBeamInfo = GET_BEAMFORM_INFO(Adapter);
|
|
|
|
for (Idx = 0; Idx < BEAMFORMEE_ENTRY_NUM; Idx++) {
|
|
if (pBeamInfo->BeamformeeEntry[Idx].bUsed && pBeamInfo->BeamformeeEntry[Idx].BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) {
|
|
if (pBeamInfo->BeamformeeEntry[Idx].bSound) {
|
|
PageNum0 = 0xFE;
|
|
PageNum1 = 0x07;
|
|
Period = (u1Byte)(pBeamInfo->BeamformeeEntry[Idx].SoundPeriod);
|
|
} else if (PageNum0 == 0xFF) {
|
|
PageNum0 = 0xFF; /*stop sounding*/
|
|
PageNum1 = 0x0F;
|
|
}
|
|
}
|
|
}
|
|
|
|
u1TxBFParm[0] = PageNum0;
|
|
u1TxBFParm[1] = PageNum1;
|
|
u1TxBFParm[2] = Period;
|
|
FillH2CCmd(Adapter, PHYDM_H2C_TXBF, 3, u1TxBFParm);
|
|
|
|
RT_DISP(FBEAM, FBEAM_FUN, ("@%s End, PageNum0 = 0x%x, PageNum1 = 0x%x Period = %d", __func__, PageNum0, PageNum1, Period));
|
|
}
|
|
#endif
|
|
VOID
|
|
HalTxbf8814A_Enter(
|
|
IN PVOID pDM_VOID,
|
|
IN u1Byte BFerBFeeIdx
|
|
)
|
|
{
|
|
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
|
u1Byte i = 0;
|
|
u1Byte BFerIdx = (BFerBFeeIdx & 0xF0) >> 4;
|
|
u1Byte BFeeIdx = (BFerBFeeIdx & 0xF);
|
|
PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo;
|
|
RT_BEAMFORMEE_ENTRY BeamformeeEntry;
|
|
RT_BEAMFORMER_ENTRY BeamformerEntry;
|
|
u2Byte STAid = 0, CSI_Param = 0;
|
|
u1Byte Nc_index = 0, Nr_index = 0, grouping = 0, codebookinfo = 0, coefficientsize = 0;
|
|
|
|
ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] BFerIdx=%d, BFeeIdx=%d\n", __func__, BFerIdx, BFeeIdx));
|
|
ODM_SetMACReg(pDM_Odm, REG_SND_PTCL_CTRL_8814A, bMaskByte1 | bMaskByte2, 0x0202);
|
|
|
|
if ((pBeamformingInfo->beamformer_su_cnt > 0) && (BFerIdx < BEAMFORMER_ENTRY_NUM)) {
|
|
BeamformerEntry = pBeamformingInfo->BeamformerEntry[BFerIdx];
|
|
/*Sounding protocol control*/
|
|
ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8814A, 0xDB);
|
|
|
|
/*MAC address/Partial AID of Beamformer*/
|
|
if (BFerIdx == 0) {
|
|
for (i = 0; i < 6 ; i++)
|
|
ODM_Write1Byte(pDM_Odm, (REG_ASSOCIATED_BFMER0_INFO_8814A + i), BeamformerEntry.MacAddr[i]);
|
|
} else {
|
|
for (i = 0; i < 6 ; i++)
|
|
ODM_Write1Byte(pDM_Odm, (REG_ASSOCIATED_BFMER1_INFO_8814A + i), BeamformerEntry.MacAddr[i]);
|
|
}
|
|
|
|
/*CSI report parameters of Beamformer*/
|
|
Nc_index = halTxbf8814A_GetNrx(pDM_Odm); /*for 8814A Nrx = 3(4 Ant), min=0(1 Ant)*/
|
|
Nr_index = BeamformerEntry.NumofSoundingDim; /*0x718[7] = 1 use Nsts, 0x718[7] = 0 use reg setting. as Bfee, we use Nsts, so Nr_index don't care*/
|
|
|
|
grouping = 0;
|
|
|
|
/*for ac = 1, for n = 3*/
|
|
if (BeamformerEntry.BeamformEntryCap & BEAMFORMEE_CAP_VHT_SU)
|
|
codebookinfo = 1;
|
|
else if (BeamformerEntry.BeamformEntryCap & BEAMFORMEE_CAP_HT_EXPLICIT)
|
|
codebookinfo = 3;
|
|
|
|
coefficientsize = 3;
|
|
|
|
CSI_Param = (u2Byte)((coefficientsize << 10) | (codebookinfo << 8) | (grouping << 6) | (Nr_index << 3) | (Nc_index));
|
|
|
|
if (BFerIdx == 0)
|
|
ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8814A, CSI_Param);
|
|
else
|
|
ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8814A + 2, CSI_Param);
|
|
/*ndp_rx_standby_timer, 8814 need > 0x56, suggest from Dvaid*/
|
|
ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8814A + 3, 0x40);
|
|
|
|
}
|
|
|
|
if ((pBeamformingInfo->beamformee_su_cnt > 0) && (BFeeIdx < BEAMFORMEE_ENTRY_NUM)) {
|
|
BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[BFeeIdx];
|
|
|
|
halTxbf8814A_RfMode(pDM_Odm, pBeamformingInfo, BFeeIdx);
|
|
|
|
if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS))
|
|
STAid = BeamformeeEntry.MacId;
|
|
else
|
|
STAid = BeamformeeEntry.P_AID;
|
|
|
|
/*P_AID of Beamformee & enable NDPA transmission & enable NDPA interrupt*/
|
|
if (BFeeIdx == 0) {
|
|
ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8814A, STAid);
|
|
ODM_Write1Byte(pDM_Odm, REG_TXBF_CTRL_8814A + 3, ODM_Read1Byte(pDM_Odm, REG_TXBF_CTRL_8814A + 3) | BIT4 | BIT6 | BIT7);
|
|
} else
|
|
ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8814A + 2, STAid | BIT14 | BIT15 | BIT12);
|
|
|
|
/*CSI report parameters of Beamformee*/
|
|
if (BFeeIdx == 0) {
|
|
/*Get BIT24 & BIT25*/
|
|
u1Byte tmp = ODM_Read1Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8814A + 3) & 0x3;
|
|
|
|
ODM_Write1Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8814A + 3, tmp | 0x60);
|
|
ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8814A, STAid | BIT9);
|
|
} else
|
|
ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8814A + 2, STAid | 0xE200); /*Set BIT25*/
|
|
|
|
phydm_Beamforming_Notify(pDM_Odm);
|
|
}
|
|
|
|
}
|
|
|
|
|
|
VOID
|
|
HalTxbf8814A_Leave(
|
|
IN PVOID pDM_VOID,
|
|
IN u1Byte Idx
|
|
)
|
|
{
|
|
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
|
PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo;
|
|
RT_BEAMFORMER_ENTRY BeamformerEntry;
|
|
RT_BEAMFORMEE_ENTRY BeamformeeEntry;
|
|
|
|
if (Idx < BEAMFORMER_ENTRY_NUM) {
|
|
BeamformerEntry = pBeamformingInfo->BeamformerEntry[Idx];
|
|
BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[Idx];
|
|
} else
|
|
return;
|
|
|
|
/*Clear P_AID of Beamformee*/
|
|
/*Clear MAC address of Beamformer*/
|
|
/*Clear Associated Bfmee Sel*/
|
|
|
|
if (BeamformerEntry.BeamformEntryCap == BEAMFORMING_CAP_NONE) {
|
|
ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8814A, 0xD8);
|
|
if (Idx == 0) {
|
|
ODM_Write4Byte(pDM_Odm, REG_ASSOCIATED_BFMER0_INFO_8814A, 0);
|
|
ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMER0_INFO_8814A + 4, 0);
|
|
ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8814A, 0);
|
|
} else {
|
|
ODM_Write4Byte(pDM_Odm, REG_ASSOCIATED_BFMER1_INFO_8814A, 0);
|
|
ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMER1_INFO_8814A + 4, 0);
|
|
ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8814A + 2, 0);
|
|
}
|
|
}
|
|
|
|
if (BeamformeeEntry.BeamformEntryCap == BEAMFORMING_CAP_NONE) {
|
|
halTxbf8814A_RfMode(pDM_Odm, pBeamformingInfo, Idx);
|
|
if (Idx == 0) {
|
|
ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8814A, 0x0);
|
|
ODM_Write1Byte(pDM_Odm, REG_TXBF_CTRL_8814A + 3, ODM_Read1Byte(pDM_Odm, REG_TXBF_CTRL_8814A + 3) | BIT4 | BIT6 | BIT7);
|
|
ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8814A, 0);
|
|
} else {
|
|
ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8814A + 2, 0x0 | BIT14 | BIT15 | BIT12);
|
|
|
|
ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8814A + 2, ODM_Read2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8814A + 2) & 0x60);
|
|
}
|
|
}
|
|
}
|
|
|
|
VOID
|
|
HalTxbf8814A_Status(
|
|
IN PVOID pDM_VOID,
|
|
IN u1Byte Idx
|
|
)
|
|
{
|
|
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
|
u2Byte BeamCtrlVal, tmpVal;
|
|
u4Byte BeamCtrlReg;
|
|
PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo;
|
|
RT_BEAMFORMEE_ENTRY BeamformEntry;
|
|
|
|
if (Idx < BEAMFORMEE_ENTRY_NUM)
|
|
BeamformEntry = pBeamformingInfo->BeamformeeEntry[Idx];
|
|
else
|
|
return;
|
|
|
|
if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS))
|
|
BeamCtrlVal = BeamformEntry.MacId;
|
|
else
|
|
BeamCtrlVal = BeamformEntry.P_AID;
|
|
|
|
ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("@%s, BeamformEntry.BeamformEntryState = %d", __func__, BeamformEntry.BeamformEntryState));
|
|
|
|
if (Idx == 0)
|
|
BeamCtrlReg = REG_TXBF_CTRL_8814A;
|
|
else {
|
|
BeamCtrlReg = REG_TXBF_CTRL_8814A + 2;
|
|
BeamCtrlVal |= BIT12 | BIT14 | BIT15;
|
|
}
|
|
|
|
if (BeamformEntry.BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) {
|
|
if (BeamformEntry.SoundBW == CHANNEL_WIDTH_20)
|
|
BeamCtrlVal |= BIT9;
|
|
else if (BeamformEntry.SoundBW == CHANNEL_WIDTH_40)
|
|
BeamCtrlVal |= (BIT9 | BIT10);
|
|
else if (BeamformEntry.SoundBW == CHANNEL_WIDTH_80)
|
|
BeamCtrlVal |= (BIT9 | BIT10 | BIT11);
|
|
} else {
|
|
ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("@%s, Don't apply Vmatrix", __func__));
|
|
BeamCtrlVal &= ~(BIT9 | BIT10 | BIT11);
|
|
}
|
|
|
|
ODM_Write2Byte(pDM_Odm, BeamCtrlReg, BeamCtrlVal);
|
|
/*disable NDP packet use beamforming */
|
|
tmpVal = ODM_Read2Byte(pDM_Odm, REG_TXBF_CTRL_8814A);
|
|
ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8814A, tmpVal | BIT15);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
VOID
|
|
HalTxbf8814A_FwTxBF(
|
|
IN PVOID pDM_VOID,
|
|
IN u1Byte Idx
|
|
)
|
|
{
|
|
#if 0
|
|
PRT_BEAMFORMING_INFO pBeamInfo = GET_BEAMFORM_INFO(Adapter);
|
|
PRT_BEAMFORMEE_ENTRY pBeamEntry = pBeamInfo->BeamformeeEntry + Idx;
|
|
|
|
if (pBeamEntry->BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSING)
|
|
halTxbf8814A_DownloadNDPA(Adapter, Idx);
|
|
|
|
halTxbf8814A_FwTxBFCmd(Adapter);
|
|
#endif
|
|
}
|
|
|
|
#endif /* (RTL8814A_SUPPORT == 1)*/
|
|
|
|
#endif
|
|
|