mirror of
https://github.com/Mange/rtl8192eu-linux-driver
synced 2024-11-22 21:45:22 +00:00
866 lines
21 KiB
C
866 lines
21 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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#ifndef _RTW_XMIT_H_
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#define _RTW_XMIT_H_
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#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
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#ifdef CONFIG_TX_AGGREGATION
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#define MAX_XMITBUF_SZ (20480) // 20k
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//#define SDIO_TX_AGG_MAX 5
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#else
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#define MAX_XMITBUF_SZ (1664)
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#define SDIO_TX_AGG_MAX 1
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#endif
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#if defined CONFIG_SDIO_HCI
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#define NR_XMITBUFF (16)
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#endif
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#if defined(CONFIG_GSPI_HCI)
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#define NR_XMITBUFF (128)
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#endif
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#elif defined (CONFIG_USB_HCI)
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#ifdef CONFIG_USB_TX_AGGREGATION
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#if defined(CONFIG_PLATFORM_ARM_SUNxI) || defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) || defined(CONFIG_PLATFORM_ARM_SUN8I) || defined(CONFIG_PLATFORM_ARM_SUN50IW1P1)
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#define MAX_XMITBUF_SZ (12288) //12k 1536*8
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#elif defined (CONFIG_PLATFORM_MSTAR)
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#define MAX_XMITBUF_SZ 7680 // 7.5k
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#else
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#define MAX_XMITBUF_SZ (20480) // 20k
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#endif
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#else
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#define MAX_XMITBUF_SZ (2048)
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#endif
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#ifdef CONFIG_SINGLE_XMIT_BUF
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#define NR_XMITBUFF (1)
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#else
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#define NR_XMITBUFF (4)
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#endif //CONFIG_SINGLE_XMIT_BUF
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#elif defined (CONFIG_PCI_HCI)
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#define MAX_XMITBUF_SZ (1664)
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#define NR_XMITBUFF (128)
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#endif
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#ifdef PLATFORM_OS_CE
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#define XMITBUF_ALIGN_SZ 4
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#else
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#ifdef CONFIG_PCI_HCI
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#define XMITBUF_ALIGN_SZ 4
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#else
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#ifdef USB_XMITBUF_ALIGN_SZ
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#define XMITBUF_ALIGN_SZ (USB_XMITBUF_ALIGN_SZ)
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#else
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#define XMITBUF_ALIGN_SZ 512
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#endif
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#endif
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#endif
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// xmit extension buff defination
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#define MAX_XMIT_EXTBUF_SZ (1536)
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#ifdef CONFIG_SINGLE_XMIT_BUF
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#define NR_XMIT_EXTBUFF (1)
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#else
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#define NR_XMIT_EXTBUFF (32)
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#endif
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#ifdef CONFIG_RTL8812A
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#define MAX_CMDBUF_SZ (512*14)
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#else
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#define MAX_CMDBUF_SZ (5120) //(4096)
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#endif
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#define MAX_NUMBLKS (1)
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#define XMIT_VO_QUEUE (0)
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#define XMIT_VI_QUEUE (1)
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#define XMIT_BE_QUEUE (2)
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#define XMIT_BK_QUEUE (3)
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#define VO_QUEUE_INX 0
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#define VI_QUEUE_INX 1
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#define BE_QUEUE_INX 2
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#define BK_QUEUE_INX 3
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#define BCN_QUEUE_INX 4
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#define MGT_QUEUE_INX 5
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#define HIGH_QUEUE_INX 6
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#define TXCMD_QUEUE_INX 7
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#define HW_QUEUE_ENTRY 8
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#ifdef CONFIG_PCI_HCI
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//#define TXDESC_NUM 64
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#define TXDESC_NUM 128
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#define TXDESC_NUM_BE_QUEUE 128
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#endif
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#define WEP_IV(pattrib_iv, dot11txpn, keyidx)\
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do{\
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pattrib_iv[0] = dot11txpn._byte_.TSC0;\
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pattrib_iv[1] = dot11txpn._byte_.TSC1;\
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pattrib_iv[2] = dot11txpn._byte_.TSC2;\
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pattrib_iv[3] = ((keyidx & 0x3)<<6);\
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dot11txpn.val = (dot11txpn.val == 0xffffff) ? 0: (dot11txpn.val+1);\
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}while(0)
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#define TKIP_IV(pattrib_iv, dot11txpn, keyidx)\
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do{\
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pattrib_iv[0] = dot11txpn._byte_.TSC1;\
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pattrib_iv[1] = (dot11txpn._byte_.TSC1 | 0x20) & 0x7f;\
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pattrib_iv[2] = dot11txpn._byte_.TSC0;\
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pattrib_iv[3] = BIT(5) | ((keyidx & 0x3)<<6);\
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pattrib_iv[4] = dot11txpn._byte_.TSC2;\
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pattrib_iv[5] = dot11txpn._byte_.TSC3;\
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pattrib_iv[6] = dot11txpn._byte_.TSC4;\
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pattrib_iv[7] = dot11txpn._byte_.TSC5;\
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dot11txpn.val = dot11txpn.val == 0xffffffffffffULL ? 0: (dot11txpn.val+1);\
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}while(0)
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#define AES_IV(pattrib_iv, dot11txpn, keyidx)\
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do{\
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pattrib_iv[0] = dot11txpn._byte_.TSC0;\
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pattrib_iv[1] = dot11txpn._byte_.TSC1;\
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pattrib_iv[2] = 0;\
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pattrib_iv[3] = BIT(5) | ((keyidx & 0x3)<<6);\
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pattrib_iv[4] = dot11txpn._byte_.TSC2;\
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pattrib_iv[5] = dot11txpn._byte_.TSC3;\
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pattrib_iv[6] = dot11txpn._byte_.TSC4;\
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pattrib_iv[7] = dot11txpn._byte_.TSC5;\
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dot11txpn.val = dot11txpn.val == 0xffffffffffffULL ? 0: (dot11txpn.val+1);\
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}while(0)
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#define HWXMIT_ENTRY 4
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// For Buffer Descriptor ring architecture
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#ifdef BUF_DESC_ARCH
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#if defined(CONFIG_RTL8192E)
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#define TX_BUFFER_SEG_NUM 1 /* 0:2 seg, 1: 4 seg, 2: 8 seg. */
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#elif defined(CONFIG_RTL8814A)
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#define TX_BUFFER_SEG_NUM 1 /* 0:2 seg, 1: 4 seg, 2: 8 seg. */
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#endif
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#endif
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#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8703B) || defined(CONFIG_RTL8188F)
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#define TXDESC_SIZE 40
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#else
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#define TXDESC_SIZE 32 /* old IC (ex: 8188E) */
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#endif
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#ifdef CONFIG_TX_EARLY_MODE
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#define EARLY_MODE_INFO_SIZE 8
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#endif
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#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
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#define TXDESC_OFFSET TXDESC_SIZE
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#endif
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#ifdef CONFIG_USB_HCI
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#ifdef USB_PACKET_OFFSET_SZ
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#define PACKET_OFFSET_SZ (USB_PACKET_OFFSET_SZ)
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#else
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#define PACKET_OFFSET_SZ (8)
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#endif
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#define TXDESC_OFFSET (TXDESC_SIZE + PACKET_OFFSET_SZ)
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#endif
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#ifdef CONFIG_PCI_HCI
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#if defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8814A)
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/* this section is defined for buffer descriptor ring architecture */
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#define TX_WIFI_INFO_SIZE (TXDESC_SIZE) /* it may add 802.11 hdr or others... */
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/* tx desc and payload are in the same buf */
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#define TXDESC_OFFSET (TX_WIFI_INFO_SIZE)
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#else
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/* tx desc and payload are NOT in the same buf */
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#define TXDESC_OFFSET (0)
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/* 8188ee/8723be/8812ae/8821ae has extra PCI DMA info in tx desc */
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#define TX_DESC_NEXT_DESC_OFFSET (TXDESC_SIZE + 8)
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#endif
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#endif /* CONFIG_PCI_HCI */
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enum TXDESC_SC{
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SC_DONT_CARE = 0x00,
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SC_UPPER= 0x01,
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SC_LOWER=0x02,
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SC_DUPLICATE=0x03
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};
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#ifdef CONFIG_PCI_HCI
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#define TXDESC_64_BYTES
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#elif defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8188F)
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#define TXDESC_40_BYTES
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#endif
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#if (defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8814A)) && defined(CONFIG_PCI_HCI) /* 8192ee or 8814ae */
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//8192EE_TODO
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struct tx_desc
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{
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unsigned int txdw0;
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unsigned int txdw1;
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unsigned int txdw2;
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unsigned int txdw3;
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unsigned int txdw4;
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unsigned int txdw5;
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unsigned int txdw6;
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unsigned int txdw7;
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};
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#else
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struct tx_desc
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{
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unsigned int txdw0;
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unsigned int txdw1;
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unsigned int txdw2;
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unsigned int txdw3;
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unsigned int txdw4;
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unsigned int txdw5;
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unsigned int txdw6;
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unsigned int txdw7;
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#if defined(TXDESC_40_BYTES) || defined(TXDESC_64_BYTES)
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unsigned int txdw8;
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unsigned int txdw9;
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#endif // TXDESC_40_BYTES
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#ifdef TXDESC_64_BYTES
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unsigned int txdw10;
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unsigned int txdw11;
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// 2008/05/15 MH Because PCIE HW memory R/W 4K limit. And now, our descriptor
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// size is 40 bytes. If you use more than 102 descriptor( 103*40>4096), HW will execute
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// memoryR/W CRC error. And then all DMA fetch will fail. We must decrease descriptor
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// number or enlarge descriptor size as 64 bytes.
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unsigned int txdw12;
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unsigned int txdw13;
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unsigned int txdw14;
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unsigned int txdw15;
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#endif
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};
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#endif
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union txdesc {
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struct tx_desc txdesc;
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unsigned int value[TXDESC_SIZE>>2];
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};
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#ifdef CONFIG_PCI_HCI
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#define PCI_MAX_TX_QUEUE_COUNT 8
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struct rtw_tx_ring {
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unsigned char qid;
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struct tx_desc *desc;
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dma_addr_t dma;
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unsigned int idx;
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unsigned int entries;
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_queue queue;
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u32 qlen;
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};
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#endif
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struct hw_xmit {
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//_lock xmit_lock;
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//_list pending;
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_queue *sta_queue;
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//struct hw_txqueue *phwtxqueue;
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//sint txcmdcnt;
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int accnt;
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};
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#if 0
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struct pkt_attrib
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{
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u8 type;
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u8 subtype;
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u8 bswenc;
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u8 dhcp_pkt;
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u16 ether_type;
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int pktlen; //the original 802.3 pkt raw_data len (not include ether_hdr data)
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int pkt_hdrlen; //the original 802.3 pkt header len
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int hdrlen; //the WLAN Header Len
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int nr_frags;
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int last_txcmdsz;
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int encrypt; //when 0 indicate no encrypt. when non-zero, indicate the encrypt algorith
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u8 iv[8];
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int iv_len;
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u8 icv[8];
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int icv_len;
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int priority;
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int ack_policy;
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int mac_id;
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int vcs_mode; //virtual carrier sense method
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u8 dst[ETH_ALEN];
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u8 src[ETH_ALEN];
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u8 ta[ETH_ALEN];
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u8 ra[ETH_ALEN];
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u8 key_idx;
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u8 qos_en;
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u8 ht_en;
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u8 raid;//rate adpative id
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u8 bwmode;
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u8 ch_offset;//PRIME_CHNL_OFFSET
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u8 sgi;//short GI
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u8 ampdu_en;//tx ampdu enable
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u8 mdata;//more data bit
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u8 eosp;
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u8 triggered;//for ap mode handling Power Saving sta
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u32 qsel;
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u16 seqnum;
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struct sta_info * psta;
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#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX
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u8 hw_tcp_csum;
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#endif
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};
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#else
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//reduce size
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struct pkt_attrib
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{
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u8 type;
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u8 subtype;
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u8 bswenc;
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u8 dhcp_pkt;
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u16 ether_type;
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u16 seqnum;
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u8 hw_ssn_sel; //for HW_SEQ0,1,2,3
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u16 pkt_hdrlen; //the original 802.3 pkt header len
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u16 hdrlen; //the WLAN Header Len
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u32 pktlen; //the original 802.3 pkt raw_data len (not include ether_hdr data)
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u32 last_txcmdsz;
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u8 nr_frags;
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u8 encrypt; //when 0 indicate no encrypt. when non-zero, indicate the encrypt algorith
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u8 iv_len;
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u8 icv_len;
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u8 iv[18];
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u8 icv[16];
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u8 priority;
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u8 ack_policy;
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u8 mac_id;
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u8 vcs_mode; //virtual carrier sense method
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u8 dst[ETH_ALEN];
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u8 src[ETH_ALEN];
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u8 ta[ETH_ALEN];
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u8 ra[ETH_ALEN];
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u8 key_idx;
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u8 qos_en;
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u8 ht_en;
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u8 raid;//rate adpative id
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u8 bwmode;
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u8 ch_offset;//PRIME_CHNL_OFFSET
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u8 sgi;//short GI
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u8 ampdu_en;//tx ampdu enable
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u8 ampdu_spacing; //ampdu_min_spacing for peer sta's rx
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u8 mdata;//more data bit
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u8 pctrl;//per packet txdesc control enable
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u8 triggered;//for ap mode handling Power Saving sta
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u8 qsel;
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u8 order;//order bit
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u8 eosp;
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u8 rate;
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u8 intel_proxim;
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u8 retry_ctrl;
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u8 mbssid;
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u8 ldpc;
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u8 stbc;
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struct sta_info * psta;
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#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX
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u8 hw_tcp_csum;
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#endif
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u8 rtsen;
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u8 cts2self;
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union Keytype dot11tkiptxmickey;
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//union Keytype dot11tkiprxmickey;
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union Keytype dot118021x_UncstKey;
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#ifdef CONFIG_TDLS
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u8 direct_link;
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struct sta_info *ptdls_sta;
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#endif //CONFIG_TDLS
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u8 key_type;
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u8 icmp_pkt;
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#ifdef CONFIG_BEAMFORMING
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u16 txbf_p_aid;/*beamforming Partial_AID*/
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u16 txbf_g_id;/*beamforming Group ID*/
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#endif
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};
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#endif
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#define WLANHDR_OFFSET 64
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#define NULL_FRAMETAG (0x0)
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#define DATA_FRAMETAG 0x01
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#define L2_FRAMETAG 0x02
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#define MGNT_FRAMETAG 0x03
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#define AMSDU_FRAMETAG 0x04
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#define EII_FRAMETAG 0x05
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#define IEEE8023_FRAMETAG 0x06
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#define MP_FRAMETAG 0x07
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#define TXAGG_FRAMETAG 0x08
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enum {
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XMITBUF_DATA = 0,
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XMITBUF_MGNT = 1,
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XMITBUF_CMD = 2,
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};
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bool rtw_xmit_ac_blocked(_adapter *adapter);
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struct submit_ctx{
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u32 submit_time; /* */
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u32 timeout_ms; /* <0: not synchronous, 0: wait forever, >0: up to ms waiting */
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int status; /* status for operation */
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#ifdef PLATFORM_LINUX
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struct completion done;
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#endif
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};
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enum {
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RTW_SCTX_SUBMITTED = -1,
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RTW_SCTX_DONE_SUCCESS = 0,
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RTW_SCTX_DONE_UNKNOWN,
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RTW_SCTX_DONE_TIMEOUT,
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RTW_SCTX_DONE_BUF_ALLOC,
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RTW_SCTX_DONE_BUF_FREE,
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RTW_SCTX_DONE_WRITE_PORT_ERR,
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RTW_SCTX_DONE_TX_DESC_NA,
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RTW_SCTX_DONE_TX_DENY,
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RTW_SCTX_DONE_CCX_PKT_FAIL,
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RTW_SCTX_DONE_DRV_STOP,
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RTW_SCTX_DONE_DEV_REMOVE,
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RTW_SCTX_DONE_CMD_ERROR,
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};
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void rtw_sctx_init(struct submit_ctx *sctx, int timeout_ms);
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int rtw_sctx_wait(struct submit_ctx *sctx, const char *msg);
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void rtw_sctx_done_err(struct submit_ctx **sctx, int status);
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void rtw_sctx_done(struct submit_ctx **sctx);
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struct xmit_buf
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{
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_list list;
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_adapter *padapter;
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u8 *pallocated_buf;
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u8 *pbuf;
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void *priv_data;
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u16 buf_tag; // 0: Normal xmitbuf, 1: extension xmitbuf, 2:cmd xmitbuf
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u16 flags;
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u32 alloc_sz;
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u32 len;
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struct submit_ctx *sctx;
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#ifdef CONFIG_USB_HCI
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//u32 sz[8];
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u32 ff_hwaddr;
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#if defined(PLATFORM_OS_XP)||defined(PLATFORM_LINUX) || defined(PLATFORM_FREEBSD)
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PURB pxmit_urb[8];
|
|
dma_addr_t dma_transfer_addr; /* (in) dma addr for transfer_buffer */
|
|
#endif
|
|
|
|
#ifdef PLATFORM_OS_XP
|
|
PIRP pxmit_irp[8];
|
|
#endif
|
|
|
|
#ifdef PLATFORM_OS_CE
|
|
USB_TRANSFER usb_transfer_write_port;
|
|
#endif
|
|
|
|
u8 bpending[8];
|
|
|
|
sint last[8];
|
|
|
|
#endif
|
|
|
|
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
|
|
u8 *phead;
|
|
u8 *pdata;
|
|
u8 *ptail;
|
|
u8 *pend;
|
|
u32 ff_hwaddr;
|
|
u8 pg_num;
|
|
u8 agg_num;
|
|
#ifdef PLATFORM_OS_XP
|
|
PMDL pxmitbuf_mdl;
|
|
PIRP pxmitbuf_irp;
|
|
PSDBUS_REQUEST_PACKET pxmitbuf_sdrp;
|
|
#endif
|
|
#endif
|
|
|
|
#ifdef CONFIG_PCI_HCI
|
|
struct tx_desc *desc;
|
|
#endif
|
|
|
|
#if defined(DBG_XMIT_BUF )|| defined(DBG_XMIT_BUF_EXT)
|
|
u8 no;
|
|
#endif
|
|
|
|
};
|
|
|
|
|
|
struct xmit_frame
|
|
{
|
|
_list list;
|
|
|
|
struct pkt_attrib attrib;
|
|
|
|
_pkt *pkt;
|
|
|
|
int frame_tag;
|
|
|
|
_adapter *padapter;
|
|
|
|
u8 *buf_addr;
|
|
|
|
struct xmit_buf *pxmitbuf;
|
|
|
|
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
|
|
u8 pg_num;
|
|
u8 agg_num;
|
|
#endif
|
|
|
|
#ifdef CONFIG_USB_HCI
|
|
#ifdef CONFIG_USB_TX_AGGREGATION
|
|
u8 agg_num;
|
|
#endif
|
|
s8 pkt_offset;
|
|
#endif
|
|
|
|
#ifdef CONFIG_XMIT_ACK
|
|
u8 ack_report;
|
|
#endif
|
|
|
|
u8 *alloc_addr; /* the actual address this xmitframe allocated */
|
|
u8 ext_tag; /* 0:data, 1:mgmt */
|
|
|
|
};
|
|
|
|
struct tx_servq {
|
|
_list tx_pending;
|
|
_queue sta_pending;
|
|
int qcnt;
|
|
};
|
|
|
|
|
|
struct sta_xmit_priv
|
|
{
|
|
_lock lock;
|
|
sint option;
|
|
sint apsd_setting; //When bit mask is on, the associated edca queue supports APSD.
|
|
|
|
|
|
//struct tx_servq blk_q[MAX_NUMBLKS];
|
|
struct tx_servq be_q; //priority == 0,3
|
|
struct tx_servq bk_q; //priority == 1,2
|
|
struct tx_servq vi_q; //priority == 4,5
|
|
struct tx_servq vo_q; //priority == 6,7
|
|
_list legacy_dz;
|
|
_list apsd;
|
|
|
|
u16 txseq_tid[16];
|
|
|
|
//uint sta_tx_bytes;
|
|
//u64 sta_tx_pkts;
|
|
//uint sta_tx_fail;
|
|
|
|
|
|
};
|
|
|
|
|
|
struct hw_txqueue {
|
|
volatile sint head;
|
|
volatile sint tail;
|
|
volatile sint free_sz; //in units of 64 bytes
|
|
volatile sint free_cmdsz;
|
|
volatile sint txsz[8];
|
|
uint ff_hwaddr;
|
|
uint cmd_hwaddr;
|
|
sint ac_tag;
|
|
};
|
|
|
|
struct agg_pkt_info{
|
|
u16 offset;
|
|
u16 pkt_len;
|
|
};
|
|
|
|
enum cmdbuf_type {
|
|
CMDBUF_BEACON = 0x00,
|
|
CMDBUF_RSVD,
|
|
CMDBUF_MAX
|
|
};
|
|
|
|
u8 rtw_get_hwseq_no(_adapter *padapter);
|
|
|
|
struct xmit_priv {
|
|
|
|
_lock lock;
|
|
|
|
_sema xmit_sema;
|
|
_sema terminate_xmitthread_sema;
|
|
|
|
//_queue blk_strms[MAX_NUMBLKS];
|
|
_queue be_pending;
|
|
_queue bk_pending;
|
|
_queue vi_pending;
|
|
_queue vo_pending;
|
|
_queue bm_pending;
|
|
|
|
//_queue legacy_dz_queue;
|
|
//_queue apsd_queue;
|
|
|
|
u8 *pallocated_frame_buf;
|
|
u8 *pxmit_frame_buf;
|
|
uint free_xmitframe_cnt;
|
|
_queue free_xmit_queue;
|
|
|
|
//uint mapping_addr;
|
|
//uint pkt_sz;
|
|
|
|
u8 *xframe_ext_alloc_addr;
|
|
u8 *xframe_ext;
|
|
uint free_xframe_ext_cnt;
|
|
_queue free_xframe_ext_queue;
|
|
|
|
//struct hw_txqueue be_txqueue;
|
|
//struct hw_txqueue bk_txqueue;
|
|
//struct hw_txqueue vi_txqueue;
|
|
//struct hw_txqueue vo_txqueue;
|
|
//struct hw_txqueue bmc_txqueue;
|
|
|
|
uint frag_len;
|
|
|
|
_adapter *adapter;
|
|
|
|
u8 vcs_setting;
|
|
u8 vcs;
|
|
u8 vcs_type;
|
|
//u16 rts_thresh;
|
|
|
|
u64 tx_bytes;
|
|
u64 tx_pkts;
|
|
u64 tx_drop;
|
|
u64 last_tx_pkts;
|
|
|
|
struct hw_xmit *hwxmits;
|
|
u8 hwxmit_entry;
|
|
|
|
u8 wmm_para_seq[4];//sequence for wmm ac parameter strength from large to small. it's value is 0->vo, 1->vi, 2->be, 3->bk.
|
|
|
|
#ifdef CONFIG_USB_HCI
|
|
_sema tx_retevt;//all tx return event;
|
|
u8 txirp_cnt;//
|
|
|
|
#ifdef PLATFORM_OS_CE
|
|
USB_TRANSFER usb_transfer_write_port;
|
|
// USB_TRANSFER usb_transfer_write_mem;
|
|
#endif
|
|
#ifdef PLATFORM_LINUX
|
|
struct tasklet_struct xmit_tasklet;
|
|
#endif
|
|
#ifdef PLATFORM_FREEBSD
|
|
struct task xmit_tasklet;
|
|
#endif
|
|
//per AC pending irp
|
|
int beq_cnt;
|
|
int bkq_cnt;
|
|
int viq_cnt;
|
|
int voq_cnt;
|
|
|
|
#endif
|
|
|
|
#ifdef CONFIG_PCI_HCI
|
|
// Tx
|
|
struct rtw_tx_ring tx_ring[PCI_MAX_TX_QUEUE_COUNT];
|
|
int txringcount[PCI_MAX_TX_QUEUE_COUNT];
|
|
u8 beaconDMAing; //flag of indicating beacon is transmiting to HW by DMA
|
|
#ifdef PLATFORM_LINUX
|
|
struct tasklet_struct xmit_tasklet;
|
|
#endif
|
|
#endif
|
|
|
|
#if defined (CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
|
|
#ifdef CONFIG_SDIO_TX_TASKLET
|
|
#ifdef PLATFORM_LINUX
|
|
struct tasklet_struct xmit_tasklet;
|
|
#endif /* PLATFORM_LINUX */
|
|
#else
|
|
_thread_hdl_ SdioXmitThread;
|
|
_sema SdioXmitSema;
|
|
_sema SdioXmitTerminateSema;
|
|
#endif /* CONFIG_SDIO_TX_TASKLET */
|
|
#endif /* CONFIG_SDIO_HCI */
|
|
|
|
_queue free_xmitbuf_queue;
|
|
_queue pending_xmitbuf_queue;
|
|
u8 *pallocated_xmitbuf;
|
|
u8 *pxmitbuf;
|
|
uint free_xmitbuf_cnt;
|
|
|
|
_queue free_xmit_extbuf_queue;
|
|
u8 *pallocated_xmit_extbuf;
|
|
u8 *pxmit_extbuf;
|
|
uint free_xmit_extbuf_cnt;
|
|
|
|
struct xmit_buf pcmd_xmitbuf[CMDBUF_MAX];
|
|
u8 hw_ssn_seq_no;//mapping to REG_HW_SEQ 0,1,2,3
|
|
u16 nqos_ssn;
|
|
#ifdef CONFIG_TX_EARLY_MODE
|
|
|
|
#ifdef CONFIG_SDIO_HCI
|
|
#define MAX_AGG_PKT_NUM 20
|
|
#else
|
|
#define MAX_AGG_PKT_NUM 256 //Max tx ampdu coounts
|
|
#endif
|
|
|
|
struct agg_pkt_info agg_pkt[MAX_AGG_PKT_NUM];
|
|
#endif
|
|
|
|
#ifdef CONFIG_XMIT_ACK
|
|
int ack_tx;
|
|
_mutex ack_tx_mutex;
|
|
struct submit_ctx ack_tx_ops;
|
|
u8 seq_no;
|
|
#endif
|
|
_lock lock_sctx;
|
|
};
|
|
|
|
extern struct xmit_frame *__rtw_alloc_cmdxmitframe(struct xmit_priv *pxmitpriv,
|
|
enum cmdbuf_type buf_type);
|
|
#define rtw_alloc_cmdxmitframe(p) __rtw_alloc_cmdxmitframe(p, CMDBUF_RSVD)
|
|
#if defined(CONFIG_RTL8192E) && defined(CONFIG_PCI_HCI)
|
|
extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8192ee(struct xmit_priv *pxmitpriv,
|
|
enum cmdbuf_type buf_type);
|
|
#define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8192ee(p, CMDBUF_BEACON)
|
|
#else
|
|
#define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe(p, CMDBUF_BEACON)
|
|
#endif
|
|
|
|
extern struct xmit_buf *rtw_alloc_xmitbuf_ext(struct xmit_priv *pxmitpriv);
|
|
extern s32 rtw_free_xmitbuf_ext(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf);
|
|
|
|
extern struct xmit_buf *rtw_alloc_xmitbuf(struct xmit_priv *pxmitpriv);
|
|
extern s32 rtw_free_xmitbuf(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf);
|
|
|
|
void rtw_count_tx_stats(_adapter *padapter, struct xmit_frame *pxmitframe, int sz);
|
|
extern void rtw_update_protection(_adapter *padapter, u8 *ie, uint ie_len);
|
|
static s32 update_attrib_sec_info(_adapter *padapter, struct pkt_attrib *pattrib, struct sta_info *psta);
|
|
static void update_attrib_phy_info(_adapter *padapter, struct pkt_attrib *pattrib, struct sta_info *psta);
|
|
extern s32 rtw_make_wlanhdr(_adapter *padapter, u8 *hdr, struct pkt_attrib *pattrib);
|
|
extern s32 rtw_put_snap(u8 *data, u16 h_proto);
|
|
|
|
extern struct xmit_frame *rtw_alloc_xmitframe(struct xmit_priv *pxmitpriv);
|
|
struct xmit_frame *rtw_alloc_xmitframe_ext(struct xmit_priv *pxmitpriv);
|
|
struct xmit_frame *rtw_alloc_xmitframe_once(struct xmit_priv *pxmitpriv);
|
|
extern s32 rtw_free_xmitframe(struct xmit_priv *pxmitpriv, struct xmit_frame *pxmitframe);
|
|
extern void rtw_free_xmitframe_queue(struct xmit_priv *pxmitpriv, _queue *pframequeue);
|
|
struct tx_servq *rtw_get_sta_pending(_adapter *padapter, struct sta_info *psta, sint up, u8 *ac);
|
|
extern s32 rtw_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe);
|
|
extern struct xmit_frame* rtw_dequeue_xframe(struct xmit_priv *pxmitpriv, struct hw_xmit *phwxmit_i, sint entry);
|
|
|
|
extern s32 rtw_xmit_classifier(_adapter *padapter, struct xmit_frame *pxmitframe);
|
|
extern u32 rtw_calculate_wlan_pkt_size_by_attribue(struct pkt_attrib *pattrib);
|
|
#define rtw_wlan_pkt_size(f) rtw_calculate_wlan_pkt_size_by_attribue(&f->attrib)
|
|
extern s32 rtw_xmitframe_coalesce(_adapter *padapter, _pkt *pkt, struct xmit_frame *pxmitframe);
|
|
#ifdef CONFIG_IEEE80211W
|
|
extern s32 rtw_mgmt_xmitframe_coalesce(_adapter *padapter, _pkt *pkt, struct xmit_frame *pxmitframe);
|
|
#endif //CONFIG_IEEE80211W
|
|
#ifdef CONFIG_TDLS
|
|
extern struct tdls_txmgmt *ptxmgmt;
|
|
s32 rtw_xmit_tdls_coalesce(_adapter *padapter, struct xmit_frame *pxmitframe, struct tdls_txmgmt *ptxmgmt);
|
|
s32 update_tdls_attrib(_adapter *padapter, struct pkt_attrib *pattrib);
|
|
#endif
|
|
s32 _rtw_init_hw_txqueue(struct hw_txqueue* phw_txqueue, u8 ac_tag);
|
|
void _rtw_init_sta_xmit_priv(struct sta_xmit_priv *psta_xmitpriv);
|
|
|
|
|
|
s32 rtw_txframes_pending(_adapter *padapter);
|
|
s32 rtw_txframes_sta_ac_pending(_adapter *padapter, struct pkt_attrib *pattrib);
|
|
void rtw_init_hwxmits(struct hw_xmit *phwxmit, sint entry);
|
|
|
|
|
|
s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, _adapter *padapter);
|
|
void _rtw_free_xmit_priv (struct xmit_priv *pxmitpriv);
|
|
|
|
|
|
void rtw_alloc_hwxmits(_adapter *padapter);
|
|
void rtw_free_hwxmits(_adapter *padapter);
|
|
|
|
s32 rtw_monitor_xmit_entry(struct sk_buff *skb, struct net_device *ndev);
|
|
|
|
s32 rtw_xmit(_adapter *padapter, _pkt **pkt);
|
|
bool xmitframe_hiq_filter(struct xmit_frame *xmitframe);
|
|
#if defined(CONFIG_AP_MODE) || defined(CONFIG_TDLS)
|
|
sint xmitframe_enqueue_for_sleeping_sta(_adapter *padapter, struct xmit_frame *pxmitframe);
|
|
void stop_sta_xmit(_adapter *padapter, struct sta_info *psta);
|
|
void wakeup_sta_to_xmit(_adapter *padapter, struct sta_info *psta);
|
|
void xmit_delivery_enabled_frames(_adapter *padapter, struct sta_info *psta);
|
|
#endif
|
|
|
|
u8 query_ra_short_GI(struct sta_info *psta);
|
|
|
|
u8 qos_acm(u8 acm_mask, u8 priority);
|
|
|
|
#ifdef CONFIG_XMIT_THREAD_MODE
|
|
void enqueue_pending_xmitbuf(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf);
|
|
void enqueue_pending_xmitbuf_to_head(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf);
|
|
struct xmit_buf* dequeue_pending_xmitbuf(struct xmit_priv *pxmitpriv);
|
|
struct xmit_buf* dequeue_pending_xmitbuf_under_survey(struct xmit_priv *pxmitpriv);
|
|
sint check_pending_xmitbuf(struct xmit_priv *pxmitpriv);
|
|
thread_return rtw_xmit_thread(thread_context context);
|
|
#endif
|
|
|
|
static void do_queue_select(_adapter * padapter, struct pkt_attrib * pattrib);
|
|
u32 rtw_get_ff_hwaddr(struct xmit_frame *pxmitframe);
|
|
|
|
#ifdef CONFIG_XMIT_ACK
|
|
int rtw_ack_tx_wait(struct xmit_priv *pxmitpriv, u32 timeout_ms);
|
|
void rtw_ack_tx_done(struct xmit_priv *pxmitpriv, int status);
|
|
#endif //CONFIG_XMIT_ACK
|
|
|
|
|
|
//include after declaring struct xmit_buf, in order to avoid warning
|
|
#include <xmit_osdep.h>
|
|
|
|
#endif //_RTL871X_XMIT_H_
|
|
|