mirror of
https://github.com/Mange/rtl8192eu-linux-driver
synced 2024-12-30 16:01:45 +00:00
1387cf623d
Version information: 20140812_rtl8192EU_linux_v4.3.1.1_11320 2014-08-12 version 4.3.1.1_11320 Source: ftp://files.dlink.com.au/products/DWA-131/REV_E/Drivers/DWA-131_Linux_driver_v4.3.1.1.zip This version does not currently work on newer kernels, but it does contain USB ID 2001:3319, which a lot of other repos in GitHub does not.
176 lines
4.6 KiB
C
176 lines
4.6 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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#ifndef __RTW_RF_H_
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#define __RTW_RF_H_
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#define OFDM_PHY 1
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#define MIXED_PHY 2
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#define CCK_PHY 3
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#define NumRates (13)
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// slot time for 11g
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#define SHORT_SLOT_TIME 9
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#define NON_SHORT_SLOT_TIME 20
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#define RTL8711_RF_MAX_SENS 6
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#define RTL8711_RF_DEF_SENS 4
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//
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// We now define the following channels as the max channels in each channel plan.
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// 2G, total 14 chnls
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// {1,2,3,4,5,6,7,8,9,10,11,12,13,14}
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// 5G, total 24 chnls
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// {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140,149,153,157,161,165}
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#define MAX_CHANNEL_NUM_2G 14
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#define MAX_CHANNEL_NUM_5G 24
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#define MAX_CHANNEL_NUM 38//14+24
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//#define NUM_REGULATORYS 21
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#define NUM_REGULATORYS 1
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//Country codes
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#define USA 0x555320
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#define EUROPE 0x1 //temp, should be provided later
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#define JAPAN 0x2 //temp, should be provided later
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struct regulatory_class {
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u32 starting_freq; //MHz,
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u8 channel_set[MAX_CHANNEL_NUM];
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u8 channel_cck_power[MAX_CHANNEL_NUM];//dbm
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u8 channel_ofdm_power[MAX_CHANNEL_NUM];//dbm
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u8 txpower_limit; //dbm
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u8 channel_spacing; //MHz
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u8 modem;
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};
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typedef enum _CAPABILITY{
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cESS = 0x0001,
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cIBSS = 0x0002,
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cPollable = 0x0004,
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cPollReq = 0x0008,
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cPrivacy = 0x0010,
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cShortPreamble = 0x0020,
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cPBCC = 0x0040,
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cChannelAgility = 0x0080,
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cSpectrumMgnt = 0x0100,
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cQos = 0x0200, // For HCCA, use with CF-Pollable and CF-PollReq
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cShortSlotTime = 0x0400,
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cAPSD = 0x0800,
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cRM = 0x1000, // RRM (Radio Request Measurement)
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cDSSS_OFDM = 0x2000,
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cDelayedBA = 0x4000,
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cImmediateBA = 0x8000,
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}CAPABILITY, *PCAPABILITY;
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enum _REG_PREAMBLE_MODE{
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PREAMBLE_LONG = 1,
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PREAMBLE_AUTO = 2,
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PREAMBLE_SHORT = 3,
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};
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enum _RTL8712_RF_MIMO_CONFIG_{
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RTL8712_RFCONFIG_1T=0x10,
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RTL8712_RFCONFIG_2T=0x20,
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RTL8712_RFCONFIG_1R=0x01,
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RTL8712_RFCONFIG_2R=0x02,
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RTL8712_RFCONFIG_1T1R=0x11,
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RTL8712_RFCONFIG_1T2R=0x12,
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RTL8712_RFCONFIG_TURBO=0x92,
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RTL8712_RFCONFIG_2T2R=0x22
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};
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typedef enum _RF90_RADIO_PATH{
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RF90_PATH_A = 0, //Radio Path A
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RF90_PATH_B = 1, //Radio Path B
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RF90_PATH_C = 2, //Radio Path C
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RF90_PATH_D = 3 //Radio Path D
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//RF90_PATH_MAX //Max RF number 90 support
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}RF90_RADIO_PATH_E, *PRF90_RADIO_PATH_E;
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// Bandwidth Offset
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#define HAL_PRIME_CHNL_OFFSET_DONT_CARE 0
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#define HAL_PRIME_CHNL_OFFSET_LOWER 1
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#define HAL_PRIME_CHNL_OFFSET_UPPER 2
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// Represent Channel Width in HT Capabilities
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//
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typedef enum _CHANNEL_WIDTH{
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CHANNEL_WIDTH_20 = 0,
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CHANNEL_WIDTH_40 = 1,
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CHANNEL_WIDTH_80 = 2,
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CHANNEL_WIDTH_160 = 3,
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CHANNEL_WIDTH_80_80 = 4,
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CHANNEL_WIDTH_MAX = 5,
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}CHANNEL_WIDTH, *PCHANNEL_WIDTH;
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//
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// Represent Extention Channel Offset in HT Capabilities
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// This is available only in 40Mhz mode.
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//
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typedef enum _EXTCHNL_OFFSET{
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EXTCHNL_OFFSET_NO_EXT = 0,
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EXTCHNL_OFFSET_UPPER = 1,
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EXTCHNL_OFFSET_NO_DEF = 2,
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EXTCHNL_OFFSET_LOWER = 3,
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}EXTCHNL_OFFSET, *PEXTCHNL_OFFSET;
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typedef enum _VHT_DATA_SC{
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VHT_DATA_SC_DONOT_CARE = 0,
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VHT_DATA_SC_20_UPPER_OF_80MHZ = 1,
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VHT_DATA_SC_20_LOWER_OF_80MHZ = 2,
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VHT_DATA_SC_20_UPPERST_OF_80MHZ = 3,
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VHT_DATA_SC_20_LOWEST_OF_80MHZ = 4,
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VHT_DATA_SC_20_RECV1 = 5,
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VHT_DATA_SC_20_RECV2 = 6,
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VHT_DATA_SC_20_RECV3 = 7,
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VHT_DATA_SC_20_RECV4 = 8,
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VHT_DATA_SC_40_UPPER_OF_80MHZ = 9,
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VHT_DATA_SC_40_LOWER_OF_80MHZ = 10,
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}VHT_DATA_SC, *PVHT_DATA_SC_E;
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typedef enum _PROTECTION_MODE{
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PROTECTION_MODE_AUTO = 0,
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PROTECTION_MODE_FORCE_ENABLE = 1,
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PROTECTION_MODE_FORCE_DISABLE = 2,
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}PROTECTION_MODE, *PPROTECTION_MODE;
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/* 2007/11/15 MH Define different RF type. */
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typedef enum _RT_RF_TYPE_DEFINITION
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{
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RF_1T2R = 0,
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RF_2T4R = 1,
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RF_2T2R = 2,
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RF_1T1R = 3,
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RF_2T2R_GREEN = 4,
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RF_MAX_TYPE = 5,
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}RT_RF_TYPE_DEF_E;
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u32 rtw_ch2freq(u32 ch);
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u32 rtw_freq2ch(u32 freq);
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#endif //_RTL8711_RF_H_
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