mirror of
https://github.com/Mange/rtl8192eu-linux-driver
synced 2024-12-30 16:01:45 +00:00
1387cf623d
Version information: 20140812_rtl8192EU_linux_v4.3.1.1_11320 2014-08-12 version 4.3.1.1_11320 Source: ftp://files.dlink.com.au/products/DWA-131/REV_E/Drivers/DWA-131_Linux_driver_v4.3.1.1.zip This version does not currently work on newer kernels, but it does contain USB ID 2001:3319, which a lot of other repos in GitHub does not.
216 lines
6.6 KiB
C
216 lines
6.6 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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#ifndef __RTL8723A_CMD_H__
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#define __RTL8723A_CMD_H__
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#define H2C_BT_FW_PATCH_LEN 3
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#define H2C_BT_PWR_FORCE_LEN 3
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enum cmd_msg_element_id
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{
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NONE_CMDMSG_EID,
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AP_OFFLOAD_EID = 0,
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SET_PWRMODE_EID = 1,
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JOINBSS_RPT_EID = 2,
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RSVD_PAGE_EID = 3,
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RSSI_4_EID = 4,
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RSSI_SETTING_EID = 5,
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MACID_CONFIG_EID = 6,
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MACID_PS_MODE_EID = 7,
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P2P_PS_OFFLOAD_EID = 8,
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SELECTIVE_SUSPEND_ROF_CMD = 9,
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BT_QUEUE_PKT_EID = 17,
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BT_ANT_TDMA_EID = 20,
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BT_2ANT_HID_EID = 21,
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P2P_PS_CTW_CMD_EID = 32,
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FORCE_BT_TX_PWR_EID = 33,
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SET_TDMA_WLAN_ACT_TIME_EID = 34,
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SET_BT_TX_RETRY_INDEX_EID = 35,
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HID_PROFILE_ENABLE_EID = 36,
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BT_IGNORE_WLAN_ACT_EID = 37,
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BT_PTA_MANAGER_UPDATE_ENABLE_EID = 38,
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DAC_SWING_VALUE_EID = 41,
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TRADITIONAL_TDMA_EN_EID = 51,
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H2C_BT_FW_PATCH = 54,
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B_TYPE_TDMA_EID = 58,
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SCAN_EN_EID = 59,
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LOWPWR_LPS_EID = 71,
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H2C_RESET_TSF = 75,
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MAX_CMDMSG_EID
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};
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struct cmd_msg_parm {
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u8 eid; //element id
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u8 sz; // sz
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u8 buf[6];
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};
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typedef struct _SETPWRMODE_PARM
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{
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u8 Mode;
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u8 SmartPS;
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u8 AwakeInterval; // unit: beacon interval
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u8 bAllQueueUAPSD;
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#if 0
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u8 LowRxBCN:1;
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u8 AutoAntSwitch:1;
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u8 PSAllowBTHighPriority:1;
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u8 rsvd43:5;
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#else
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#define SETPM_LOWRXBCN BIT(0)
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#define SETPM_AUTOANTSWITCH BIT(1)
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#define SETPM_PSALLOWBTHIGHPRI BIT(2)
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u8 BcnAntMode;
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#endif
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}__attribute__((__packed__)) SETPWRMODE_PARM, *PSETPWRMODE_PARM;
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struct H2C_SS_RFOFF_PARAM{
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u8 ROFOn; // 1: on, 0:off
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u16 gpio_period; // unit: 1024 us
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}__attribute__ ((packed));
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typedef struct JOINBSSRPT_PARM_8723A{
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u8 OpMode; // RT_MEDIA_STATUS
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}JOINBSSRPT_PARM_8723A, *PJOINBSSRPT_PARM_8723A;
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typedef struct _RSVDPAGE_LOC_8723A {
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u8 LocProbeRsp;
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u8 LocPsPoll;
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u8 LocNullData;
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u8 LocQosNull;
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u8 LocBTQosNull;
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} RSVDPAGE_LOC_8723A, *PRSVDPAGE_LOC_8723A;
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typedef struct _B_TYPE_TDMA_PARM
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{
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#if 0
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u8 En:1;
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u8 FixAntennaInBTSide:1;
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u8 TxPspoll:1;
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u8 val870:1; // value of 870, when disable
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u8 AutoWakeUp:1;
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u8 NoPS:1;
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u8 WlanHighPriority:1;
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u8 rsvd07:1;
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#else
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#define B_TDMA_EN BIT(0)
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#define B_TDMA_FIXANTINBT BIT(1)
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#define B_TDMA_TXPSPOLL BIT(2)
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#define B_TDMA_VAL870 BIT(3)
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#define B_TDMA_AUTOWAKEUP BIT(4)
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#define B_TDMA_NOPS BIT(5)
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#define B_TDMA_WLANHIGHPRI BIT(6)
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u8 option;
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#endif
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u8 TBTTOnPeriod;
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u8 MedPeriod;
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u8 rsvd30;
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}__attribute__((__packed__)) B_TYPE_TDMA_PARM, *PB_TYPE_TDMA_PARM;
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typedef struct _SCAN_EN_PARM {
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#if 0
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u8 En:1;
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u8 rsvd01:7;
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#else
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u8 En;
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#endif
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}__attribute__((__packed__)) SCAN_EN_PARM, *PSCAN_EN_PARM;
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// BT_PWR
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#define SET_H2CCMD_BT_PWR_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd, 0, 8, __Value)
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// BT_FW_PATCH
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#if 0
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#define SET_H2CCMD_BT_FW_PATCH_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value)
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#define SET_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value) SET_BITS_TO_LE_2BYTE((__pH2CCmd)+1, 0, 16, __Value)
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#else
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#define SET_H2CCMD_BT_FW_PATCH_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_4BYTE(__pH2CCmd, 0, 8, __Value) // SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value)
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#define SET_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value) SET_BITS_TO_LE_4BYTE(__pH2CCmd, 8, 16, __Value) // SET_BITS_TO_LE_2BYTE((__pH2CCmd)+1, 0, 16, __Value)
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#endif
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#if 0
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/*
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* H2C_LOWPWR_LPS
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* h2c cmd = 71
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* byte1[6:0]= bcn count : how many bcn not recevied should return to old mechanism
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* byte1[7] = enable : enable mechanism
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* byte2=bcn period : bcn recv time of this AP, unit 32 us
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* byte3= drop threshold : how many pkts be droped, rx dma should be release
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* byte4 = max early period
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* byte5 = max bcn timeout period
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*/
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#define SET_H2CCMD_LOWPWR_LPS_BCN_COUNT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value)
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#define SET_H2CCMD_LOWPWR_LPS_TB_BCN_THRESH(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 3, __Value)
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#define SET_H2CCMD_LOWPWR_LPS_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 7, 1, __Value)
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#define SET_H2CCMD_LOWPWR_LPS_BCN_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+1, 0, 8, __Value)
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#define SET_H2CCMD_LOWPWR_LPS_BCN_DROP_THRESH(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+2, 0, 8, __Value)
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#define SET_H2CCMD_LOWPWR_LPS_MAX_EARLY_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+3, 0, 8, __Value)
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#define SET_H2CCMD_LOWPWR_LPS_MAX_BCN_TO_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+4, 0, 8, __Value)
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#else
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typedef struct _LOWPWR_LPS_PARM
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{
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u8 bcn_count:4;
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u8 tb_bcn_threshold:3;
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u8 enable:1;
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u8 bcn_interval;
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u8 drop_threshold;
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u8 max_early_period;
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u8 max_bcn_timeout_period;
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}__attribute__((__packed__)) LOWPWR_LPS_PARM, *PLOWPWR_LPS_PARM;
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#endif
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// host message to firmware cmd
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void rtl8723a_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode);
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void rtl8723a_set_FwJoinBssReport_cmd(PADAPTER padapter, u8 mstatus);
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#ifdef CONFIG_BT_COEXIST
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void rtl8723a_set_BTCoex_AP_mode_FwRsvdPkt_cmd(PADAPTER padapter);
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#endif
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u8 rtl8192c_set_rssi_cmd(PADAPTER padapter, u8 *param);
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//u8 rtl8723a_set_rssi_cmd(PADAPTER padapter, u8 *param);
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void rtl8192c_set_raid_cmd(PADAPTER padapter, u32 mask, u8* arg);
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//u8 rtl8723a_set_raid_cmd(PADAPTER padapter, u32 mask, u8 arg);
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void rtl8192c_Add_RateATid(PADAPTER padapter, u32 bitmap, u8* arg, u8 rssi_level);
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//void rtl8723a_Add_RateATid(PADAPTER padapter, u32 bitmap, u8 arg);
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u8 rtl8192c_set_FwSelectSuspend_cmd(PADAPTER padapter, u8 bfwpoll, u16 period);
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//u8 rtl8723a_set_FwSelectSuspend_cmd(PADAPTER padapter, u8 bfwpoll, u16 period);
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#ifdef CONFIG_P2P
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void rtl8192c_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state);
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//void rtl8723a_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state);
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#endif //CONFIG_P2P
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void CheckFwRsvdPageContent(PADAPTER padapter);
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#endif
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#ifdef CONFIG_TSF_RESET_OFFLOAD
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u8 rtl8723c_reset_tsf(_adapter *padapter, u8 reset_port);
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#endif // CONFIG_TSF_RESET_OFFLOAD
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s32 FillH2CCmd(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer);
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