mirror of
https://github.com/Mange/rtl8192eu-linux-driver
synced 2024-11-30 01:07:42 +00:00
1387cf623d
Version information: 20140812_rtl8192EU_linux_v4.3.1.1_11320 2014-08-12 version 4.3.1.1_11320 Source: ftp://files.dlink.com.au/products/DWA-131/REV_E/Drivers/DWA-131_Linux_driver_v4.3.1.1.zip This version does not currently work on newer kernels, but it does contain USB ID 2001:3319, which a lot of other repos in GitHub does not.
217 lines
6.8 KiB
C
217 lines
6.8 KiB
C
/******************************************************************************
|
|
*
|
|
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify it
|
|
* under the terms of version 2 of the GNU General Public License as
|
|
* published by the Free Software Foundation.
|
|
*
|
|
* This program is distributed in the hope that it will be useful, but WITHOUT
|
|
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
|
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
|
* more details.
|
|
*
|
|
* You should have received a copy of the GNU General Public License along with
|
|
* this program; if not, write to the Free Software Foundation, Inc.,
|
|
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
|
*
|
|
*
|
|
******************************************************************************/
|
|
#define _RTL8192E_RF6052_C_
|
|
|
|
//#include <drv_types.h>
|
|
#include <rtl8192e_hal.h>
|
|
|
|
|
|
/*-----------------------------------------------------------------------------
|
|
* Function: PHY_RF6052SetBandwidth()
|
|
*
|
|
* Overview: This function is called by SetBWModeCallback8190Pci() only
|
|
*
|
|
* Input: PADAPTER Adapter
|
|
* WIRELESS_BANDWIDTH_E Bandwidth //20M or 40M
|
|
*
|
|
* Output: NONE
|
|
*
|
|
* Return: NONE
|
|
*
|
|
* Note: For RF type 0222D
|
|
*---------------------------------------------------------------------------*/
|
|
VOID
|
|
PHY_RF6052SetBandwidth8192E(
|
|
IN PADAPTER Adapter,
|
|
IN CHANNEL_WIDTH Bandwidth) //20M or 40M
|
|
{
|
|
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
|
|
|
|
switch(Bandwidth)
|
|
{
|
|
case CHANNEL_WIDTH_20:
|
|
//RT_DISP(FIOCTL, IOCTL_STATE, ("PHY_RF6052SetBandwidth8192E(), set 20MHz, pHalData->RfRegChnlVal[0] = 0x%x \n", pHalData->RfRegChnlVal[0]));
|
|
pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT10 | BIT11 );
|
|
PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);
|
|
PHY_SetRFReg(Adapter, RF_PATH_B, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);
|
|
break;
|
|
|
|
case CHANNEL_WIDTH_40:
|
|
//RT_DISP(FIOCTL, IOCTL_STATE, ("PHY_RF6052SetBandwidth8192E(), set 40MHz, pHalData->RfRegChnlVal[0] = 0x%x \n", pHalData->RfRegChnlVal[0]));
|
|
pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT10 );
|
|
PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);
|
|
PHY_SetRFReg(Adapter, RF_PATH_B, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);
|
|
break;
|
|
|
|
default:
|
|
//RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_RF6052SetBandwidth8192E(): unknown Bandwidth: %#X\n",Bandwidth ));
|
|
break;
|
|
}
|
|
}
|
|
|
|
static int
|
|
phy_RF6052_Config_ParaFile_8192E(
|
|
IN PADAPTER Adapter
|
|
)
|
|
{
|
|
u8 eRFPath;
|
|
int rtStatus = _SUCCESS;
|
|
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
|
|
BB_REGISTER_DEFINITION_T *pPhyReg;
|
|
static char sz8192ERadioAFile[] = RTL8192E_PHY_RADIO_A;
|
|
static char sz8192ERadioBFile[] = RTL8192E_PHY_RADIO_B;
|
|
static char sz8192ETxPwrTrack[] = RTL8192E_TXPWR_TRACK;
|
|
|
|
char *pszRadioAFile = NULL, *pszRadioBFile = NULL, *pszTxPwrTrack = NULL;
|
|
|
|
u32 u4RegValue,MaskforPhySet = 0;;
|
|
pszRadioAFile = sz8192ERadioAFile;
|
|
pszRadioBFile = sz8192ERadioBFile;
|
|
pszTxPwrTrack = sz8192ETxPwrTrack;
|
|
|
|
|
|
|
|
//3//-----------------------------------------------------------------
|
|
//3// <2> Initialize RF
|
|
//3//-----------------------------------------------------------------
|
|
//for(eRFPath = RF_PATH_A; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
|
|
for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
|
|
{
|
|
pPhyReg = &pHalData->PHYRegDef[eRFPath];
|
|
switch(eRFPath)
|
|
{
|
|
case RF_PATH_A:
|
|
case RF_PATH_C:
|
|
u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs|MaskforPhySet, bRFSI_RFENV);
|
|
break;
|
|
case RF_PATH_B :
|
|
case RF_PATH_D:
|
|
u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs|MaskforPhySet, bRFSI_RFENV<<16);
|
|
break;
|
|
default:
|
|
u4RegValue = 0;
|
|
break;
|
|
}
|
|
|
|
|
|
/*----Set RF_ENV enable----*/
|
|
PHY_SetBBReg(Adapter, pPhyReg->rfintfe|MaskforPhySet, bRFSI_RFENV<<16, 0x1);
|
|
rtw_udelay_os(1);//PlatformStallExecution(1);
|
|
|
|
/*----Set RF_ENV output high----*/
|
|
PHY_SetBBReg(Adapter, pPhyReg->rfintfo|MaskforPhySet, bRFSI_RFENV, 0x1);
|
|
rtw_udelay_os(1);//PlatformStallExecution(1);
|
|
|
|
/* Set bit number of Address and Data for RF register */
|
|
PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2|MaskforPhySet, b3WireAddressLength, 0x0); // Set 1 to 4 bits for 8255
|
|
rtw_udelay_os(1);//PlatformStallExecution(1);
|
|
|
|
PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2|MaskforPhySet, b3WireDataLength, 0x0); // Set 0 to 12 bits for 8255
|
|
rtw_udelay_os(1);//PlatformStallExecution(1);
|
|
|
|
/*----Initialize RF fom connfiguration file----*/
|
|
switch(eRFPath)
|
|
{
|
|
case RF_PATH_A:
|
|
#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
|
|
if (PHY_ConfigRFWithParaFile(Adapter, pszRadioAFile, eRFPath) == _FAIL)
|
|
#endif
|
|
{
|
|
#ifdef CONFIG_EMBEDDED_FWIMG
|
|
if(HAL_STATUS_FAILURE ==ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv,CONFIG_RF_RADIO, (ODM_RF_RADIO_PATH_E)eRFPath))
|
|
rtStatus = _FAIL;
|
|
#endif
|
|
}
|
|
break;
|
|
case RF_PATH_B:
|
|
#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
|
|
if (PHY_ConfigRFWithParaFile(Adapter, pszRadioBFile, eRFPath) == _FAIL)
|
|
#endif
|
|
{
|
|
#ifdef CONFIG_EMBEDDED_FWIMG
|
|
if(HAL_STATUS_FAILURE ==ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv,CONFIG_RF_RADIO, (ODM_RF_RADIO_PATH_E)eRFPath))
|
|
rtStatus = _FAIL;
|
|
#endif
|
|
}
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
/*----Restore RFENV control type----*/;
|
|
switch(eRFPath)
|
|
{
|
|
case RF_PATH_A:
|
|
case RF_PATH_C:
|
|
PHY_SetBBReg(Adapter, pPhyReg->rfintfs|MaskforPhySet, bRFSI_RFENV, u4RegValue);
|
|
break;
|
|
case RF_PATH_B :
|
|
case RF_PATH_D:
|
|
PHY_SetBBReg(Adapter, pPhyReg->rfintfs|MaskforPhySet, bRFSI_RFENV<<16, u4RegValue);
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
if(rtStatus != _SUCCESS){
|
|
DBG_871X("%s():Radio[%d] Fail!!", __FUNCTION__, eRFPath);
|
|
goto phy_RF6052_Config_ParaFile_Fail;
|
|
}
|
|
|
|
}
|
|
|
|
//3 -----------------------------------------------------------------
|
|
//3 Configuration of Tx Power Tracking
|
|
//3 -----------------------------------------------------------------
|
|
|
|
#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
|
|
if (PHY_ConfigRFWithTxPwrTrackParaFile(Adapter, pszTxPwrTrack) == _FAIL)
|
|
#endif
|
|
{
|
|
#ifdef CONFIG_EMBEDDED_FWIMG
|
|
ODM_ConfigRFWithTxPwrTrackHeaderFile(&pHalData->odmpriv);
|
|
#endif
|
|
}
|
|
|
|
//RT_TRACE(COMP_INIT, DBG_LOUD, ("<---phy_RF6052_Config_ParaFile_8192E()\n"));
|
|
|
|
phy_RF6052_Config_ParaFile_Fail:
|
|
return rtStatus;
|
|
}
|
|
|
|
|
|
int
|
|
PHY_RF6052_Config_8192E(
|
|
IN PADAPTER Adapter)
|
|
{
|
|
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
|
|
int rtStatus = _SUCCESS;
|
|
|
|
//
|
|
// Config BB and RF
|
|
//
|
|
rtStatus = phy_RF6052_Config_ParaFile_8192E(Adapter);
|
|
|
|
return rtStatus;
|
|
|
|
}
|
|
|
|
|
|
/* End of HalRf6052.c */
|
|
|