mirror of
https://github.com/Mange/rtl8192eu-linux-driver
synced 2024-11-14 09:34:59 +00:00
149 lines
3.7 KiB
C
149 lines
3.7 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2012 - 2017 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*****************************************************************************/
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#ifndef __INC_HAL8192EPHYCFG_H__
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#define __INC_HAL8192EPHYCFG_H__
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/*--------------------------Define Parameters-------------------------------*/
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#define LOOP_LIMIT 5
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#define MAX_STALL_TIME 50 /* us */
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#define AntennaDiversityValue 0x80 /* (Adapter->bSoftwareAntennaDiversity ? 0x00 : 0x80) */
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#define MAX_TXPWR_IDX_NMODE_92S 63
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#define Reset_Cnt_Limit 3
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#ifdef CONFIG_PCI_HCI
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#define MAX_AGGR_NUM 0x0B
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#else
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#define MAX_AGGR_NUM 0x07
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#endif /* CONFIG_PCI_HCI */
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/*--------------------------Define Parameters-------------------------------*/
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/*------------------------------Define structure----------------------------*/
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/* BB/RF related */
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/*------------------------------Define structure----------------------------*/
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/*------------------------Export global variable----------------------------*/
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/*------------------------Export global variable----------------------------*/
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/*------------------------Export Marco Definition---------------------------*/
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/*------------------------Export Marco Definition---------------------------*/
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/*--------------------------Exported Function prototype---------------------*/
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/*
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* BB and RF register read/write
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* */
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u32 PHY_QueryBBReg8192E(IN PADAPTER Adapter,
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IN u32 RegAddr,
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IN u32 BitMask);
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void PHY_SetBBReg8192E(IN PADAPTER Adapter,
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IN u32 RegAddr,
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IN u32 BitMask,
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IN u32 Data);
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u32 PHY_QueryRFReg8192E(IN PADAPTER Adapter,
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IN enum rf_path eRFPath,
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IN u32 RegAddr,
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IN u32 BitMask);
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void PHY_SetRFReg8192E(IN PADAPTER Adapter,
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IN enum rf_path eRFPath,
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IN u32 RegAddr,
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IN u32 BitMask,
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IN u32 Data);
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/*
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* Initialization related function
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*
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* MAC/BB/RF HAL config */
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int PHY_MACConfig8192E(IN PADAPTER Adapter);
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int PHY_BBConfig8192E(IN PADAPTER Adapter);
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int PHY_RFConfig8192E(IN PADAPTER Adapter);
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/* RF config */
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/*
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* BB TX Power R/W
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* */
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void PHY_GetTxPowerLevel8192E(IN PADAPTER Adapter, OUT s32 *powerlevel);
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void PHY_SetTxPowerLevel8192E(IN PADAPTER Adapter, IN u8 channel);
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BOOLEAN PHY_UpdateTxPowerDbm8192E(IN PADAPTER Adapter, IN int powerInDbm);
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VOID
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PHY_SetTxPowerIndex_8192E(
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IN PADAPTER Adapter,
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IN u32 PowerIndex,
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IN enum rf_path RFPath,
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IN u8 Rate
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);
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u8
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PHY_GetTxPowerIndex_8192E(
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IN PADAPTER pAdapter,
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IN enum rf_path RFPath,
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IN u8 Rate,
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IN u8 BandWidth,
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IN u8 Channel,
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struct txpwr_idx_comp *tic
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);
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/*
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* channel switch related funciton
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* */
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VOID
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PHY_SetSwChnlBWMode8192E(
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IN PADAPTER Adapter,
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IN u8 channel,
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IN enum channel_width Bandwidth,
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IN u8 Offset40,
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IN u8 Offset80
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);
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VOID
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PHY_SetRFEReg_8192E(
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IN PADAPTER Adapter
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);
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void
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phy_SpurCalibration_8192E(
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IN PADAPTER Adapter,
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IN enum spur_cal_method method
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);
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void PHY_SpurCalibration_8192E(IN PADAPTER Adapter);
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#ifdef CONFIG_SPUR_CAL_NBI
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void
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phy_SpurCalibration_8192E_NBI(
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IN PADAPTER Adapter
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);
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#endif
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/*
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* BB/MAC/RF other monitor API
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* */
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VOID
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phy_set_rf_path_switch_8192e(
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IN struct dm_struct *phydm,
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IN bool bMain
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);
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/*--------------------------Exported Function prototype---------------------*/
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#endif /* __INC_HAL8192CPHYCFG_H */
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