mirror of
https://github.com/Mange/rtl8192eu-linux-driver
synced 2024-11-01 03:05:34 +00:00
1387cf623d
Version information: 20140812_rtl8192EU_linux_v4.3.1.1_11320 2014-08-12 version 4.3.1.1_11320 Source: ftp://files.dlink.com.au/products/DWA-131/REV_E/Drivers/DWA-131_Linux_driver_v4.3.1.1.zip This version does not currently work on newer kernels, but it does contain USB ID 2001:3319, which a lot of other repos in GitHub does not.
514 lines
14 KiB
C
514 lines
14 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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/*
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The purpose of rtw_io.c
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a. provides the API
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b. provides the protocol engine
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c. provides the software interface between caller and the hardware interface
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Compiler Flag Option:
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1. CONFIG_SDIO_HCI:
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a. USE_SYNC_IRP: Only sync operations are provided.
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b. USE_ASYNC_IRP:Both sync/async operations are provided.
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2. CONFIG_USB_HCI:
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a. USE_ASYNC_IRP: Both sync/async operations are provided.
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3. CONFIG_CFIO_HCI:
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b. USE_SYNC_IRP: Only sync operations are provided.
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Only sync read/rtw_write_mem operations are provided.
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jackson@realtek.com.tw
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*/
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#define _RTW_IO_C_
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#include <drv_types.h>
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#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS)
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#error "Shall be Linux or Windows, but not both!\n"
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#endif
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#ifdef CONFIG_SDIO_HCI
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#define rtw_le16_to_cpu(val) val
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#define rtw_le32_to_cpu(val) val
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#define rtw_cpu_to_le16(val) val
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#define rtw_cpu_to_le32(val) val
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#else
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#define rtw_le16_to_cpu(val) le16_to_cpu(val)
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#define rtw_le32_to_cpu(val) le32_to_cpu(val)
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#define rtw_cpu_to_le16(val) cpu_to_le16(val)
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#define rtw_cpu_to_le32(val) cpu_to_le32(val)
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#endif
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u8 _rtw_read8(_adapter *adapter, u32 addr)
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{
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u8 r_val;
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//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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u8 (*_read8)(struct intf_hdl *pintfhdl, u32 addr);
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_func_enter_;
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_read8 = pintfhdl->io_ops._read8;
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r_val = _read8(pintfhdl, addr);
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_func_exit_;
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return r_val;
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}
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u16 _rtw_read16(_adapter *adapter, u32 addr)
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{
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u16 r_val;
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//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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u16 (*_read16)(struct intf_hdl *pintfhdl, u32 addr);
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_func_enter_;
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_read16 = pintfhdl->io_ops._read16;
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r_val = _read16(pintfhdl, addr);
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_func_exit_;
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return rtw_le16_to_cpu(r_val);
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}
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u32 _rtw_read32(_adapter *adapter, u32 addr)
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{
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u32 r_val;
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//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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u32 (*_read32)(struct intf_hdl *pintfhdl, u32 addr);
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_func_enter_;
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_read32 = pintfhdl->io_ops._read32;
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r_val = _read32(pintfhdl, addr);
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_func_exit_;
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return rtw_le32_to_cpu(r_val);
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}
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int _rtw_write8(_adapter *adapter, u32 addr, u8 val)
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{
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//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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int (*_write8)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
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int ret;
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_func_enter_;
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_write8 = pintfhdl->io_ops._write8;
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ret = _write8(pintfhdl, addr, val);
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_func_exit_;
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return RTW_STATUS_CODE(ret);
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}
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int _rtw_write16(_adapter *adapter, u32 addr, u16 val)
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{
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//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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int (*_write16)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
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int ret;
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_func_enter_;
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_write16 = pintfhdl->io_ops._write16;
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val = rtw_cpu_to_le16(val);
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ret = _write16(pintfhdl, addr, val);
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_func_exit_;
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return RTW_STATUS_CODE(ret);
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}
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int _rtw_write32(_adapter *adapter, u32 addr, u32 val)
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{
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//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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int (*_write32)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
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int ret;
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_func_enter_;
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_write32 = pintfhdl->io_ops._write32;
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val = rtw_cpu_to_le32(val);
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ret = _write32(pintfhdl, addr, val);
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_func_exit_;
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return RTW_STATUS_CODE(ret);
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}
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int _rtw_writeN(_adapter *adapter, u32 addr ,u32 length , u8 *pdata)
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{
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//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = (struct intf_hdl*)(&(pio_priv->intf));
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int (*_writeN)(struct intf_hdl *pintfhdl, u32 addr,u32 length, u8 *pdata);
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int ret;
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_func_enter_;
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_writeN = pintfhdl->io_ops._writeN;
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ret = _writeN(pintfhdl, addr,length,pdata);
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_func_exit_;
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return RTW_STATUS_CODE(ret);
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}
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#ifdef CONFIG_SDIO_HCI
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u8 _rtw_sd_f0_read8(_adapter *adapter, u32 addr)
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{
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u8 r_val = 0x00;
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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u8 (*_sd_f0_read8)(struct intf_hdl *pintfhdl, u32 addr);
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_func_enter_;
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_sd_f0_read8 = pintfhdl->io_ops._sd_f0_read8;
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if (_sd_f0_read8)
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r_val = _sd_f0_read8(pintfhdl, addr);
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else
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DBG_871X_LEVEL(_drv_warning_, FUNC_ADPT_FMT" _sd_f0_read8 callback is NULL\n", FUNC_ADPT_ARG(adapter));
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_func_exit_;
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return r_val;
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}
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#endif /* CONFIG_SDIO_HCI */
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int _rtw_write8_async(_adapter *adapter, u32 addr, u8 val)
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{
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//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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int (*_write8_async)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
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int ret;
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_func_enter_;
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_write8_async = pintfhdl->io_ops._write8_async;
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ret = _write8_async(pintfhdl, addr, val);
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_func_exit_;
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return RTW_STATUS_CODE(ret);
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}
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int _rtw_write16_async(_adapter *adapter, u32 addr, u16 val)
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{
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//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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int (*_write16_async)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
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int ret;
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_func_enter_;
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_write16_async = pintfhdl->io_ops._write16_async;
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val = rtw_cpu_to_le16(val);
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ret = _write16_async(pintfhdl, addr, val);
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_func_exit_;
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return RTW_STATUS_CODE(ret);
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}
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int _rtw_write32_async(_adapter *adapter, u32 addr, u32 val)
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{
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//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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int (*_write32_async)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
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int ret;
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_func_enter_;
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_write32_async = pintfhdl->io_ops._write32_async;
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val = rtw_cpu_to_le32(val);
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ret = _write32_async(pintfhdl, addr, val);
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_func_exit_;
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return RTW_STATUS_CODE(ret);
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}
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void _rtw_read_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
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{
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void (*_read_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
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//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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_func_enter_;
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if( (adapter->bDriverStopped ==_TRUE) || (adapter->bSurpriseRemoved == _TRUE))
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{
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RT_TRACE(_module_rtl871x_io_c_, _drv_info_, ("rtw_read_mem:bDriverStopped(%d) OR bSurpriseRemoved(%d)", adapter->bDriverStopped, adapter->bSurpriseRemoved));
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return;
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}
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_read_mem = pintfhdl->io_ops._read_mem;
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_read_mem(pintfhdl, addr, cnt, pmem);
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_func_exit_;
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}
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void _rtw_write_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
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{
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void (*_write_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
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//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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_func_enter_;
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_write_mem = pintfhdl->io_ops._write_mem;
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_write_mem(pintfhdl, addr, cnt, pmem);
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_func_exit_;
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}
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void _rtw_read_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
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{
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u32 (*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
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//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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_func_enter_;
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if( (adapter->bDriverStopped ==_TRUE) || (adapter->bSurpriseRemoved == _TRUE))
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{
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RT_TRACE(_module_rtl871x_io_c_, _drv_info_, ("rtw_read_port:bDriverStopped(%d) OR bSurpriseRemoved(%d)", adapter->bDriverStopped, adapter->bSurpriseRemoved));
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return;
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}
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_read_port = pintfhdl->io_ops._read_port;
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_read_port(pintfhdl, addr, cnt, pmem);
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_func_exit_;
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}
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void _rtw_read_port_cancel(_adapter *adapter)
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{
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void (*_read_port_cancel)(struct intf_hdl *pintfhdl);
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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_read_port_cancel = pintfhdl->io_ops._read_port_cancel;
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RTW_DISABLE_FUNC(adapter, DF_RX_BIT);
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if(_read_port_cancel)
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_read_port_cancel(pintfhdl);
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}
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u32 _rtw_write_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
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{
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u32 (*_write_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
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//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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u32 ret = _SUCCESS;
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_func_enter_;
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_write_port = pintfhdl->io_ops._write_port;
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ret = _write_port(pintfhdl, addr, cnt, pmem);
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_func_exit_;
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return ret;
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}
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u32 _rtw_write_port_and_wait(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem, int timeout_ms)
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{
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int ret = _SUCCESS;
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struct xmit_buf *pxmitbuf = (struct xmit_buf *)pmem;
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struct submit_ctx sctx;
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rtw_sctx_init(&sctx, timeout_ms);
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pxmitbuf->sctx = &sctx;
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ret = _rtw_write_port(adapter, addr, cnt, pmem);
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if (ret == _SUCCESS)
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ret = rtw_sctx_wait(&sctx, __func__);
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return ret;
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}
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void _rtw_write_port_cancel(_adapter *adapter)
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{
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void (*_write_port_cancel)(struct intf_hdl *pintfhdl);
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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_write_port_cancel = pintfhdl->io_ops._write_port_cancel;
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RTW_DISABLE_FUNC(adapter, DF_TX_BIT);
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if(_write_port_cancel)
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_write_port_cancel(pintfhdl);
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}
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int rtw_init_io_priv(_adapter *padapter, void (*set_intf_ops)(_adapter *padapter,struct _io_ops *pops))
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{
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struct io_priv *piopriv = &padapter->iopriv;
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struct intf_hdl *pintf = &piopriv->intf;
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if (set_intf_ops == NULL)
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return _FAIL;
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piopriv->padapter = padapter;
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pintf->padapter = padapter;
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pintf->pintf_dev = adapter_to_dvobj(padapter);
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set_intf_ops(padapter,&pintf->io_ops);
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return _SUCCESS;
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}
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/*
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* Increase and check if the continual_io_error of this @param dvobjprive is larger than MAX_CONTINUAL_IO_ERR
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* @return _TRUE:
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* @return _FALSE:
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*/
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int rtw_inc_and_chk_continual_io_error(struct dvobj_priv *dvobj)
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{
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int ret = _FALSE;
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int value;
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if( (value=ATOMIC_INC_RETURN(&dvobj->continual_io_error)) > MAX_CONTINUAL_IO_ERR) {
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DBG_871X("[dvobj:%p][ERROR] continual_io_error:%d > %d\n", dvobj, value, MAX_CONTINUAL_IO_ERR);
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ret = _TRUE;
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} else {
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//DBG_871X("[dvobj:%p] continual_io_error:%d\n", dvobj, value);
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}
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return ret;
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}
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/*
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* Set the continual_io_error of this @param dvobjprive to 0
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*/
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void rtw_reset_continual_io_error(struct dvobj_priv *dvobj)
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{
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ATOMIC_SET(&dvobj->continual_io_error, 0);
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}
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#ifdef DBG_IO
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u16 read_sniff_ranges[][2] = {
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//{0x520, 0x523},
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};
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u16 write_sniff_ranges[][2] = {
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//{0x520, 0x523},
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//{0x4c, 0x4c},
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};
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int read_sniff_num = sizeof(read_sniff_ranges)/sizeof(u16)/2;
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int write_sniff_num = sizeof(write_sniff_ranges)/sizeof(u16)/2;
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bool match_read_sniff_ranges(u16 addr, u16 len)
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{
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int i;
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for (i = 0; i<read_sniff_num; i++) {
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if (addr + len > read_sniff_ranges[i][0] && addr <= read_sniff_ranges[i][1])
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return _TRUE;
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}
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return _FALSE;
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}
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bool match_write_sniff_ranges(u16 addr, u16 len)
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{
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int i;
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for (i = 0; i<write_sniff_num; i++) {
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if (addr + len > write_sniff_ranges[i][0] && addr <= write_sniff_ranges[i][1])
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return _TRUE;
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}
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return _FALSE;
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}
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u8 dbg_rtw_read8(_adapter *adapter, u32 addr, const char *caller, const int line)
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{
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u8 val = _rtw_read8(adapter, addr);
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if (match_read_sniff_ranges(addr, 1))
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DBG_871X("DBG_IO %s:%d rtw_read8(0x%04x) return 0x%02x\n", caller, line, addr, val);
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return val;
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}
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u16 dbg_rtw_read16(_adapter *adapter, u32 addr, const char *caller, const int line)
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{
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u16 val = _rtw_read16(adapter, addr);
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|
|
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if (match_read_sniff_ranges(addr, 2))
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DBG_871X("DBG_IO %s:%d rtw_read16(0x%04x) return 0x%04x\n", caller, line, addr, val);
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return val;
|
|
}
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|
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u32 dbg_rtw_read32(_adapter *adapter, u32 addr, const char *caller, const int line)
|
|
{
|
|
u32 val = _rtw_read32(adapter, addr);
|
|
|
|
if (match_read_sniff_ranges(addr, 4))
|
|
DBG_871X("DBG_IO %s:%d rtw_read32(0x%04x) return 0x%08x\n", caller, line, addr, val);
|
|
|
|
return val;
|
|
}
|
|
|
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int dbg_rtw_write8(_adapter *adapter, u32 addr, u8 val, const char *caller, const int line)
|
|
{
|
|
if (match_write_sniff_ranges(addr, 1))
|
|
DBG_871X("DBG_IO %s:%d rtw_write8(0x%04x, 0x%02x)\n", caller, line, addr, val);
|
|
|
|
return _rtw_write8(adapter, addr, val);
|
|
}
|
|
int dbg_rtw_write16(_adapter *adapter, u32 addr, u16 val, const char *caller, const int line)
|
|
{
|
|
if (match_write_sniff_ranges(addr, 2))
|
|
DBG_871X("DBG_IO %s:%d rtw_write16(0x%04x, 0x%04x)\n", caller, line, addr, val);
|
|
|
|
return _rtw_write16(adapter, addr, val);
|
|
}
|
|
int dbg_rtw_write32(_adapter *adapter, u32 addr, u32 val, const char *caller, const int line)
|
|
{
|
|
if (match_write_sniff_ranges(addr, 4))
|
|
DBG_871X("DBG_IO %s:%d rtw_write32(0x%04x, 0x%08x)\n", caller, line, addr, val);
|
|
|
|
return _rtw_write32(adapter, addr, val);
|
|
}
|
|
int dbg_rtw_writeN(_adapter *adapter, u32 addr ,u32 length , u8 *data, const char *caller, const int line)
|
|
{
|
|
if (match_write_sniff_ranges(addr, length))
|
|
DBG_871X("DBG_IO %s:%d rtw_writeN(0x%04x, %u)\n", caller, line, addr, length);
|
|
|
|
return _rtw_writeN(adapter, addr, length, data);
|
|
}
|
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#endif
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