mirror of
https://github.com/Mange/rtl8192eu-linux-driver
synced 2024-11-01 19:25:31 +00:00
153 lines
4.2 KiB
C
153 lines
4.2 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2007 - 2017 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* wlanfae <wlanfae@realtek.com>
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* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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* Hsinchu 300, Taiwan.
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*
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* Larry Finger <Larry.Finger@lwfinger.net>
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*
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*****************************************************************************/
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#ifndef __PHYDM_PMAC_TX_SETTING_H__
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#define __PHYDM_PMAC_TX_SETTING_H__
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#define PMAC_TX_SETTING_VERSION "1.0"
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/* @1 ============================================================
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* 1 Definition
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* 1 ============================================================
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*/
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#define RANDOM_BY_PN32 0x12
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/* @1 ============================================================
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* 1 structure
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* 1 ============================================================
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*/
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struct phydm_pmac_info {
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u8 en_pmac_tx:1; /*@ disable pmac 1: enable pmac */
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u8 mode:3; /*@ 0: Packet TX 3:Continuous TX */
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/* @u8 Ntx:4; */
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u8 tx_rate; /* @should be HW rate*/
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/* @u8 TX_RATE_HEX; */
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u8 tx_sc;
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/* @u8 bSGI:1; */
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u8 is_short_preamble:1;
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/* @u8 bSTBC:1; */
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/* @u8 bLDPC:1; */
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u8 ndp_sound:1;
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u8 bw:3; /* @0:20 1:40 2:80Mhz */
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u8 m_stbc; /* @bSTBC + 1 */
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u16 packet_period;
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u32 packet_count;
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/* @u32 PacketLength; */
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u8 packet_pattern;
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u16 sfd;
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u8 signal_field;
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u8 service_field;
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u16 length;
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u8 crc16[2];
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u8 lsig[3];
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u8 ht_sig[6];
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u8 vht_sig_a[6];
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u8 vht_sig_b[4];
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u8 vht_sig_b_crc;
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u8 vht_delimiter[4];
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/* @u8 mac_addr[6]; */
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};
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struct phydm_pmac_tx {
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boolean is_cck_rate;
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boolean is_ofdm_rate;
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boolean is_ht_rate;
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boolean is_vht_rate;
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boolean cck_cont_tx;
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boolean ofdm_cont_tx;
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u8 path;
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u32 tx_scailing;
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};
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/* @1 ============================================================
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* 1 enumeration
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* 1 ============================================================
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*/
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enum phydm_pmac_mode {
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NONE_TEST,
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PKTS_TX,
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PKTS_RX,
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CONT_TX,
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OFDM_SINGLE_TONE_TX,
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CCK_CARRIER_SIPPRESSION_TX
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};
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/* @1 ============================================================
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* 1 function prototype
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* 1 ============================================================
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*/
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#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
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void phydm_start_cck_cont_tx_jgr3(void *dm_void,
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struct phydm_pmac_info *tx_info);
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void phydm_stop_cck_cont_tx_jgr3(void *dm_void);
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void phydm_start_ofdm_cont_tx_jgr3(void *dm_void);
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void phydm_stop_ofdm_cont_tx_jgr3(void *dm_void);
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void phydm_set_single_tone_jgr3(void *dm_void, boolean is_single_tone,
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boolean en_pmac_tx, u8 path);
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void phydm_stop_pmac_tx_jgr3(void *dm_void, struct phydm_pmac_info *tx_info);
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void phydm_set_mac_phy_txinfo_jgr3(void *dm_void,
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struct phydm_pmac_info *tx_info);
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void phydm_set_sig_jgr3(void *dm_void, struct phydm_pmac_info *tx_info);
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void phydm_set_cck_preamble_hdr_jgr3(void *dm_void,
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struct phydm_pmac_info *tx_info);
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void phydm_set_mode_jgr3(void *dm_void, struct phydm_pmac_info *tx_info,
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enum phydm_pmac_mode mode);
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void phydm_set_pmac_txon_jgr3(void *dm_void, struct phydm_pmac_info *tx_info);
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void phydm_set_pmac_tx_jgr3(void *dm_void, struct phydm_pmac_info *tx_info,
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enum rf_path mpt_rf_path);
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void phydm_set_tmac_tx_jgr3(void *dm_void);
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#endif
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void phydm_start_cck_cont_tx(void *dm_void, struct phydm_pmac_info *tx_info);
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void phydm_stop_cck_cont_tx(void *dm_void);
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void phydm_start_ofdm_cont_tx(void *dm_void);
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void phydm_stop_ofdm_cont_tx(void *dm_void);
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void phydm_set_single_tone(void *dm_void, boolean is_single_tone,
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boolean en_pmac_tx, u8 path);
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void phydm_set_pmac_tx(void *dm_void, struct phydm_pmac_info *tx_info,
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enum rf_path mpt_rf_path);
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void phydm_set_tmac_tx(void *dm_void);
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#endif
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