mirror of
https://github.com/Mange/rtl8192eu-linux-driver
synced 2024-12-26 14:01:45 +00:00
1387cf623d
Version information: 20140812_rtl8192EU_linux_v4.3.1.1_11320 2014-08-12 version 4.3.1.1_11320 Source: ftp://files.dlink.com.au/products/DWA-131/REV_E/Drivers/DWA-131_Linux_driver_v4.3.1.1.zip This version does not currently work on newer kernels, but it does contain USB ID 2001:3319, which a lot of other repos in GitHub does not.
185 lines
5.0 KiB
C
185 lines
5.0 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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#ifndef _RTL8192D_XMIT_H_
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#define _RTL8192D_XMIT_H_
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//
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//defined for TX DESC Operation
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//
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#define MAX_TID (15)
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//OFFSET 0
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#define OFFSET_SZ 0
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#define OFFSET_SHT 16
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#define BMC BIT(24)
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#define LSG BIT(26)
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#define FSG BIT(27)
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#define OWN BIT(31)
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//OFFSET 4
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#define PKT_OFFSET_SZ 0
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#define BK BIT(6)
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#define QSEL_SHT 8
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#define Rate_ID_SHT 16
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#define NAVUSEHDR BIT(20)
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#define PKT_OFFSET_SHT 26
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#define HWPC BIT(31)
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//OFFSET 8
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#define AGG_EN BIT(29)
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//OFFSET 12
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#define SEQ_SHT 16
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//OFFSET 16
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#define QoS BIT(6)
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#define HW_SEQ_EN BIT(7)
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#define USERATE BIT(8)
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#define DISDATAFB BIT(10)
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#define DATA_SHORT BIT(24)
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#define DATA_BW BIT(25)
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//OFFSET 20
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#define SGI BIT(6)
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//
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// Queue Select Value in TxDesc
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//
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#define QSLT_BK 0x2//0x01
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#define QSLT_BE 0x0
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#define QSLT_VI 0x5//0x4
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#define QSLT_VO 0x7//0x6
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#define QSLT_BEACON 0x10
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#define QSLT_HIGH 0x11
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#define QSLT_MGNT 0x12
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#define QSLT_CMD 0x13
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//Because we open EM for normal case, we just always insert 2*8 bytes.by wl
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#ifdef USB_PACKET_OFFSET_SZ
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#define USB_92D_DUMMY_OFFSET (PACKET_OFFSET_SZ/8)
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#else
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#define USB_92D_DUMMY_OFFSET 2
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#endif
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#define USB_92D_DUMMY_LENGTH (USB_92D_DUMMY_OFFSET * PACKET_OFFSET_SZ)
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#define USB_HWDESC_HEADER_LEN (TXDESC_SIZE + USB_92D_DUMMY_LENGTH)
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//For 92D early mode
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#define SET_EARLYMODE_PKTNUM(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 3, __Value)
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#define SET_EARLYMODE_LEN0(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 12, __Value)
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#define SET_EARLYMODE_LEN1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 16, 12, __Value)
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#define SET_EARLYMODE_LEN2_1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 28, 4, __Value)
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#define SET_EARLYMODE_LEN2_2(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 8, __Value)
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#define SET_EARLYMODE_LEN3(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 8, 12, __Value)
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#define SET_EARLYMODE_LEN4(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 20, 12, __Value)
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/* Copy from rtl8192c */
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struct txrpt_ccx_8192d {
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/* offset 0 */
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u8 retry_cnt:6;
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u8 rsvd_0:2;
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/* offset 1 */
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u8 rts_retry_cnt:6;
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u8 rsvd_1:2;
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/* offset 2 */
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u8 ccx_qtime0;
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u8 ccx_qtime1;
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/* offset 4 */
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u8 missed_pkt_num:5;
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u8 rsvd_4:3;
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/* offset 5 */
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u8 mac_id:5;
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u8 des1_fragssn:3;
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/* offset 6 */
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u8 rpt_pkt_num:5;
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u8 pkt_drop:1;
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u8 lifetime_over:1;
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u8 retry_over:1;
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/* offset 7*/
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u8 edca_tx_queue:4;
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u8 rsvd_7:1;
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u8 bmc:1;
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u8 pkt_ok:1;
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u8 int_ccx:1;
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};
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#define txrpt_ccx_qtime_8192d(txrpt_ccx) ((txrpt_ccx)->ccx_qtime0+((txrpt_ccx)->ccx_qtime1<<8))
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#ifdef CONFIG_XMIT_ACK
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void dump_txrpt_ccx_8192d(void *buf);
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void handle_txrpt_ccx_8192d(_adapter *adapter, void *buf);
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#else
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#define dump_txrpt_ccx_8192d(buf) do {} while(0)
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#define handle_txrpt_ccx_8192d(adapter, buf) do {} while(0)
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#endif
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#ifdef CONFIG_USB_HCI
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s32 rtl8192du_init_xmit_priv(_adapter * padapter);
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void rtl8192du_free_xmit_priv(_adapter * padapter);
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void rtl8192du_cal_txdesc_chksum(struct tx_desc *ptxdesc);
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s32 rtl8192du_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf);
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s32 rtl8192du_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe);
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s32 rtl8192du_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe);
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s32 rtl8192du_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe);
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#ifdef CONFIG_HOSTAPD_MLME
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s32 rtl8192du_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt);
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#endif
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#endif
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#ifdef CONFIG_PCI_HCI
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s32 rtl8192de_init_xmit_priv(_adapter * padapter);
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void rtl8192de_free_xmit_priv(_adapter * padapter);
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s32 rtl8192de_enqueue_xmitbuf(struct rtw_tx_ring *ring, struct xmit_buf *pxmitbuf);
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struct xmit_buf *rtl8192de_dequeue_xmitbuf(struct rtw_tx_ring *ring);
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void rtl8192de_xmitframe_resume(_adapter *padapter);
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s32 rtl8192de_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe);
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s32 rtl8192de_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe);
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s32 rtl8192de_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe);
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#ifdef CONFIG_HOSTAPD_MLME
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s32 rtl8192de_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt);
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#endif
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#endif//end if CONFIG_PCI_HCI
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#endif
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