mirror of
https://github.com/Mange/rtl8192eu-linux-driver
synced 2024-11-22 21:45:22 +00:00
515 lines
14 KiB
C
515 lines
14 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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#define _HCI_OPS_OS_C_
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//#include <drv_types.h>
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#include <rtl8192e_hal.h>
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#ifdef CONFIG_SUPPORT_USB_INT
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void interrupt_handler_8192eu(_adapter *padapter, u16 pkt_len, u8 *pbuf)
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{
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HAL_DATA_TYPE *pHalData=GET_HAL_DATA(padapter);
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struct reportpwrstate_parm pwr_rpt;
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if ( pkt_len != INTERRUPT_MSG_FORMAT_LEN )
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{
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DBG_8192C("%s Invalid interrupt content length (%d)!\n", __FUNCTION__, pkt_len);
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return ;
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}
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// HISR
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_rtw_memcpy(&(pHalData->IntArray[0]), &(pbuf[USB_INTR_CONTENT_HISR_OFFSET]), 4);
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_rtw_memcpy(&(pHalData->IntArray[1]), &(pbuf[USB_INTR_CONTENT_HISRE_OFFSET]), 4);
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#if 0 //DBG
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{
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u32 hisr=0 ,hisr_ex=0;
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_rtw_memcpy(&hisr,&(pHalData->IntArray[0]),4);
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hisr = le32_to_cpu(hisr);
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_rtw_memcpy(&hisr_ex,&(pHalData->IntArray[1]),4);
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hisr_ex = le32_to_cpu(hisr_ex);
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if((hisr != 0) || (hisr_ex!=0))
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DBG_871X("===> %s hisr:0x%08x ,hisr_ex:0x%08x \n",__FUNCTION__,hisr,hisr_ex);
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}
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#endif
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#ifdef CONFIG_TDLS
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#ifdef CONFIG_TDLS_CH_SW
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if (pHalData->IntArray[0] & IMR_BCNDMAINT0_88E) {
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struct tdls_ch_switch *pchsw_info = &padapter->tdlsinfo.chsw_info;
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u32 last_time = pchsw_info->cur_time;
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pchsw_info->cur_time = rtw_systime_to_ms(rtw_get_current_time());
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if ((ATOMIC_READ(&pchsw_info->chsw_on) == _TRUE) &&
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/* Sometimes we receive multiple interrupts in very little time period, use the follow condition test to filter */
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(pchsw_info->cur_time - last_time > padapter->mlmeextpriv.mlmext_info.bcn_interval - 5) &&
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(padapter->mlmeextpriv.cur_channel != rtw_get_oper_ch(padapter))) {
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if(pchsw_info->ch_sw_state & TDLS_CH_SW_INITIATOR_STATE)
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rtw_tdls_cmd(padapter, NULL, TDLS_CH_SW_BACK);
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else if(pchsw_info->delay_switch_back == _TRUE) {
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pchsw_info->delay_switch_back = _FALSE;
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rtw_tdls_cmd(padapter, NULL, TDLS_CH_SW_BACK);
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}
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}
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}
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#endif
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#endif /* CONFIG_TDLS */
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#ifdef CONFIG_LPS_LCLK
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if( pHalData->IntArray[0] & IMR_CPWM_88E )
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{
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_rtw_memcpy(&pwr_rpt.state, &(pbuf[USB_INTR_CONTENT_CPWM1_OFFSET]), 1);
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//_rtw_memcpy(&pwr_rpt.state2, &(pbuf[USB_INTR_CONTENT_CPWM2_OFFSET]), 1);
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//88e's cpwm value only change BIT0, so driver need to add PS_STATE_S2 for LPS flow.
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pwr_rpt.state |= PS_STATE_S2;
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_set_workitem(&(adapter_to_pwrctl(padapter)->cpwm_event));
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}
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#endif//CONFIG_LPS_LCLK
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#ifdef CONFIG_INTERRUPT_BASED_TXBCN
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#ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT
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if (pHalData->IntArray[0] & IMR_BCNDMAINT0_88E)
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#endif
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#ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR
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if (pHalData->IntArray[0] & (IMR_TBDER_88E|IMR_TBDOK_88E))
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#endif
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{
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struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
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#if 0
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if(pHalData->IntArray[0] & IMR_BCNDMAINT0_88E)
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DBG_8192C("%s: HISR_BCNERLY_INT\n", __func__);
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if(pHalData->IntArray[0] & IMR_TBDOK_88E)
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DBG_8192C("%s: HISR_TXBCNOK\n", __func__);
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if(pHalData->IntArray[0] & IMR_TBDER_88E)
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DBG_8192C("%s: HISR_TXBCNERR\n", __func__);
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#endif
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if(check_fwstate(pmlmepriv, WIFI_AP_STATE))
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{
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//send_beacon(padapter);
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if(pmlmepriv->update_bcn == _TRUE)
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{
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//tx_beacon_hdl(padapter, NULL);
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set_tx_beacon_cmd(padapter);
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}
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}
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#ifdef CONFIG_CONCURRENT_MODE
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if(check_buddy_fwstate(padapter, WIFI_AP_STATE))
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{
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//send_beacon(padapter);
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if(padapter->pbuddy_adapter->mlmepriv.update_bcn == _TRUE)
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{
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//tx_beacon_hdl(padapter, NULL);
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set_tx_beacon_cmd(padapter->pbuddy_adapter);
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}
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}
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#endif
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}
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#endif //CONFIG_INTERRUPT_BASED_TXBCN
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#ifdef DBG_CONFIG_ERROR_DETECT_INT
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if( pHalData->IntArray[1] & IMR_TXERR_88E )
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DBG_871X("===> %s Tx Error Flag Interrupt Status \n",__FUNCTION__);
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if( pHalData->IntArray[1] & IMR_RXERR_88E )
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DBG_871X("===> %s Rx Error Flag INT Status \n",__FUNCTION__);
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if( pHalData->IntArray[1] & IMR_TXFOVW_88E )
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DBG_871X("===> %s Transmit FIFO Overflow \n",__FUNCTION__);
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if( pHalData->IntArray[1] & IMR_RXFOVW_88E )
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DBG_871X("===> %s Receive FIFO Overflow \n",__FUNCTION__);
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#endif//DBG_CONFIG_ERROR_DETECT_INT
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// C2H Event
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if(pbuf[0]!= 0){
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_rtw_memcpy(&(pHalData->C2hArray[0]), &(pbuf[USB_INTR_CONTENT_C2H_OFFSET]), 16);
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//rtw_c2h_wk_cmd(padapter); to do..
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}
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}
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#endif
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static s32 pre_recv_entry(union recv_frame *precvframe, u8 *pphy_status)
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{
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s32 ret=_SUCCESS;
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#ifdef CONFIG_CONCURRENT_MODE
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u8 *secondary_myid, *paddr1;
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union recv_frame *precvframe_if2 = NULL;
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_adapter *primary_padapter = precvframe->u.hdr.adapter;
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_adapter *secondary_padapter = primary_padapter->pbuddy_adapter;
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struct recv_priv *precvpriv = &primary_padapter->recvpriv;
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_queue *pfree_recv_queue = &precvpriv->free_recv_queue;
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u8 *pbuf = precvframe->u.hdr.rx_data;
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if(!secondary_padapter)
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return ret;
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paddr1 = GetAddr1Ptr(pbuf);
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if(IS_MCAST(paddr1) == _FALSE)//unicast packets
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{
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secondary_myid = adapter_mac_addr(secondary_padapter);
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if(_rtw_memcmp(paddr1, secondary_myid, ETH_ALEN))
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{
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//change to secondary interface
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precvframe->u.hdr.adapter = secondary_padapter;
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}
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//ret = recv_entry(precvframe);
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}
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else // Handle BC/MC Packets
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{
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u8 clone = _TRUE;
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#if 0
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u8 type, subtype, *paddr2, *paddr3;
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type = GetFrameType(pbuf);
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subtype = GetFrameSubType(pbuf); //bit(7)~bit(2)
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switch (type)
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{
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case WIFI_MGT_TYPE: //Handle BC/MC mgnt Packets
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if(subtype == WIFI_BEACON)
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{
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paddr3 = GetAddr3Ptr(precvframe->u.hdr.rx_data);
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if (check_fwstate(&secondary_padapter->mlmepriv, _FW_LINKED) &&
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_rtw_memcmp(paddr3, get_bssid(&secondary_padapter->mlmepriv), ETH_ALEN))
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{
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//change to secondary interface
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precvframe->u.hdr.adapter = secondary_padapter;
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clone = _FALSE;
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}
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if(check_fwstate(&primary_padapter->mlmepriv, _FW_LINKED) &&
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_rtw_memcmp(paddr3, get_bssid(&primary_padapter->mlmepriv), ETH_ALEN))
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{
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if(clone==_FALSE)
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{
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clone = _TRUE;
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}
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else
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{
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clone = _FALSE;
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}
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precvframe->u.hdr.adapter = primary_padapter;
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}
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if(check_fwstate(&primary_padapter->mlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) ||
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check_fwstate(&secondary_padapter->mlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING))
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{
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clone = _TRUE;
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precvframe->u.hdr.adapter = primary_padapter;
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}
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}
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else if(subtype == WIFI_PROBEREQ)
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{
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//probe req frame is only for interface2
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//change to secondary interface
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precvframe->u.hdr.adapter = secondary_padapter;
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clone = _FALSE;
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}
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break;
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case WIFI_CTRL_TYPE: // Handle BC/MC ctrl Packets
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break;
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case WIFI_DATA_TYPE: //Handle BC/MC data Packets
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//Notes: AP MODE never rx BC/MC data packets
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paddr2 = GetAddr2Ptr(precvframe->u.hdr.rx_data);
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if(_rtw_memcmp(paddr2, get_bssid(&secondary_padapter->mlmepriv), ETH_ALEN))
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{
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//change to secondary interface
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precvframe->u.hdr.adapter = secondary_padapter;
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clone = _FALSE;
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}
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break;
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default:
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break;
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}
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#endif
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if(_TRUE == clone)
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{
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//clone/copy to if2
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struct rx_pkt_attrib *pattrib = NULL;
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precvframe_if2 = rtw_alloc_recvframe(pfree_recv_queue);
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if(precvframe_if2)
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{
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precvframe_if2->u.hdr.adapter = secondary_padapter;
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_rtw_init_listhead(&precvframe_if2->u.hdr.list);
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precvframe_if2->u.hdr.precvbuf = NULL; //can't access the precvbuf for new arch.
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precvframe_if2->u.hdr.len=0;
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_rtw_memcpy(&precvframe_if2->u.hdr.attrib, &precvframe->u.hdr.attrib, sizeof(struct rx_pkt_attrib));
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pattrib = &precvframe_if2->u.hdr.attrib;
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if(rtw_os_alloc_recvframe(secondary_padapter, precvframe_if2, pbuf, NULL) == _SUCCESS)
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{
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recvframe_put(precvframe_if2, pattrib->pkt_len);
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//recvframe_pull(precvframe_if2, drvinfo_sz + RXDESC_SIZE);
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if (pattrib->physt && pphy_status)
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rx_query_phy_status(precvframe_if2, pphy_status);
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ret = rtw_recv_entry(precvframe_if2);
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}
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else
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{
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rtw_free_recvframe(precvframe_if2, pfree_recv_queue);
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DBG_8192C("%s()-%d: alloc_skb() failed!\n", __FUNCTION__, __LINE__);
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}
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}
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}
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}
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//if (precvframe->u.hdr.attrib.physt)
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// rx_query_phy_status(precvframe, pphy_status);
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//ret = rtw_recv_entry(precvframe);
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#endif
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return ret;
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}
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int recvbuf2recvframe(PADAPTER padapter, void *ptr)
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{
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u8 *pbuf;
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u32 pkt_offset;
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s32 transfer_len;
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u8 *pphy_status = NULL;
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union recv_frame *precvframe = NULL;
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struct rx_pkt_attrib *pattrib = NULL;
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
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struct recv_priv *precvpriv = &padapter->recvpriv;
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_queue *pfree_recv_queue = &precvpriv->free_recv_queue;
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_pkt *pskb;
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#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX
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pskb = NULL;
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transfer_len = (s32)((struct recv_buf*)ptr)->transfer_len;
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pbuf = ((struct recv_buf*)ptr)->pbuf;
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#else
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pskb = (_pkt*)ptr;
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transfer_len = (s32)pskb->len;
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pbuf = pskb->data;
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#endif
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do{
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precvframe = rtw_alloc_recvframe(pfree_recv_queue);
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if(precvframe==NULL)
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{
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RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: precvframe==NULL\n"));
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DBG_8192C("%s()-%d: rtw_alloc_recvframe() failed! RX Drop!\n", __FUNCTION__, __LINE__);
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goto _exit_recvbuf2recvframe;
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}
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_rtw_init_listhead(&precvframe->u.hdr.list);
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precvframe->u.hdr.precvbuf = NULL; //can't access the precvbuf for new arch.
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precvframe->u.hdr.len=0;
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rtl8192e_query_rx_desc_status(precvframe, pbuf);
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pattrib = &precvframe->u.hdr.attrib;
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if ( (padapter->registrypriv.mp_mode == 0) && ((pattrib->crc_err) || (pattrib->icv_err)))
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{
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DBG_8192C("%s: RX Warning! crc_err=%d icv_err=%d, skip!\n", __FUNCTION__, pattrib->crc_err, pattrib->icv_err);
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rtw_free_recvframe(precvframe, pfree_recv_queue);
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goto _exit_recvbuf2recvframe;
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}
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pkt_offset = RXDESC_SIZE + pattrib->drvinfo_sz + pattrib->shift_sz + pattrib->pkt_len;
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if((pattrib->pkt_len<=0) || (pkt_offset>transfer_len))
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{
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RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("recvbuf2recvframe: pkt_len<=0\n"));
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DBG_8192C("%s()-%d: RX Warning!,pkt_len(%d)<=0 or pkt_offset(%d)> transfoer_len(%d) \n",
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__FUNCTION__, __LINE__,pattrib->pkt_len, pkt_offset,transfer_len);
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rtw_free_recvframe(precvframe, pfree_recv_queue);
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goto _exit_recvbuf2recvframe;
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}
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if(rtw_os_alloc_recvframe(padapter, precvframe,
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(pbuf + pattrib->shift_sz + pattrib->drvinfo_sz + RXDESC_SIZE), pskb) == _FAIL)
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{
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rtw_free_recvframe(precvframe, pfree_recv_queue);
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DBG_8192C("##### %s rtw_os_alloc_recvframe failed .....\n",__FUNCTION__);
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goto _exit_recvbuf2recvframe;
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}
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recvframe_put(precvframe, pattrib->pkt_len);
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//recvframe_pull(precvframe, drvinfo_sz + RXDESC_SIZE);
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if(pattrib->pkt_rpt_type == NORMAL_RX)//Normal rx packet
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{
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if(pattrib->physt)
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pphy_status = (pbuf + RXDESC_OFFSET);
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#ifdef CONFIG_CONCURRENT_MODE
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if(rtw_buddy_adapter_up(padapter))
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{
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if(pre_recv_entry(precvframe, pphy_status) != _SUCCESS)
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{
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RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,
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("recvbuf2recvframe: recv_entry(precvframe) != _SUCCESS\n"));
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}
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}
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#endif //CONFIG_CONCURRENT_MODE
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if(pattrib->physt && pphy_status)
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rx_query_phy_status(precvframe, pphy_status);
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if(rtw_recv_entry(precvframe) != _SUCCESS)
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{
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//keep quite for now
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//RT_TRACE(_module_rtl871x_recv_c_,_drv_err_, ("recvbuf2recvframe: rtw_recv_entry(precvframe) != _SUCCESS\n"));
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}
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}
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else{ // pkt_rpt_type == TX_REPORT1-CCX, TX_REPORT2-TX RTP,HIS_REPORT-USB HISR RTP
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if (pattrib->pkt_rpt_type == C2H_PACKET) {
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/*DBG_8192C("rx C2H_PACKET\n");*/
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C2HPacketHandler_8192E(padapter,precvframe->u.hdr.rx_data,pattrib->pkt_len);
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}
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#if 0
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else if(pattrib->pkt_rpt_type == HIS_REPORT)
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{
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/*DBG_8192C("%s, rx USB HISR\n", __func__);*/
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#ifdef CONFIG_SUPPORT_USB_INT
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interrupt_handler_8192eu(padapter, pattrib->pkt_len, precvframe->u.hdr.rx_data);
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#endif
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}
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#endif
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rtw_free_recvframe(precvframe, pfree_recv_queue);
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}
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#ifdef CONFIG_USB_RX_AGGREGATION
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// jaguar 8-byte alignment
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pkt_offset = (u16)_RND8(pkt_offset);
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pbuf += pkt_offset;
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#endif
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transfer_len -= pkt_offset;
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precvframe = NULL;
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}while(transfer_len>0);
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_exit_recvbuf2recvframe:
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return _SUCCESS;
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}
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void rtl8192eu_xmit_tasklet(void *priv)
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{
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int ret = _FALSE;
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_adapter *padapter = (_adapter*)priv;
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struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
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while(1)
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{
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if (RTW_CANNOT_TX(padapter))
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{
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DBG_8192C("xmit_tasklet => bDriverStopped or bSurpriseRemoved or bWritePortCancel\n");
|
|
break;
|
|
}
|
|
|
|
if (rtw_xmit_ac_blocked(padapter) == _TRUE)
|
|
break;
|
|
|
|
ret = rtl8192eu_xmitframe_complete(padapter, pxmitpriv, NULL);
|
|
|
|
if(ret==_FALSE)
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
void rtl8192eu_set_intf_ops(struct _io_ops *pops)
|
|
{
|
|
_func_enter_;
|
|
|
|
_rtw_memset((u8 *)pops, 0, sizeof(struct _io_ops));
|
|
|
|
pops->_read8 = &usb_read8;
|
|
pops->_read16 = &usb_read16;
|
|
pops->_read32 = &usb_read32;
|
|
pops->_read_mem = &usb_read_mem;
|
|
pops->_read_port = &usb_read_port;
|
|
|
|
pops->_write8 = &usb_write8;
|
|
pops->_write16 = &usb_write16;
|
|
pops->_write32 = &usb_write32;
|
|
pops->_writeN = &usb_writeN;
|
|
|
|
#ifdef CONFIG_USB_SUPPORT_ASYNC_VDN_REQ
|
|
pops->_write8_async= &usb_async_write8;
|
|
pops->_write16_async = &usb_async_write16;
|
|
pops->_write32_async = &usb_async_write32;
|
|
#endif
|
|
pops->_write_mem = &usb_write_mem;
|
|
pops->_write_port = &usb_write_port;
|
|
|
|
pops->_read_port_cancel = &usb_read_port_cancel;
|
|
pops->_write_port_cancel = &usb_write_port_cancel;
|
|
|
|
#ifdef CONFIG_USB_INTERRUPT_IN_PIPE
|
|
pops->_read_interrupt = &usb_read_interrupt;
|
|
#endif
|
|
|
|
_func_exit_;
|
|
|
|
}
|
|
|
|
void rtl8192eu_set_hw_type(struct dvobj_priv *pdvobj)
|
|
{
|
|
pdvobj->HardwareType = HARDWARE_TYPE_RTL8192EU;
|
|
DBG_871X("CHIP TYPE: RTL8192E\n");
|
|
}
|
|
|