mirror of
https://github.com/Mange/rtl8192eu-linux-driver
synced 2024-12-26 14:01:45 +00:00
1387cf623d
Version information: 20140812_rtl8192EU_linux_v4.3.1.1_11320 2014-08-12 version 4.3.1.1_11320 Source: ftp://files.dlink.com.au/products/DWA-131/REV_E/Drivers/DWA-131_Linux_driver_v4.3.1.1.zip This version does not currently work on newer kernels, but it does contain USB ID 2001:3319, which a lot of other repos in GitHub does not.
293 lines
6.0 KiB
C
293 lines
6.0 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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#ifndef __HAL_COM_PHYCFG_H__
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#define __HAL_COM_PHYCFG_H__
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#define PathA 0x0 // Useless
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#define PathB 0x1
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#define PathC 0x2
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#define PathD 0x3
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typedef enum _RATE_SECTION {
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CCK = 0,
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OFDM,
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HT_MCS0_MCS7,
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HT_MCS8_MCS15,
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HT_MCS16_MCS23,
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HT_MCS24_MCS31,
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VHT_1SSMCS0_1SSMCS9,
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VHT_2SSMCS0_2SSMCS9,
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VHT_3SSMCS0_3SSMCS9,
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VHT_4SSMCS0_4SSMCS9,
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} RATE_SECTION;
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typedef enum _RF_TX_NUM {
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RF_1TX = 0,
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RF_2TX,
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RF_3TX,
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RF_4TX,
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RF_MAX_TX_NUM,
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RF_TX_NUM_NONIMPLEMENT,
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} RF_TX_NUM;
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#define MAX_POWER_INDEX 0x3F
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typedef enum _REGULATION_TXPWR_LMT {
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TXPWR_LMT_FCC = 0,
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TXPWR_LMT_MKK = 1,
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TXPWR_LMT_ETSI = 2,
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TXPWR_LMT_WW = 3,
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TXPWR_LMT_MAX_REGULATION_NUM = 4
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} REGULATION_TXPWR_LMT;
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/*------------------------------Define structure----------------------------*/
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typedef struct _BB_REGISTER_DEFINITION{
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u32 rfintfs; // set software control:
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// 0x870~0x877[8 bytes]
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u32 rfintfo; // output data:
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// 0x860~0x86f [16 bytes]
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u32 rfintfe; // output enable:
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// 0x860~0x86f [16 bytes]
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u32 rf3wireOffset; // LSSI data:
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// 0x840~0x84f [16 bytes]
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u32 rfHSSIPara2; // wire parameter control2 :
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// 0x824~0x827,0x82c~0x82f, 0x834~0x837, 0x83c~0x83f [16 bytes]
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u32 rfLSSIReadBack; //LSSI RF readback data SI mode
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// 0x8a0~0x8af [16 bytes]
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u32 rfLSSIReadBackPi; //LSSI RF readback data PI mode 0x8b8-8bc for Path A and B
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}BB_REGISTER_DEFINITION_T, *PBB_REGISTER_DEFINITION_T;
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//----------------------------------------------------------------------
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s32
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phy_TxPwrIdxToDbm(
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IN PADAPTER Adapter,
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IN WIRELESS_MODE WirelessMode,
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IN u8 TxPwrIdx
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);
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u8
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PHY_GetTxPowerByRateBase(
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IN PADAPTER Adapter,
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IN u8 Band,
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IN u8 RfPath,
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IN u8 TxNum,
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IN RATE_SECTION RateSection
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);
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u8
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PHY_GetRateSectionIndexOfTxPowerByRate(
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IN PADAPTER pAdapter,
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IN u32 RegAddr,
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IN u32 BitMask
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);
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VOID
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PHY_GetRateValuesOfTxPowerByRate(
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IN PADAPTER pAdapter,
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IN u32 RegAddr,
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IN u32 BitMask,
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IN u32 Value,
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OUT u8* RateIndex,
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OUT s8* PwrByRateVal,
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OUT u8* RateNum
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);
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u8
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PHY_GetRateIndexOfTxPowerByRate(
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IN u8 Rate
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);
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VOID
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PHY_SetTxPowerIndexByRateSection(
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IN PADAPTER pAdapter,
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IN u8 RFPath,
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IN u8 Channel,
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IN u8 RateSection
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);
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s8
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PHY_GetTxPowerByRate(
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IN PADAPTER pAdapter,
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IN u8 Band,
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IN u8 RFPath,
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IN u8 TxNum,
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IN u8 RateIndex
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);
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VOID
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PHY_SetTxPowerByRate(
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IN PADAPTER pAdapter,
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IN u8 Band,
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IN u8 RFPath,
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IN u8 TxNum,
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IN u8 Rate,
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IN s8 Value
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);
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VOID
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PHY_SetTxPowerLevelByPath(
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IN PADAPTER Adapter,
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IN u8 channel,
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IN u8 path
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);
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VOID
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PHY_SetTxPowerIndexByRateArray(
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IN PADAPTER pAdapter,
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IN u8 RFPath,
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IN CHANNEL_WIDTH BandWidth,
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IN u8 Channel,
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IN u8* Rates,
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IN u8 RateArraySize
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);
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VOID
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PHY_InitTxPowerByRate(
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IN PADAPTER pAdapter
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);
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VOID
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PHY_StoreTxPowerByRate(
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IN PADAPTER pAdapter,
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IN u32 Band,
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IN u32 RfPath,
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IN u32 TxNum,
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IN u32 RegAddr,
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IN u32 BitMask,
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IN u32 Data
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);
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VOID
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PHY_TxPowerByRateConfiguration(
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IN PADAPTER pAdapter
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);
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u8
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PHY_GetTxPowerIndexBase(
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IN PADAPTER pAdapter,
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IN u8 RFPath,
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IN u8 Rate,
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IN CHANNEL_WIDTH BandWidth,
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IN u8 Channel,
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OUT PBOOLEAN bIn24G
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);
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s8
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PHY_GetTxPowerLimit(
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IN PADAPTER Adapter,
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IN u32 RegPwrTblSel,
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IN BAND_TYPE Band,
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IN CHANNEL_WIDTH Bandwidth,
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IN u8 RfPath,
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IN u8 DataRate,
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IN u8 Channel
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);
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VOID
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PHY_SetTxPowerLimit(
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IN PADAPTER Adapter,
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IN u8 *Regulation,
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IN u8 *Band,
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IN u8 *Bandwidth,
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IN u8 *RateSection,
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IN u8 *RfPath,
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IN u8 *Channel,
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IN u8 *PowerLimit
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);
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VOID
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PHY_ConvertTxPowerLimitToPowerIndex(
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IN PADAPTER Adapter
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);
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VOID
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PHY_InitTxPowerLimit(
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IN PADAPTER Adapter
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);
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s8
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PHY_GetTxPowerTrackingOffset(
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PADAPTER pAdapter,
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u8 Rate,
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u8 RFPath
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);
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u8
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PHY_GetTxPowerIndex(
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IN PADAPTER pAdapter,
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IN u8 RFPath,
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IN u8 Rate,
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IN CHANNEL_WIDTH BandWidth,
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IN u8 Channel
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);
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VOID
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PHY_SetTxPowerIndex(
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IN PADAPTER pAdapter,
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IN u32 PowerIndex,
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IN u8 RFPath,
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IN u8 Rate
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);
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VOID
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Hal_ChannelPlanToRegulation(
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IN PADAPTER Adapter,
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IN u16 ChannelPlan
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);
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#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
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#define MAX_PARA_FILE_BUF_LEN 25600
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#define LOAD_MAC_PARA_FILE BIT0
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#define LOAD_BB_PARA_FILE BIT1
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#define LOAD_BB_PG_PARA_FILE BIT2
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#define LOAD_BB_MP_PARA_FILE BIT3
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#define LOAD_RF_PARA_FILE BIT4
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#define LOAD_RF_TXPWR_TRACK_PARA_FILE BIT5
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#define LOAD_RF_TXPWR_LMT_PARA_FILE BIT6
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int phy_ConfigMACWithParaFile(IN PADAPTER Adapter, IN char* pFileName);
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int phy_ConfigBBWithParaFile(IN PADAPTER Adapter, IN char* pFileName, IN u32 ConfigType);
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int phy_ConfigBBWithPgParaFile(IN PADAPTER Adapter, IN char* pFileName);
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int phy_ConfigBBWithMpParaFile(IN PADAPTER Adapter, IN char* pFileName);
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int PHY_ConfigRFWithParaFile(IN PADAPTER Adapter, IN char* pFileName, IN u8 eRFPath);
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int PHY_ConfigRFWithTxPwrTrackParaFile(IN PADAPTER Adapter, IN char* pFileName);
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int PHY_ConfigRFWithPowerLimitTableParaFile(IN PADAPTER Adapter, IN char* pFileName);
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#endif
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void phy_free_filebuf(_adapter *padapter);
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#endif //__HAL_COMMON_H__
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