mirror of
https://github.com/Mange/rtl8192eu-linux-driver
synced 2024-11-01 11:15:31 +00:00
1387cf623d
Version information: 20140812_rtl8192EU_linux_v4.3.1.1_11320 2014-08-12 version 4.3.1.1_11320 Source: ftp://files.dlink.com.au/products/DWA-131/REV_E/Drivers/DWA-131_Linux_driver_v4.3.1.1.zip This version does not currently work on newer kernels, but it does contain USB ID 2001:3319, which a lot of other repos in GitHub does not.
96 lines
2.5 KiB
C
96 lines
2.5 KiB
C
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/*++
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Copyright (c) Realtek Semiconductor Corp. All rights reserved.
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Module Name:
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Hal8192EPwrSeq.c
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Abstract:
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This file includes all kinds of Power Action event for RTL8192E and corresponding hardware configurtions which are released from HW SD.
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Major Change History:
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When Who What
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---------- --------------- -------------------------------
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2011-08-08 Roger Create.
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--*/
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//#include "Mp_Precomp.h"
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#include "Hal8192EPwrSeq.h"
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/*
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drivers should parse below arrays and do the corresponding actions
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*/
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//3 Power on Array
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WLAN_PWR_CFG rtl8192E_power_on_flow[RTL8192E_TRANS_CARDEMU_TO_ACT_STEPS+RTL8192E_TRANS_END_STEPS]=
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{
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RTL8192E_TRANS_CARDEMU_TO_ACT
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RTL8192E_TRANS_END
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};
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//3Radio off GPIO Array
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WLAN_PWR_CFG rtl8192E_radio_off_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192E_TRANS_END_STEPS]=
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{
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RTL8192E_TRANS_ACT_TO_CARDEMU
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RTL8192E_TRANS_END
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};
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//3Card Disable Array
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WLAN_PWR_CFG rtl8192E_card_disable_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8192E_TRANS_END_STEPS]=
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{
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RTL8192E_TRANS_ACT_TO_CARDEMU
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RTL8192E_TRANS_CARDEMU_TO_CARDDIS
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RTL8192E_TRANS_END
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};
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//3 Card Enable Array
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WLAN_PWR_CFG rtl8192E_card_enable_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8192E_TRANS_END_STEPS]=
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{
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RTL8192E_TRANS_CARDDIS_TO_CARDEMU
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RTL8192E_TRANS_CARDEMU_TO_ACT
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RTL8192E_TRANS_END
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};
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//3Suspend Array
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WLAN_PWR_CFG rtl8192E_suspend_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192E_TRANS_CARDEMU_TO_SUS_STEPS+RTL8192E_TRANS_END_STEPS]=
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{
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RTL8192E_TRANS_ACT_TO_CARDEMU
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RTL8192E_TRANS_CARDEMU_TO_SUS
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RTL8192E_TRANS_END
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};
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//3 Resume Array
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WLAN_PWR_CFG rtl8192E_resume_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192E_TRANS_CARDEMU_TO_SUS_STEPS+RTL8192E_TRANS_END_STEPS]=
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{
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RTL8192E_TRANS_SUS_TO_CARDEMU
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RTL8192E_TRANS_CARDEMU_TO_ACT
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RTL8192E_TRANS_END
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};
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//3HWPDN Array
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WLAN_PWR_CFG rtl8192E_hwpdn_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8192E_TRANS_END_STEPS]=
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{
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RTL8192E_TRANS_ACT_TO_CARDEMU
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RTL8192E_TRANS_CARDEMU_TO_PDN
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RTL8192E_TRANS_END
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};
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//3 Enter LPS
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WLAN_PWR_CFG rtl8192E_enter_lps_flow[RTL8192E_TRANS_ACT_TO_LPS_STEPS+RTL8192E_TRANS_END_STEPS]=
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{
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//FW behavior
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RTL8192E_TRANS_ACT_TO_LPS
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RTL8192E_TRANS_END
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};
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//3 Leave LPS
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WLAN_PWR_CFG rtl8192E_leave_lps_flow[RTL8192E_TRANS_LPS_TO_ACT_STEPS+RTL8192E_TRANS_END_STEPS]=
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{
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//FW behavior
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RTL8192E_TRANS_LPS_TO_ACT
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RTL8192E_TRANS_END
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};
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