mirror of
https://github.com/Mange/rtl8192eu-linux-driver
synced 2024-11-01 11:15:31 +00:00
634 lines
20 KiB
C
634 lines
20 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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//============================================================
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// include files
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//============================================================
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#include "mp_precomp.h"
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#include "phydm_precomp.h"
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VOID
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odm_DynamicTxPowerInit(
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IN PVOID pDM_VOID
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)
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{
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PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
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#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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PADAPTER Adapter = pDM_Odm->Adapter;
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PMGNT_INFO pMgntInfo = &Adapter->MgntInfo;
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
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#if DEV_BUS_TYPE==RT_USB_INTERFACE
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if(RT_GetInterfaceSelection(Adapter) == INTF_SEL1_USB_High_Power)
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{
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odm_DynamicTxPowerSavePowerIndex(pDM_Odm);
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pMgntInfo->bDynamicTxPowerEnable = TRUE;
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}
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else
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#else
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//so 92c pci do not need dynamic tx power? vivi check it later
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if(IS_HARDWARE_TYPE_8192D(Adapter))
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pMgntInfo->bDynamicTxPowerEnable = TRUE;
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else
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pMgntInfo->bDynamicTxPowerEnable = FALSE;
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#endif
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pHalData->LastDTPLvl = TxHighPwrLevel_Normal;
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pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
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#endif
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}
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VOID
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odm_DynamicTxPowerSavePowerIndex(
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IN PVOID pDM_VOID
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)
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{
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PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
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#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN))
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u1Byte index;
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u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a};
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#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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PADAPTER Adapter = pDM_Odm->Adapter;
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
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for(index = 0; index< 6; index++)
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pHalData->PowerIndex_backup[index] = PlatformEFIORead1Byte(Adapter, Power_Index_REG[index]);
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#endif
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#endif
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}
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VOID
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odm_DynamicTxPowerRestorePowerIndex(
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IN PVOID pDM_VOID
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)
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{
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PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
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#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN))
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u1Byte index;
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PADAPTER Adapter = pDM_Odm->Adapter;
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
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u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a};
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#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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for(index = 0; index< 6; index++)
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PlatformEFIOWrite1Byte(Adapter, Power_Index_REG[index], pHalData->PowerIndex_backup[index]);
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#endif
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#endif
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}
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VOID
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odm_DynamicTxPowerWritePowerIndex(
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IN PVOID pDM_VOID,
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IN u1Byte Value)
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{
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PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
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u1Byte index;
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u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a};
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for(index = 0; index< 6; index++)
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//PlatformEFIOWrite1Byte(Adapter, Power_Index_REG[index], Value);
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ODM_Write1Byte(pDM_Odm, Power_Index_REG[index], Value);
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}
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VOID
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odm_DynamicTxPower(
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IN PVOID pDM_VOID
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)
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{
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//
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// For AP/ADSL use prtl8192cd_priv
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// For CE/NIC use PADAPTER
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//
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//PADAPTER pAdapter = pDM_Odm->Adapter;
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// prtl8192cd_priv priv = pDM_Odm->priv;
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PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
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if (!(pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_TXPWR))
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return;
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//
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// 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate
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// at the same time. In the stage2/3, we need to prive universal interface and merge all
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// HW dynamic mechanism.
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//
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switch (pDM_Odm->SupportPlatform)
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{
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case ODM_WIN:
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case ODM_CE:
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odm_DynamicTxPowerNIC(pDM_Odm);
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break;
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case ODM_AP:
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odm_DynamicTxPowerAP(pDM_Odm);
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break;
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case ODM_ADSL:
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//odm_DIGAP(pDM_Odm);
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break;
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}
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}
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VOID
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odm_DynamicTxPowerNIC(
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IN PVOID pDM_VOID
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)
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{
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PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
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if (!(pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_TXPWR))
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return;
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#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
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if(pDM_Odm->SupportICType == ODM_RTL8192C)
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{
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odm_DynamicTxPower_92C(pDM_Odm);
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}
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else if(pDM_Odm->SupportICType == ODM_RTL8192D)
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{
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odm_DynamicTxPower_92D(pDM_Odm);
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}
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else if (pDM_Odm->SupportICType == ODM_RTL8821)
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{
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#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
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PADAPTER Adapter = pDM_Odm->Adapter;
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PMGNT_INFO pMgntInfo = GetDefaultMgntInfo(Adapter);
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if (pMgntInfo->RegRspPwr == 1)
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{
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if(pDM_Odm->RSSI_Min > 60)
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{
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ODM_SetMACReg(pDM_Odm, ODM_REG_RESP_TX_11AC, BIT20|BIT19|BIT18, 1); // Resp TXAGC offset = -3dB
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}
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else if(pDM_Odm->RSSI_Min < 55)
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{
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ODM_SetMACReg(pDM_Odm, ODM_REG_RESP_TX_11AC, BIT20|BIT19|BIT18, 0); // Resp TXAGC offset = 0dB
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}
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}
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#endif
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}
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#endif
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}
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VOID
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odm_DynamicTxPowerAP(
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IN PVOID pDM_VOID
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)
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{
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PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
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#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
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//#if ((RTL8192C_SUPPORT==1) || (RTL8192D_SUPPORT==1) || (RTL8188E_SUPPORT==1) || (RTL8812E_SUPPORT==1))
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prtl8192cd_priv priv = pDM_Odm->priv;
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s4Byte i;
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s2Byte pwr_thd = TX_POWER_NEAR_FIELD_THRESH_AP;
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if(!priv->pshare->rf_ft_var.tx_pwr_ctrl)
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return;
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#if ((RTL8812E_SUPPORT==1) || (RTL8881A_SUPPORT==1) || (RTL8814A_SUPPORT==1))
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if (pDM_Odm->SupportICType & (ODM_RTL8812 | ODM_RTL8881A | ODM_RTL8814A))
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pwr_thd = TX_POWER_NEAR_FIELD_THRESH_8812;
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#endif
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#if defined(CONFIG_RTL_92D_SUPPORT) || defined(CONFIG_RTL_92C_SUPPORT)
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if(CHIP_VER_92X_SERIES(priv))
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{
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#ifdef HIGH_POWER_EXT_PA
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if(pDM_Odm->ExtPA)
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tx_power_control(priv);
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#endif
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}
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#endif
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/*
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* Check if station is near by to use lower tx power
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*/
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if ((priv->up_time % 3) == 0 ) {
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int disable_pwr_ctrl = ((pDM_Odm->FalseAlmCnt.Cnt_all > 1000 ) || ((pDM_Odm->FalseAlmCnt.Cnt_all > 300 ) && ((RTL_R8(0xc50) & 0x7f) >= 0x32))) ? 1 : 0;
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for(i=0; i<ODM_ASSOCIATE_ENTRY_NUM; i++){
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PSTA_INFO_T pstat = pDM_Odm->pODM_StaInfo[i];
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if(IS_STA_VALID(pstat) ) {
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if(disable_pwr_ctrl)
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pstat->hp_level = 0;
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else if ((pstat->hp_level == 0) && (pstat->rssi > pwr_thd))
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pstat->hp_level = 1;
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else if ((pstat->hp_level == 1) && (pstat->rssi < (pwr_thd-8)))
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pstat->hp_level = 0;
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}
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}
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#if defined(CONFIG_WLAN_HAL_8192EE)
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if (GET_CHIP_VER(priv) == VERSION_8192E) {
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if( !disable_pwr_ctrl && (pDM_Odm->RSSI_Min != 0xff) ) {
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if(pDM_Odm->RSSI_Min > pwr_thd)
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RRSR_power_control_11n(priv, 1 );
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else if(pDM_Odm->RSSI_Min < (pwr_thd-8))
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RRSR_power_control_11n(priv, 0 );
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} else {
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RRSR_power_control_11n(priv, 0 );
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}
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}
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#endif
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#ifdef CONFIG_WLAN_HAL_8814AE
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if (GET_CHIP_VER(priv) == VERSION_8814A) {
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if (!disable_pwr_ctrl && (pDM_Odm->RSSI_Min != 0xff)) {
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if (pDM_Odm->RSSI_Min > pwr_thd)
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RRSR_power_control_14(priv, 1);
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else if (pDM_Odm->RSSI_Min < (pwr_thd-8))
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RRSR_power_control_14(priv, 0);
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} else {
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RRSR_power_control_14(priv, 0);
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}
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}
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#endif
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}
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//#endif
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#endif
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}
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VOID
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odm_DynamicTxPower_92C(
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IN PVOID pDM_VOID
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)
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{
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PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
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#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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PADAPTER Adapter = pDM_Odm->Adapter;
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PMGNT_INFO pMgntInfo = &Adapter->MgntInfo;
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
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s4Byte UndecoratedSmoothedPWDB;
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// 2012/01/12 MH According to Luke's suggestion, only high power will support the feature.
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if (pDM_Odm->ExtPA == FALSE)
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return;
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// STA not connected and AP not connected
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if((!pMgntInfo->bMediaConnect) &&
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(pHalData->EntryMinUndecoratedSmoothedPWDB == 0))
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{
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("Not connected to any \n"));
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pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
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//the LastDTPlvl should reset when disconnect,
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//otherwise the tx power level wouldn't change when disconnect and connect again.
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// Maddest 20091220.
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pHalData->LastDTPLvl=TxHighPwrLevel_Normal;
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return;
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}
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#if (INTEL_PROXIMITY_SUPPORT == 1)
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// Intel set fixed tx power
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if(pMgntInfo->IntelProximityModeInfo.PowerOutput > 0)
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{
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switch(pMgntInfo->IntelProximityModeInfo.PowerOutput){
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case 1:
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pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_100;
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_100\n"));
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break;
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case 2:
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pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_70;
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_70\n"));
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break;
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case 3:
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pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_50;
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_50\n"));
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break;
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case 4:
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pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_35;
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_35\n"));
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break;
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case 5:
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pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_15;
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_15\n"));
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break;
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default:
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pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_100;
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_100\n"));
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break;
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}
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}
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else
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#endif
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{
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if( (pMgntInfo->bDynamicTxPowerEnable != TRUE) ||
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pMgntInfo->IOTAction & HT_IOT_ACT_DISABLE_HIGH_POWER)
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{
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pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
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}
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else
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{
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if(pMgntInfo->bMediaConnect) // Default port
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{
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if(ACTING_AS_AP(Adapter) || ACTING_AS_IBSS(Adapter))
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{
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UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB;
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("AP Client PWDB = 0x%x \n", UndecoratedSmoothedPWDB));
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}
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else
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{
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UndecoratedSmoothedPWDB = pHalData->UndecoratedSmoothedPWDB;
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB));
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}
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}
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else // associated entry pwdb
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{
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UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB;
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB));
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}
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if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2)
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{
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pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2;
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n"));
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}
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else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) &&
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(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) )
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{
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pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1;
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n"));
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}
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else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5))
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{
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pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n"));
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}
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}
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}
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if( pHalData->DynamicTxHighPowerLvl != pHalData->LastDTPLvl )
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{
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("PHY_SetTxPowerLevel8192C() Channel = %d \n" , pHalData->CurrentChannel));
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PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel);
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if( (pHalData->DynamicTxHighPowerLvl == TxHighPwrLevel_Normal) &&
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(pHalData->LastDTPLvl == TxHighPwrLevel_Level1 || pHalData->LastDTPLvl == TxHighPwrLevel_Level2)) //TxHighPwrLevel_Normal
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odm_DynamicTxPowerRestorePowerIndex(pDM_Odm);
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else if(pHalData->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1)
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odm_DynamicTxPowerWritePowerIndex(pDM_Odm, 0x14);
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else if(pHalData->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2)
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odm_DynamicTxPowerWritePowerIndex(pDM_Odm, 0x10);
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}
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pHalData->LastDTPLvl = pHalData->DynamicTxHighPowerLvl;
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#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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}
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VOID
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odm_DynamicTxPower_92D(
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IN PVOID pDM_VOID
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)
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{
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#if (RTL8192D_SUPPORT==1)
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PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
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#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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PADAPTER Adapter = pDM_Odm->Adapter;
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PMGNT_INFO pMgntInfo = &Adapter->MgntInfo;
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
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s4Byte UndecoratedSmoothedPWDB;
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PADAPTER BuddyAdapter = Adapter->BuddyAdapter;
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BOOLEAN bGetValueFromBuddyAdapter = dm_DualMacGetParameterFromBuddyAdapter(Adapter);
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u1Byte HighPowerLvlBackForMac0 = TxHighPwrLevel_Level1;
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// 2012/01/12 MH According to Luke's suggestion, only high power will support the feature.
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if (pDM_Odm->ExtPA == FALSE)
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return;
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// If dynamic high power is disabled.
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if( (pMgntInfo->bDynamicTxPowerEnable != TRUE) ||
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pMgntInfo->IOTAction & HT_IOT_ACT_DISABLE_HIGH_POWER)
|
|
{
|
|
pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
|
|
return;
|
|
}
|
|
|
|
// STA not connected and AP not connected
|
|
if((!pMgntInfo->bMediaConnect) &&
|
|
(pHalData->EntryMinUndecoratedSmoothedPWDB == 0))
|
|
{
|
|
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("Not connected to any \n"));
|
|
pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
|
|
|
|
//the LastDTPlvl should reset when disconnect,
|
|
//otherwise the tx power level wouldn't change when disconnect and connect again.
|
|
// Maddest 20091220.
|
|
pHalData->LastDTPLvl=TxHighPwrLevel_Normal;
|
|
return;
|
|
}
|
|
|
|
if(pMgntInfo->bMediaConnect) // Default port
|
|
{
|
|
if(ACTING_AS_AP(Adapter) || pMgntInfo->mIbss)
|
|
{
|
|
UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB;
|
|
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("AP Client PWDB = 0x%x \n", UndecoratedSmoothedPWDB));
|
|
}
|
|
else
|
|
{
|
|
UndecoratedSmoothedPWDB = pHalData->UndecoratedSmoothedPWDB;
|
|
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB));
|
|
}
|
|
}
|
|
else // associated entry pwdb
|
|
{
|
|
UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB;
|
|
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB));
|
|
}
|
|
|
|
if(IS_HARDWARE_TYPE_8192D(Adapter) && GET_HAL_DATA(Adapter)->CurrentBandType == 1){
|
|
if(UndecoratedSmoothedPWDB >= 0x33)
|
|
{
|
|
pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2;
|
|
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Level2 (TxPwr=0x0)\n"));
|
|
}
|
|
else if((UndecoratedSmoothedPWDB <0x33) &&
|
|
(UndecoratedSmoothedPWDB >= 0x2b) )
|
|
{
|
|
pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1;
|
|
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Level1 (TxPwr=0x10)\n"));
|
|
}
|
|
else if(UndecoratedSmoothedPWDB < 0x2b)
|
|
{
|
|
pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
|
|
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Normal\n"));
|
|
}
|
|
|
|
}
|
|
else
|
|
|
|
{
|
|
if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2)
|
|
{
|
|
pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1;
|
|
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n"));
|
|
}
|
|
else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) &&
|
|
(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) )
|
|
{
|
|
pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1;
|
|
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n"));
|
|
}
|
|
else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5))
|
|
{
|
|
pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
|
|
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n"));
|
|
}
|
|
|
|
}
|
|
|
|
//sherry delete flag 20110517
|
|
if(bGetValueFromBuddyAdapter)
|
|
{
|
|
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() mac 0 for mac 1 \n"));
|
|
if(Adapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP)
|
|
{
|
|
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() change value \n"));
|
|
HighPowerLvlBackForMac0 = pHalData->DynamicTxHighPowerLvl;
|
|
pHalData->DynamicTxHighPowerLvl = Adapter->DualMacDMSPControl.CurTxHighLvlForAnotherMacOfDMSP;
|
|
PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel);
|
|
pHalData->DynamicTxHighPowerLvl = HighPowerLvlBackForMac0;
|
|
Adapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP = FALSE;
|
|
}
|
|
}
|
|
|
|
if( (pHalData->DynamicTxHighPowerLvl != pHalData->LastDTPLvl) )
|
|
{
|
|
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("PHY_SetTxPowerLevel8192S() Channel = %d \n" , pHalData->CurrentChannel));
|
|
if(Adapter->DualMacSmartConcurrent == TRUE)
|
|
{
|
|
if(BuddyAdapter == NULL)
|
|
{
|
|
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter == NULL case \n"));
|
|
if(!Adapter->bSlaveOfDMSP)
|
|
{
|
|
PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel);
|
|
}
|
|
}
|
|
else
|
|
{
|
|
if(pHalData->MacPhyMode92D == DUALMAC_SINGLEPHY)
|
|
{
|
|
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter DMSP \n"));
|
|
if(Adapter->bSlaveOfDMSP)
|
|
{
|
|
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() bslave case \n"));
|
|
BuddyAdapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP = TRUE;
|
|
BuddyAdapter->DualMacDMSPControl.CurTxHighLvlForAnotherMacOfDMSP = pHalData->DynamicTxHighPowerLvl;
|
|
}
|
|
else
|
|
{
|
|
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() master case \n"));
|
|
if(!bGetValueFromBuddyAdapter)
|
|
{
|
|
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() mac 0 for mac 0 \n"));
|
|
PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel);
|
|
}
|
|
}
|
|
}
|
|
else
|
|
{
|
|
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter DMDP\n"));
|
|
PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel);
|
|
}
|
|
}
|
|
}
|
|
else
|
|
{
|
|
PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel);
|
|
}
|
|
|
|
}
|
|
pHalData->LastDTPLvl = pHalData->DynamicTxHighPowerLvl;
|
|
|
|
|
|
#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
|
#endif
|
|
}
|
|
|
|
VOID
|
|
odm_DynamicTxPower_8821(
|
|
IN PVOID pDM_VOID,
|
|
IN pu1Byte pDesc,
|
|
IN u1Byte macId
|
|
)
|
|
{
|
|
#if (RTL8821A_SUPPORT == 1)
|
|
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
|
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
|
PSTA_INFO_T pEntry;
|
|
u1Byte reg0xc56_byte;
|
|
u1Byte reg0xe56_byte;
|
|
u1Byte txpwr_offset = 0;
|
|
|
|
pEntry = pDM_Odm->pODM_StaInfo[macId];
|
|
|
|
reg0xc56_byte = ODM_Read1Byte(pDM_Odm, 0xc56);
|
|
|
|
ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("reg0xc56_byte=%d\n", reg0xc56_byte));
|
|
|
|
if (pEntry[macId].rssi_stat.UndecoratedSmoothedPWDB > 85) {
|
|
|
|
/* Avoid TXAGC error after TX power offset is applied.
|
|
For example: Reg0xc56=0x6, if txpwr_offset=3( reduce 11dB )
|
|
Total power = 6-11= -5( overflow!! ), PA may be burned !
|
|
so txpwr_offset should be adjusted by Reg0xc56*/
|
|
|
|
if (reg0xc56_byte < 7)
|
|
txpwr_offset = 1;
|
|
else if (reg0xc56_byte < 11)
|
|
txpwr_offset = 2;
|
|
else
|
|
txpwr_offset = 3;
|
|
|
|
SET_TX_DESC_TX_POWER_OFFSET_8812(pDesc, txpwr_offset);
|
|
ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("odm_DynamicTxPower_8821: RSSI=%d, txpwr_offset=%d\n", pEntry[macId].rssi_stat.UndecoratedSmoothedPWDB, txpwr_offset));
|
|
|
|
} else{
|
|
SET_TX_DESC_TX_POWER_OFFSET_8812(pDesc, txpwr_offset);
|
|
ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("odm_DynamicTxPower_8821: RSSI=%d, txpwr_offset=%d\n", pEntry[macId].rssi_stat.UndecoratedSmoothedPWDB, txpwr_offset));
|
|
|
|
}
|
|
#endif /*#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/
|
|
#endif /*#if (RTL8821A_SUPPORT==1)*/
|
|
}
|
|
|