mirror of
https://github.com/Mange/rtl8192eu-linux-driver
synced 2024-11-01 19:25:31 +00:00
1387cf623d
Version information: 20140812_rtl8192EU_linux_v4.3.1.1_11320 2014-08-12 version 4.3.1.1_11320 Source: ftp://files.dlink.com.au/products/DWA-131/REV_E/Drivers/DWA-131_Linux_driver_v4.3.1.1.zip This version does not currently work on newer kernels, but it does contain USB ID 2001:3319, which a lot of other repos in GitHub does not.
217 lines
6.8 KiB
C
217 lines
6.8 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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#define _RTL8192E_RF6052_C_
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//#include <drv_types.h>
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#include <rtl8192e_hal.h>
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/*-----------------------------------------------------------------------------
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* Function: PHY_RF6052SetBandwidth()
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*
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* Overview: This function is called by SetBWModeCallback8190Pci() only
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*
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* Input: PADAPTER Adapter
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* WIRELESS_BANDWIDTH_E Bandwidth //20M or 40M
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*
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* Output: NONE
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*
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* Return: NONE
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*
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* Note: For RF type 0222D
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*---------------------------------------------------------------------------*/
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VOID
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PHY_RF6052SetBandwidth8192E(
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IN PADAPTER Adapter,
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IN CHANNEL_WIDTH Bandwidth) //20M or 40M
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{
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
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switch(Bandwidth)
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{
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case CHANNEL_WIDTH_20:
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//RT_DISP(FIOCTL, IOCTL_STATE, ("PHY_RF6052SetBandwidth8192E(), set 20MHz, pHalData->RfRegChnlVal[0] = 0x%x \n", pHalData->RfRegChnlVal[0]));
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pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT10 | BIT11 );
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PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);
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PHY_SetRFReg(Adapter, RF_PATH_B, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);
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break;
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case CHANNEL_WIDTH_40:
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//RT_DISP(FIOCTL, IOCTL_STATE, ("PHY_RF6052SetBandwidth8192E(), set 40MHz, pHalData->RfRegChnlVal[0] = 0x%x \n", pHalData->RfRegChnlVal[0]));
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pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT10 );
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PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);
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PHY_SetRFReg(Adapter, RF_PATH_B, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);
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break;
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default:
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//RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_RF6052SetBandwidth8192E(): unknown Bandwidth: %#X\n",Bandwidth ));
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break;
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}
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}
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static int
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phy_RF6052_Config_ParaFile_8192E(
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IN PADAPTER Adapter
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)
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{
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u8 eRFPath;
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int rtStatus = _SUCCESS;
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
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BB_REGISTER_DEFINITION_T *pPhyReg;
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static char sz8192ERadioAFile[] = RTL8192E_PHY_RADIO_A;
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static char sz8192ERadioBFile[] = RTL8192E_PHY_RADIO_B;
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static char sz8192ETxPwrTrack[] = RTL8192E_TXPWR_TRACK;
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char *pszRadioAFile = NULL, *pszRadioBFile = NULL, *pszTxPwrTrack = NULL;
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u32 u4RegValue,MaskforPhySet = 0;;
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pszRadioAFile = sz8192ERadioAFile;
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pszRadioBFile = sz8192ERadioBFile;
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pszTxPwrTrack = sz8192ETxPwrTrack;
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//3//-----------------------------------------------------------------
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//3// <2> Initialize RF
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//3//-----------------------------------------------------------------
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//for(eRFPath = RF_PATH_A; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
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for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
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{
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pPhyReg = &pHalData->PHYRegDef[eRFPath];
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switch(eRFPath)
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{
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case RF_PATH_A:
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case RF_PATH_C:
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u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs|MaskforPhySet, bRFSI_RFENV);
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break;
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case RF_PATH_B :
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case RF_PATH_D:
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u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs|MaskforPhySet, bRFSI_RFENV<<16);
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break;
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default:
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u4RegValue = 0;
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break;
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}
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/*----Set RF_ENV enable----*/
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PHY_SetBBReg(Adapter, pPhyReg->rfintfe|MaskforPhySet, bRFSI_RFENV<<16, 0x1);
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rtw_udelay_os(1);//PlatformStallExecution(1);
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/*----Set RF_ENV output high----*/
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PHY_SetBBReg(Adapter, pPhyReg->rfintfo|MaskforPhySet, bRFSI_RFENV, 0x1);
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rtw_udelay_os(1);//PlatformStallExecution(1);
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/* Set bit number of Address and Data for RF register */
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PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2|MaskforPhySet, b3WireAddressLength, 0x0); // Set 1 to 4 bits for 8255
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rtw_udelay_os(1);//PlatformStallExecution(1);
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PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2|MaskforPhySet, b3WireDataLength, 0x0); // Set 0 to 12 bits for 8255
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rtw_udelay_os(1);//PlatformStallExecution(1);
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/*----Initialize RF fom connfiguration file----*/
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switch(eRFPath)
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{
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case RF_PATH_A:
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#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
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if (PHY_ConfigRFWithParaFile(Adapter, pszRadioAFile, eRFPath) == _FAIL)
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#endif
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{
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#ifdef CONFIG_EMBEDDED_FWIMG
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if(HAL_STATUS_FAILURE ==ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv,CONFIG_RF_RADIO, (ODM_RF_RADIO_PATH_E)eRFPath))
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rtStatus = _FAIL;
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#endif
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}
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break;
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case RF_PATH_B:
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#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
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if (PHY_ConfigRFWithParaFile(Adapter, pszRadioBFile, eRFPath) == _FAIL)
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#endif
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{
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#ifdef CONFIG_EMBEDDED_FWIMG
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if(HAL_STATUS_FAILURE ==ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv,CONFIG_RF_RADIO, (ODM_RF_RADIO_PATH_E)eRFPath))
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rtStatus = _FAIL;
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#endif
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}
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break;
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default:
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break;
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}
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/*----Restore RFENV control type----*/;
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switch(eRFPath)
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{
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case RF_PATH_A:
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case RF_PATH_C:
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PHY_SetBBReg(Adapter, pPhyReg->rfintfs|MaskforPhySet, bRFSI_RFENV, u4RegValue);
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break;
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case RF_PATH_B :
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case RF_PATH_D:
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PHY_SetBBReg(Adapter, pPhyReg->rfintfs|MaskforPhySet, bRFSI_RFENV<<16, u4RegValue);
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break;
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default:
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break;
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}
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if(rtStatus != _SUCCESS){
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DBG_871X("%s():Radio[%d] Fail!!", __FUNCTION__, eRFPath);
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goto phy_RF6052_Config_ParaFile_Fail;
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}
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}
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//3 -----------------------------------------------------------------
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//3 Configuration of Tx Power Tracking
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//3 -----------------------------------------------------------------
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#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
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if (PHY_ConfigRFWithTxPwrTrackParaFile(Adapter, pszTxPwrTrack) == _FAIL)
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#endif
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{
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#ifdef CONFIG_EMBEDDED_FWIMG
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ODM_ConfigRFWithTxPwrTrackHeaderFile(&pHalData->odmpriv);
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#endif
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}
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//RT_TRACE(COMP_INIT, DBG_LOUD, ("<---phy_RF6052_Config_ParaFile_8192E()\n"));
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phy_RF6052_Config_ParaFile_Fail:
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return rtStatus;
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}
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int
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PHY_RF6052_Config_8192E(
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IN PADAPTER Adapter)
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{
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
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int rtStatus = _SUCCESS;
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//
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// Config BB and RF
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//
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rtStatus = phy_RF6052_Config_ParaFile_8192E(Adapter);
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return rtStatus;
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}
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/* End of HalRf6052.c */
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