mirror of
https://github.com/Mange/rtl8192eu-linux-driver
synced 2024-11-22 13:35:00 +00:00
a5adfa895b
This wrapper is a simple call to udelay(). Remove it. Link: https://lore.kernel.org/r/20210805192644.15978-4-Larry.Finger@lwfinger.net
194 lines
5.9 KiB
C
194 lines
5.9 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2012 - 2017 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*****************************************************************************/
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#define _RTL8192E_RF6052_C_
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/* #include <drv_types.h> */
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#include <rtl8192e_hal.h>
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/*-----------------------------------------------------------------------------
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* Function: PHY_RF6052SetBandwidth()
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*
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* Overview: This function is called by SetBWModeCallback8190Pci() only
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*
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* Input: PADAPTER Adapter
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* WIRELESS_BANDWIDTH_E Bandwidth //20M or 40M
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*
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* Output: NONE
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*
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* Return: NONE
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*
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* Note: For RF type 0222D
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*---------------------------------------------------------------------------*/
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VOID
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PHY_RF6052SetBandwidth8192E(
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IN PADAPTER Adapter,
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IN enum channel_width Bandwidth) /* 20M or 40M */
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{
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
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switch (Bandwidth) {
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case CHANNEL_WIDTH_20:
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/* RT_DISP(FIOCTL, IOCTL_STATE, ("PHY_RF6052SetBandwidth8192E(), set 20MHz, pHalData->RfRegChnlVal[0] = 0x%x\n", pHalData->RfRegChnlVal[0])); */
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pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT10 | BIT11);
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phy_set_rf_reg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);
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phy_set_rf_reg(Adapter, RF_PATH_B, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);
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break;
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case CHANNEL_WIDTH_40:
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/* RT_DISP(FIOCTL, IOCTL_STATE, ("PHY_RF6052SetBandwidth8192E(), set 40MHz, pHalData->RfRegChnlVal[0] = 0x%x\n", pHalData->RfRegChnlVal[0])); */
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pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT10);
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phy_set_rf_reg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);
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phy_set_rf_reg(Adapter, RF_PATH_B, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);
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break;
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default:
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break;
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}
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}
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static int
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phy_RF6052_Config_ParaFile_8192E(
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IN PADAPTER Adapter
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)
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{
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enum rf_path eRFPath;
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int rtStatus = _SUCCESS;
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
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BB_REGISTER_DEFINITION_T *pPhyReg;
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u32 u4RegValue, MaskforPhySet = 0;;
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/* 3 */ /* ----------------------------------------------------------------- */
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/* 3 */ /* <2> Initialize RF */
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/* 3 */ /* ----------------------------------------------------------------- */
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/* for(eRFPath = RF_PATH_A; eRFPath <pHalData->NumTotalRFPath; eRFPath++) */
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for (eRFPath = RF_PATH_A; eRFPath < pHalData->NumTotalRFPath; eRFPath++) {
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pPhyReg = &pHalData->PHYRegDef[eRFPath];
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switch (eRFPath) {
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case RF_PATH_A:
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case RF_PATH_C:
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u4RegValue = phy_query_bb_reg(Adapter, pPhyReg->rfintfs | MaskforPhySet, bRFSI_RFENV);
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break;
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case RF_PATH_B:
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case RF_PATH_D:
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u4RegValue = phy_query_bb_reg(Adapter, pPhyReg->rfintfs | MaskforPhySet, bRFSI_RFENV << 16);
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break;
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default:
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u4RegValue = 0;
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break;
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}
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/*----Set RF_ENV enable----*/
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phy_set_bb_reg(Adapter, pPhyReg->rfintfe | MaskforPhySet, bRFSI_RFENV << 16, 0x1);
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udelay(1);/* PlatformStallExecution(1); */
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/*----Set RF_ENV output high----*/
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phy_set_bb_reg(Adapter, pPhyReg->rfintfo | MaskforPhySet, bRFSI_RFENV, 0x1);
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udelay(1);/* PlatformStallExecution(1); */
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/* Set bit number of Address and Data for RF register */
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phy_set_bb_reg(Adapter, pPhyReg->rfHSSIPara2 | MaskforPhySet, b3WireAddressLength, 0x0); /* Set 1 to 4 bits for 8255 */
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udelay(1);/* PlatformStallExecution(1); */
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phy_set_bb_reg(Adapter, pPhyReg->rfHSSIPara2 | MaskforPhySet, b3WireDataLength, 0x0); /* Set 0 to 12 bits for 8255 */
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udelay(1);/* PlatformStallExecution(1); */
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/*----Initialize RF fom connfiguration file----*/
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switch (eRFPath) {
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case RF_PATH_A:
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#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
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if (PHY_ConfigRFWithParaFile(Adapter, PHY_FILE_RADIO_A, eRFPath) == _FAIL)
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#endif
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{
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#ifdef CONFIG_EMBEDDED_FWIMG
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if (odm_config_rf_with_header_file(&pHalData->odmpriv, CONFIG_RF_RADIO, eRFPath) == HAL_STATUS_FAILURE)
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rtStatus = _FAIL;
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#endif
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}
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break;
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case RF_PATH_B:
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#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
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if (PHY_ConfigRFWithParaFile(Adapter, PHY_FILE_RADIO_B, eRFPath) == _FAIL)
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#endif
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{
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#ifdef CONFIG_EMBEDDED_FWIMG
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if (odm_config_rf_with_header_file(&pHalData->odmpriv, CONFIG_RF_RADIO, eRFPath) == HAL_STATUS_FAILURE)
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rtStatus = _FAIL;
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#endif
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}
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break;
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default:
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break;
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}
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/*----Restore RFENV control type----*/;
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switch (eRFPath) {
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case RF_PATH_A:
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case RF_PATH_C:
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phy_set_bb_reg(Adapter, pPhyReg->rfintfs | MaskforPhySet, bRFSI_RFENV, u4RegValue);
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break;
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case RF_PATH_B:
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case RF_PATH_D:
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phy_set_bb_reg(Adapter, pPhyReg->rfintfs | MaskforPhySet, bRFSI_RFENV << 16, u4RegValue);
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break;
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default:
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break;
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}
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if (rtStatus != _SUCCESS) {
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RTW_INFO("%s():Radio[%d] Fail!!", __FUNCTION__, eRFPath);
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goto phy_RF6052_Config_ParaFile_Fail;
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}
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}
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/* 3 ----------------------------------------------------------------- */
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/* 3 Configuration of Tx Power Tracking */
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/* 3 ----------------------------------------------------------------- */
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#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
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if (PHY_ConfigRFWithTxPwrTrackParaFile(Adapter, PHY_FILE_TXPWR_TRACK) == _FAIL)
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#endif
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{
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#ifdef CONFIG_EMBEDDED_FWIMG
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odm_config_rf_with_tx_pwr_track_header_file(&pHalData->odmpriv);
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#endif
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}
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phy_RF6052_Config_ParaFile_Fail:
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return rtStatus;
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}
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int
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PHY_RF6052_Config_8192E(
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IN PADAPTER Adapter)
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{
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
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int rtStatus = _SUCCESS;
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/* */
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/* Config BB and RF */
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/* */
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rtStatus = phy_RF6052_Config_ParaFile_8192E(Adapter);
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return rtStatus;
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}
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/* End of HalRf6052.c */
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