mirror of
https://github.com/Mange/rtl8192eu-linux-driver
synced 2024-11-21 21:15:01 +00:00
686 lines
24 KiB
C
686 lines
24 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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#ifndef __HAL_INTF_H__
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#define __HAL_INTF_H__
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enum RTL871X_HCI_TYPE {
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RTW_PCIE = BIT0,
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RTW_USB = BIT1,
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RTW_SDIO = BIT2,
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RTW_GSPI = BIT3,
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};
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enum _CHIP_TYPE {
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NULL_CHIP_TYPE,
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RTL8188E,
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RTL8192E,
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RTL8812,
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RTL8821, //RTL8811
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RTL8723B,
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RTL8814A,
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RTL8703B,
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RTL8188F,
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MAX_CHIP_TYPE
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};
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extern const u32 _chip_type_to_odm_ic_type[];
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#define chip_type_to_odm_ic_type(chip_type) (((chip_type) >= MAX_CHIP_TYPE) ? _chip_type_to_odm_ic_type[MAX_CHIP_TYPE] : _chip_type_to_odm_ic_type[(chip_type)])
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typedef enum _HAL_HW_TIMER_TYPE {
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HAL_TIMER_NONE = 0,
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HAL_TIMER_TXBF = 1,
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HAL_TIMER_EARLYMODE = 2,
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} HAL_HW_TIMER_TYPE, *PHAL_HW_TIMER_TYPE;
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typedef enum _HW_VARIABLES{
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HW_VAR_MEDIA_STATUS,
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HW_VAR_MEDIA_STATUS1,
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HW_VAR_SET_OPMODE,
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HW_VAR_MAC_ADDR,
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HW_VAR_BSSID,
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HW_VAR_INIT_RTS_RATE,
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HW_VAR_BASIC_RATE,
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HW_VAR_TXPAUSE,
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HW_VAR_BCN_FUNC,
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HW_VAR_CORRECT_TSF,
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HW_VAR_CHECK_BSSID,
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HW_VAR_MLME_DISCONNECT,
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HW_VAR_MLME_SITESURVEY,
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HW_VAR_MLME_JOIN,
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HW_VAR_ON_RCR_AM,
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HW_VAR_OFF_RCR_AM,
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HW_VAR_BEACON_INTERVAL,
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HW_VAR_SLOT_TIME,
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HW_VAR_RESP_SIFS,
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HW_VAR_ACK_PREAMBLE,
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HW_VAR_SEC_CFG,
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HW_VAR_SEC_DK_CFG,
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HW_VAR_BCN_VALID,
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HW_VAR_RF_TYPE,
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/* PHYDM odm->SupportAbility */
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HW_VAR_CAM_EMPTY_ENTRY,
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HW_VAR_CAM_INVALID_ALL,
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HW_VAR_AC_PARAM_VO,
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HW_VAR_AC_PARAM_VI,
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HW_VAR_AC_PARAM_BE,
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HW_VAR_AC_PARAM_BK,
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HW_VAR_ACM_CTRL,
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HW_VAR_AMPDU_MIN_SPACE,
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HW_VAR_AMPDU_FACTOR,
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HW_VAR_RXDMA_AGG_PG_TH,
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HW_VAR_SET_RPWM,
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HW_VAR_CPWM,
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HW_VAR_H2C_FW_PWRMODE,
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HW_VAR_H2C_PS_TUNE_PARAM,
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HW_VAR_H2C_FW_JOINBSSRPT,
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HW_VAR_FWLPS_RF_ON,
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HW_VAR_H2C_FW_P2P_PS_OFFLOAD,
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HW_VAR_TRIGGER_GPIO_0,
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HW_VAR_BT_SET_COEXIST,
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HW_VAR_BT_ISSUE_DELBA,
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HW_VAR_SWITCH_EPHY_WoWLAN,
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HW_VAR_EFUSE_USAGE,
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HW_VAR_EFUSE_BYTES,
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HW_VAR_EFUSE_BT_USAGE,
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HW_VAR_EFUSE_BT_BYTES,
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HW_VAR_FIFO_CLEARN_UP,
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HW_VAR_RESTORE_HW_SEQ,
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HW_VAR_CHECK_TXBUF,
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HW_VAR_PCIE_STOP_TX_DMA,
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HW_VAR_APFM_ON_MAC, //Auto FSM to Turn On, include clock, isolation, power control for MAC only
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HW_VAR_HCI_SUS_STATE,
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// The valid upper nav range for the HW updating, if the true value is larger than the upper range, the HW won't update it.
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// Unit in microsecond. 0 means disable this function.
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#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
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HW_VAR_WOWLAN,
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HW_VAR_WAKEUP_REASON,
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HW_VAR_RPWM_TOG,
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#endif
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#ifdef CONFIG_GPIO_WAKEUP
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HW_SET_GPIO_WL_CTRL,
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#endif
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HW_VAR_SYS_CLKR,
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HW_VAR_NAV_UPPER,
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HW_VAR_C2H_HANDLE,
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HW_VAR_RPT_TIMER_SETTING,
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HW_VAR_TX_RPT_MAX_MACID,
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HW_VAR_CHK_HI_QUEUE_EMPTY,
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HW_VAR_DL_BCN_SEL,
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HW_VAR_AMPDU_MAX_TIME,
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HW_VAR_WIRELESS_MODE,
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HW_VAR_USB_MODE,
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HW_VAR_PORT_SWITCH,
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HW_VAR_DO_IQK,
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HW_VAR_DM_IN_LPS,
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HW_VAR_SET_REQ_FW_PS,
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HW_VAR_FW_PS_STATE,
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HW_VAR_SOUNDING_ENTER,
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HW_VAR_SOUNDING_LEAVE,
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HW_VAR_SOUNDING_RATE,
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HW_VAR_SOUNDING_STATUS,
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HW_VAR_SOUNDING_FW_NDPA,
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HW_VAR_SOUNDING_CLK,
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/*Add by YuChen for TXBF HW timer*/
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HW_VAR_HW_REG_TIMER_INIT,
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HW_VAR_HW_REG_TIMER_RESTART,
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HW_VAR_HW_REG_TIMER_START,
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HW_VAR_HW_REG_TIMER_STOP,
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/*Add by YuChen for TXBF HW timer*/
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HW_VAR_DL_RSVD_PAGE,
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HW_VAR_MACID_LINK,
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HW_VAR_MACID_NOLINK,
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HW_VAR_MACID_SLEEP,
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HW_VAR_MACID_WAKEUP,
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HW_VAR_DUMP_MAC_QUEUE_INFO,
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HW_VAR_ASIX_IOT,
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HW_VAR_EN_HW_UPDATE_TSF,
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HW_VAR_CH_SW_NEED_TO_TAKE_CARE_IQK_INFO,
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HW_VAR_CH_SW_IQK_INFO_BACKUP,
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HW_VAR_CH_SW_IQK_INFO_RESTORE,
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#ifdef CONFIG_TDLS
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HW_VAR_TDLS_WRCR,
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HW_VAR_TDLS_RS_RCR,
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#ifdef CONFIG_TDLS_CH_SW
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HW_VAR_TDLS_BCN_EARLY_C2H_RPT
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#endif
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#endif
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}HW_VARIABLES;
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typedef enum _HAL_DEF_VARIABLE{
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HAL_DEF_UNDERCORATEDSMOOTHEDPWDB,
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HAL_DEF_IS_SUPPORT_ANT_DIV,
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HAL_DEF_DRVINFO_SZ,
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HAL_DEF_MAX_RECVBUF_SZ,
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HAL_DEF_RX_PACKET_OFFSET,
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HAL_DEF_RX_DMA_SZ_WOW,
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HAL_DEF_RX_DMA_SZ,
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HAL_DEF_RX_PAGE_SIZE,
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HAL_DEF_DBG_DUMP_RXPKT,//for dbg
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HAL_DEF_RA_DECISION_RATE,
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HAL_DEF_RA_SGI,
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HAL_DEF_PT_PWR_STATUS,
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HAL_DEF_TX_LDPC, // LDPC support
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HAL_DEF_RX_LDPC, // LDPC support
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HAL_DEF_TX_STBC, // TX STBC support
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HAL_DEF_RX_STBC, // RX STBC support
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HAL_DEF_EXPLICIT_BEAMFORMER,// Explicit Compressed Steering Capable
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HAL_DEF_EXPLICIT_BEAMFORMEE,// Explicit Compressed Beamforming Feedback Capable
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HAL_DEF_BEAMFORMER_CAP,
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HAL_DEF_BEAMFORMEE_CAP,
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HW_VAR_MAX_RX_AMPDU_FACTOR,
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HW_DEF_RA_INFO_DUMP,
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HAL_DEF_DBG_DUMP_TXPKT,
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HAL_DEF_TX_PAGE_SIZE,
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HAL_DEF_TX_PAGE_BOUNDARY,
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HAL_DEF_TX_PAGE_BOUNDARY_WOWLAN,
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HAL_DEF_ANT_DETECT,//to do for 8723a
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HAL_DEF_PCI_SUUPORT_L1_BACKDOOR, // Determine if the L1 Backdoor setting is turned on.
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HAL_DEF_PCI_AMD_L1_SUPPORT,
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HAL_DEF_PCI_ASPM_OSC, // Support for ASPM OSC, added by Roger, 2013.03.27.
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HAL_DEF_MACID_SLEEP, // Support for MACID sleep
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HAL_DEF_DBG_DIS_PWT, //disable Tx power training or not.
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HAL_DEF_EFUSE_USAGE, /* Get current EFUSE utilization. 2008.12.19. Added by Roger. */
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HAL_DEF_EFUSE_BYTES,
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HW_VAR_BEST_AMPDU_DENSITY,
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}HAL_DEF_VARIABLE;
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typedef enum _HAL_ODM_VARIABLE{
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HAL_ODM_STA_INFO,
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HAL_ODM_P2P_STATE,
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HAL_ODM_WIFI_DISPLAY_STATE,
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HAL_ODM_NOISE_MONITOR,
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HAL_ODM_REGULATION,
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HAL_ODM_INITIAL_GAIN,
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HAL_ODM_FA_CNT_DUMP,
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HAL_ODM_DBG_FLAG,
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HAL_ODM_DBG_LEVEL,
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HAL_ODM_RX_INFO_DUMP,
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HAL_ODM_RX_Dframe_INFO,
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#ifdef CONFIG_AUTO_CHNL_SEL_NHM
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HAL_ODM_AUTO_CHNL_SEL,
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#endif
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#ifdef CONFIG_ANTENNA_DIVERSITY
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HAL_ODM_ANTDIV_SELECT
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#endif
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}HAL_ODM_VARIABLE;
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typedef enum _HAL_INTF_PS_FUNC{
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HAL_USB_SELECT_SUSPEND,
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HAL_MAX_ID,
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}HAL_INTF_PS_FUNC;
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typedef s32 (*c2h_id_filter)(u8 *c2h_evt);
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struct hal_ops {
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/*** initialize section ***/
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void (*read_chip_version)(_adapter *padapter);
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void (*init_default_value)(_adapter *padapter);
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void (*intf_chip_configure)(_adapter *padapter);
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void (*read_adapter_info)(_adapter *padapter);
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u32 (*hal_power_on)(_adapter *padapter);
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void (*hal_power_off)(_adapter *padapter);
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u32 (*hal_init)(_adapter *padapter);
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u32 (*hal_deinit)(_adapter *padapter);
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void (*dm_init)(_adapter *padapter);
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void (*dm_deinit)(_adapter *padapter);
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/*** xmit section ***/
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s32 (*init_xmit_priv)(_adapter *padapter);
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void (*free_xmit_priv)(_adapter *padapter);
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s32 (*hal_xmit)(_adapter *padapter, struct xmit_frame *pxmitframe);
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/*
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* mgnt_xmit should be implemented to run in interrupt context
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*/
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s32 (*mgnt_xmit)(_adapter *padapter, struct xmit_frame *pmgntframe);
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s32 (*hal_xmitframe_enqueue)(_adapter *padapter, struct xmit_frame *pxmitframe);
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#ifdef CONFIG_XMIT_THREAD_MODE
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s32 (*xmit_thread_handler)(_adapter *padapter);
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#endif
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void (*run_thread)(_adapter *padapter);
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void (*cancel_thread)(_adapter *padapter);
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/*** recv section ***/
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s32 (*init_recv_priv)(_adapter *padapter);
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void (*free_recv_priv)(_adapter *padapter);
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#if defined(CONFIG_USB_HCI)||defined(CONFIG_PCI_HCI)
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u32 (*inirp_init)(_adapter *padapter);
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u32 (*inirp_deinit)(_adapter *padapter);
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#endif
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/*** interrupt hdl section ***/
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void (*enable_interrupt)(_adapter *padapter);
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void (*disable_interrupt)(_adapter *padapter);
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u8 (*check_ips_status)(_adapter *padapter);
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#if defined(CONFIG_PCI_HCI)
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s32 (*interrupt_handler)(_adapter *padapter);
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#endif
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#if defined(CONFIG_USB_HCI) && defined(CONFIG_SUPPORT_USB_INT)
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void (*interrupt_handler)(_adapter *padapter, u16 pkt_len, u8 *pbuf);
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#endif
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#if defined(CONFIG_PCI_HCI)
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void (*irp_reset)(_adapter *padapter);
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#endif
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/*** DM section ***/
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void (*InitSwLeds)(_adapter *padapter);
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void (*DeInitSwLeds)(_adapter *padapter);
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void (*set_bwmode_handler)(_adapter *padapter, CHANNEL_WIDTH Bandwidth, u8 Offset);
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void (*set_channel_handler)(_adapter *padapter, u8 channel);
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void (*set_chnl_bw_handler)(_adapter *padapter, u8 channel, CHANNEL_WIDTH Bandwidth, u8 Offset40, u8 Offset80);
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void (*set_tx_power_level_handler)(_adapter *padapter, u8 channel);
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void (*get_tx_power_level_handler)(_adapter *padapter, s32 *powerlevel);
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void (*hal_dm_watchdog)(_adapter *padapter);
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#ifdef CONFIG_LPS_LCLK_WD_TIMER
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void (*hal_dm_watchdog_in_lps)(_adapter *padapter);
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#endif
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void (*SetHwRegHandler)(_adapter *padapter, u8 variable,u8* val);
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void (*GetHwRegHandler)(_adapter *padapter, u8 variable,u8* val);
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#ifdef CONFIG_C2H_PACKET_EN
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void (*SetHwRegHandlerWithBuf)(_adapter *padapter, u8 variable, u8 * pbuf, int len);
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#endif
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u8 (*GetHalDefVarHandler)(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue);
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u8 (*SetHalDefVarHandler)(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue);
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void (*GetHalODMVarHandler)(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1,PVOID pValue2);
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void (*SetHalODMVarHandler)(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1,BOOLEAN bSet);
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void (*UpdateRAMaskHandler)(_adapter *padapter, u32 mac_id, u8 rssi_level);
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void (*SetBeaconRelatedRegistersHandler)(_adapter *padapter);
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void (*Add_RateATid)(_adapter *padapter, u64 bitmap, u8 *arg, u8 rssi_level);
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u8 (*interface_ps_func)(_adapter *padapter,HAL_INTF_PS_FUNC efunc_id, u8* val);
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u32 (*read_bbreg)(_adapter *padapter, u32 RegAddr, u32 BitMask);
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void (*write_bbreg)(_adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data);
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u32 (*read_rfreg)(_adapter *padapter, u8 eRFPath, u32 RegAddr, u32 BitMask);
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void (*write_rfreg)(_adapter *padapter, u8 eRFPath, u32 RegAddr, u32 BitMask, u32 Data);
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#ifdef CONFIG_HOSTAPD_MLME
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s32 (*hostap_mgnt_xmit_entry)(_adapter *padapter, _pkt *pkt);
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#endif
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void (*EfusePowerSwitch)(_adapter *padapter, u8 bWrite, u8 PwrState);
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void (*BTEfusePowerSwitch)(_adapter *padapter, u8 bWrite, u8 PwrState);
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void (*ReadEFuse)(_adapter *padapter, u8 efuseType, u16 _offset, u16 _size_byte, u8 *pbuf, BOOLEAN bPseudoTest);
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void (*EFUSEGetEfuseDefinition)(_adapter *padapter, u8 efuseType, u8 type, void *pOut, BOOLEAN bPseudoTest);
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u16 (*EfuseGetCurrentSize)(_adapter *padapter, u8 efuseType, BOOLEAN bPseudoTest);
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int (*Efuse_PgPacketRead)(_adapter *padapter, u8 offset, u8 *data, BOOLEAN bPseudoTest);
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int (*Efuse_PgPacketWrite)(_adapter *padapter, u8 offset, u8 word_en, u8 *data, BOOLEAN bPseudoTest);
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u8 (*Efuse_WordEnableDataWrite)(_adapter *padapter, u16 efuse_addr, u8 word_en, u8 *data, BOOLEAN bPseudoTest);
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BOOLEAN (*Efuse_PgPacketWrite_BT)(_adapter *padapter, u8 offset, u8 word_en, u8 *data, BOOLEAN bPseudoTest);
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#ifdef DBG_CONFIG_ERROR_DETECT
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void (*sreset_init_value)(_adapter *padapter);
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void (*sreset_reset_value)(_adapter *padapter);
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void (*silentreset)(_adapter *padapter);
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void (*sreset_xmit_status_check)(_adapter *padapter);
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void (*sreset_linked_status_check) (_adapter *padapter);
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u8 (*sreset_get_wifi_status)(_adapter *padapter);
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bool (*sreset_inprogress)(_adapter *padapter);
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#endif
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#ifdef CONFIG_IOL
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int (*IOL_exec_cmds_sync)(_adapter *padapter, struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt);
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#endif
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void (*hal_notch_filter)(_adapter * adapter, bool enable);
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s32 (*c2h_handler)(_adapter *padapter, u8 *c2h_evt);
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c2h_id_filter c2h_id_filter_ccx;
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s32 (*fill_h2c_cmd)(PADAPTER, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer);
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void (*fill_fake_txdesc)(PADAPTER, u8 *pDesc, u32 BufferLen,
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u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame);
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s32 (*fw_dl)(_adapter *adapter, u8 wowlan);
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#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
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void (*clear_interrupt)(_adapter *padapter);
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#endif
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u8 (*hal_get_tx_buff_rsvd_page_num)(_adapter *adapter, bool wowlan);
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#ifdef CONFIG_GPIO_API
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void (*update_hisr_hsisr_ind)(PADAPTER padapter, u32 flag);
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#endif
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void (*fw_correct_bcn)(PADAPTER padapter);
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};
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typedef enum _RT_EEPROM_TYPE{
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EEPROM_93C46,
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EEPROM_93C56,
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EEPROM_BOOT_EFUSE,
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}RT_EEPROM_TYPE,*PRT_EEPROM_TYPE;
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#define RF_CHANGE_BY_INIT 0
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#define RF_CHANGE_BY_IPS BIT28
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#define RF_CHANGE_BY_PS BIT29
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#define RF_CHANGE_BY_HW BIT30
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#define RF_CHANGE_BY_SW BIT31
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typedef enum _HARDWARE_TYPE{
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HARDWARE_TYPE_RTL8188EE,
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HARDWARE_TYPE_RTL8188EU,
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HARDWARE_TYPE_RTL8188ES,
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// NEW_GENERATION_IC
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HARDWARE_TYPE_RTL8192EE,
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HARDWARE_TYPE_RTL8192EU,
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HARDWARE_TYPE_RTL8192ES,
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HARDWARE_TYPE_RTL8812E,
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HARDWARE_TYPE_RTL8812AU,
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HARDWARE_TYPE_RTL8811AU,
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HARDWARE_TYPE_RTL8821E,
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HARDWARE_TYPE_RTL8821U,
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HARDWARE_TYPE_RTL8821S,
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HARDWARE_TYPE_RTL8723BE,
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HARDWARE_TYPE_RTL8723BU,
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HARDWARE_TYPE_RTL8723BS,
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HARDWARE_TYPE_RTL8814AE,
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HARDWARE_TYPE_RTL8814AU,
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HARDWARE_TYPE_RTL8814AS,
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HARDWARE_TYPE_RTL8821BE,
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HARDWARE_TYPE_RTL8821BU,
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|
HARDWARE_TYPE_RTL8821BS,
|
|
HARDWARE_TYPE_RTL8822BE,
|
|
HARDWARE_TYPE_RTL8822BU,
|
|
HARDWARE_TYPE_RTL8822BS,
|
|
HARDWARE_TYPE_RTL8703BE,
|
|
HARDWARE_TYPE_RTL8703BU,
|
|
HARDWARE_TYPE_RTL8703BS,
|
|
HARDWARE_TYPE_RTL8188FE,
|
|
HARDWARE_TYPE_RTL8188FU,
|
|
HARDWARE_TYPE_RTL8188FS,
|
|
HARDWARE_TYPE_MAX,
|
|
}HARDWARE_TYPE;
|
|
|
|
#define IS_NEW_GENERATION_IC(_Adapter) (rtw_get_hw_type(_Adapter) >= HARDWARE_TYPE_RTL8192EE)
|
|
//
|
|
// RTL8188E Series
|
|
//
|
|
#define IS_HARDWARE_TYPE_8188EE(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8188EE)
|
|
#define IS_HARDWARE_TYPE_8188EU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8188EU)
|
|
#define IS_HARDWARE_TYPE_8188ES(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8188ES)
|
|
#define IS_HARDWARE_TYPE_8188E(_Adapter) \
|
|
(IS_HARDWARE_TYPE_8188EE(_Adapter) || IS_HARDWARE_TYPE_8188EU(_Adapter) || IS_HARDWARE_TYPE_8188ES(_Adapter))
|
|
|
|
// RTL8812 Series
|
|
#define IS_HARDWARE_TYPE_8812E(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8812E)
|
|
#define IS_HARDWARE_TYPE_8812AU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8812AU)
|
|
#define IS_HARDWARE_TYPE_8812(_Adapter) \
|
|
(IS_HARDWARE_TYPE_8812E(_Adapter) || IS_HARDWARE_TYPE_8812AU(_Adapter))
|
|
|
|
// RTL8821 Series
|
|
#define IS_HARDWARE_TYPE_8821E(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8821E)
|
|
#define IS_HARDWARE_TYPE_8811AU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8811AU)
|
|
#define IS_HARDWARE_TYPE_8821U(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8821U || \
|
|
rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8811AU)
|
|
#define IS_HARDWARE_TYPE_8821S(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8821S)
|
|
#define IS_HARDWARE_TYPE_8821(_Adapter) \
|
|
(IS_HARDWARE_TYPE_8821E(_Adapter) || IS_HARDWARE_TYPE_8821U(_Adapter)|| IS_HARDWARE_TYPE_8821S(_Adapter))
|
|
|
|
#define IS_HARDWARE_TYPE_JAGUAR(_Adapter) \
|
|
(IS_HARDWARE_TYPE_8812(_Adapter) || IS_HARDWARE_TYPE_8821(_Adapter))
|
|
|
|
//RTL8192E Series
|
|
#define IS_HARDWARE_TYPE_8192EE(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8192EE)
|
|
#define IS_HARDWARE_TYPE_8192EU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8192EU)
|
|
#define IS_HARDWARE_TYPE_8192ES(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8192ES)
|
|
|
|
#define IS_HARDWARE_TYPE_8192E(_Adapter) \
|
|
(IS_HARDWARE_TYPE_8192EE(_Adapter) || IS_HARDWARE_TYPE_8192EU(_Adapter) ||IS_HARDWARE_TYPE_8192ES(_Adapter))
|
|
|
|
#define IS_HARDWARE_TYPE_8723BE(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8723BE)
|
|
#define IS_HARDWARE_TYPE_8723BU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8723BU)
|
|
#define IS_HARDWARE_TYPE_8723BS(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8723BS)
|
|
|
|
#define IS_HARDWARE_TYPE_8723B(_Adapter) \
|
|
(IS_HARDWARE_TYPE_8723BE(_Adapter) || IS_HARDWARE_TYPE_8723BU(_Adapter) ||IS_HARDWARE_TYPE_8723BS(_Adapter))
|
|
|
|
/* RTL8814A Series */
|
|
#define IS_HARDWARE_TYPE_8814AE(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8814AE)
|
|
#define IS_HARDWARE_TYPE_8814AU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8814AU)
|
|
#define IS_HARDWARE_TYPE_8814AS(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8814AS)
|
|
|
|
#define IS_HARDWARE_TYPE_8814A(_Adapter) \
|
|
(IS_HARDWARE_TYPE_8814AE(_Adapter) || IS_HARDWARE_TYPE_8814AU(_Adapter) || IS_HARDWARE_TYPE_8814AS(_Adapter))
|
|
|
|
#define IS_HARDWARE_TYPE_JAGUAR2(_Adapter) \
|
|
(IS_HARDWARE_TYPE_8814A(_Adapter) || IS_HARDWARE_TYPE_8821B(_Adapter) || IS_HARDWARE_TYPE_8822B(_Adapter))
|
|
|
|
#define IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(_Adapter) \
|
|
(IS_HARDWARE_TYPE_JAGUAR(_Adapter) || IS_HARDWARE_TYPE_JAGUAR2(_Adapter))
|
|
|
|
/* RTL8703B Series */
|
|
#define IS_HARDWARE_TYPE_8703BE(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8703BE)
|
|
#define IS_HARDWARE_TYPE_8703BS(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8703BS)
|
|
#define IS_HARDWARE_TYPE_8703BU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8703BU)
|
|
#define IS_HARDWARE_TYPE_8703B(_Adapter) \
|
|
(IS_HARDWARE_TYPE_8703BE(_Adapter) || IS_HARDWARE_TYPE_8703BU(_Adapter) || IS_HARDWARE_TYPE_8703BS(_Adapter))
|
|
|
|
/* RTL8188F Series */
|
|
#define IS_HARDWARE_TYPE_8188FE(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8188FE)
|
|
#define IS_HARDWARE_TYPE_8188FS(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8188FS)
|
|
#define IS_HARDWARE_TYPE_8188FU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8188FU)
|
|
#define IS_HARDWARE_TYPE_8188F(_Adapter) \
|
|
(IS_HARDWARE_TYPE_8188FE(_Adapter) || IS_HARDWARE_TYPE_8188FU(_Adapter) || IS_HARDWARE_TYPE_8188FS(_Adapter))
|
|
|
|
#define IS_HARDWARE_TYPE_8821BE(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8821BE)
|
|
#define IS_HARDWARE_TYPE_8821BU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8821BU)
|
|
#define IS_HARDWARE_TYPE_8821BS(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8821BS)
|
|
|
|
#define IS_HARDWARE_TYPE_8821B(_Adapter) \
|
|
(IS_HARDWARE_TYPE_8821BE(_Adapter) || IS_HARDWARE_TYPE_8821BU(_Adapter) || IS_HARDWARE_TYPE_8821BS(_Adapter))
|
|
|
|
#define IS_HARDWARE_TYPE_8822BE(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8822BE)
|
|
#define IS_HARDWARE_TYPE_8822BU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8822BU)
|
|
#define IS_HARDWARE_TYPE_8822BS(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8822BS)
|
|
#define IS_HARDWARE_TYPE_8822B(_Adapter) \
|
|
(IS_HARDWARE_TYPE_8822BE(_Adapter) || IS_HARDWARE_TYPE_8822BU(_Adapter) || IS_HARDWARE_TYPE_8822BS(_Adapter))
|
|
|
|
|
|
|
|
typedef enum _wowlan_subcode {
|
|
WOWLAN_ENABLE = 0,
|
|
WOWLAN_DISABLE = 1,
|
|
WOWLAN_AP_ENABLE = 2,
|
|
WOWLAN_AP_DISABLE = 3,
|
|
WOWLAN_PATTERN_CLEAN = 4
|
|
} wowlan_subcode;
|
|
|
|
struct wowlan_ioctl_param{
|
|
unsigned int subcode;
|
|
unsigned int subcode_value;
|
|
unsigned int wakeup_reason;
|
|
};
|
|
|
|
#define Rx_Pairwisekey 0x01
|
|
#define Rx_GTK 0x02
|
|
#define Rx_DisAssoc 0x04
|
|
#define Rx_DeAuth 0x08
|
|
#define Rx_ARPReq 0x09
|
|
#define FWDecisionDisconnect 0x10
|
|
#define Rx_MagicPkt 0x21
|
|
#define Rx_UnicastPkt 0x22
|
|
#define Rx_PatternPkt 0x23
|
|
#define RX_PNOWakeUp 0x55
|
|
#define AP_WakeUp 0x66
|
|
|
|
u8 rtw_hal_data_init(_adapter *padapter);
|
|
void rtw_hal_data_deinit(_adapter *padapter);
|
|
|
|
void rtw_hal_def_value_init(_adapter *padapter);
|
|
|
|
void rtw_hal_free_data(_adapter *padapter);
|
|
|
|
void rtw_hal_dm_init(_adapter *padapter);
|
|
void rtw_hal_dm_deinit(_adapter *padapter);
|
|
void rtw_hal_sw_led_init(_adapter *padapter);
|
|
void rtw_hal_sw_led_deinit(_adapter *padapter);
|
|
|
|
u32 rtw_hal_power_on(_adapter *padapter);
|
|
void rtw_hal_power_off(_adapter *padapter);
|
|
|
|
uint rtw_hal_init(_adapter *padapter);
|
|
uint rtw_hal_deinit(_adapter *padapter);
|
|
void rtw_hal_stop(_adapter *padapter);
|
|
void rtw_hal_set_hwreg(PADAPTER padapter, u8 variable, u8 *val);
|
|
void rtw_hal_get_hwreg(PADAPTER padapter, u8 variable, u8 *val);
|
|
|
|
#ifdef CONFIG_C2H_PACKET_EN
|
|
void rtw_hal_set_hwreg_with_buf(_adapter *padapter, u8 variable, u8 *pbuf, int len);
|
|
#endif
|
|
|
|
void rtw_hal_chip_configure(_adapter *padapter);
|
|
void rtw_hal_read_chip_info(_adapter *padapter);
|
|
void rtw_hal_read_chip_version(_adapter *padapter);
|
|
|
|
u8 rtw_hal_set_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue);
|
|
u8 rtw_hal_get_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue);
|
|
|
|
void rtw_hal_set_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1,BOOLEAN bSet);
|
|
void rtw_hal_get_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1,PVOID pValue2);
|
|
|
|
void rtw_hal_enable_interrupt(_adapter *padapter);
|
|
void rtw_hal_disable_interrupt(_adapter *padapter);
|
|
|
|
u8 rtw_hal_check_ips_status(_adapter *padapter);
|
|
|
|
#if defined(CONFIG_USB_HCI)||defined(CONFIG_PCI_HCI)
|
|
u32 rtw_hal_inirp_init(_adapter *padapter);
|
|
u32 rtw_hal_inirp_deinit(_adapter *padapter);
|
|
#endif
|
|
|
|
#if defined(CONFIG_PCI_HCI)
|
|
void rtw_hal_irp_reset(_adapter *padapter);
|
|
#endif
|
|
|
|
u8 rtw_hal_intf_ps_func(_adapter *padapter,HAL_INTF_PS_FUNC efunc_id, u8* val);
|
|
|
|
s32 rtw_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe);
|
|
s32 rtw_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe);
|
|
s32 rtw_hal_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe);
|
|
|
|
s32 rtw_hal_init_xmit_priv(_adapter *padapter);
|
|
void rtw_hal_free_xmit_priv(_adapter *padapter);
|
|
|
|
s32 rtw_hal_init_recv_priv(_adapter *padapter);
|
|
void rtw_hal_free_recv_priv(_adapter *padapter);
|
|
|
|
void rtw_hal_update_ra_mask(struct sta_info *psta, u8 rssi_level);
|
|
void rtw_hal_add_ra_tid(_adapter *padapter, u64 bitmap, u8 *arg, u8 rssi_level);
|
|
|
|
void rtw_hal_start_thread(_adapter *padapter);
|
|
void rtw_hal_stop_thread(_adapter *padapter);
|
|
|
|
void rtw_hal_bcn_related_reg_setting(_adapter *padapter);
|
|
|
|
u32 rtw_hal_read_bbreg(_adapter *padapter, u32 RegAddr, u32 BitMask);
|
|
void rtw_hal_write_bbreg(_adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data);
|
|
u32 rtw_hal_read_rfreg(_adapter *padapter, u32 eRFPath, u32 RegAddr, u32 BitMask);
|
|
void rtw_hal_write_rfreg(_adapter *padapter, u32 eRFPath, u32 RegAddr, u32 BitMask, u32 Data);
|
|
|
|
#define PHY_QueryBBReg(Adapter, RegAddr, BitMask) rtw_hal_read_bbreg((Adapter), (RegAddr), (BitMask))
|
|
#define PHY_SetBBReg(Adapter, RegAddr, BitMask, Data) rtw_hal_write_bbreg((Adapter), (RegAddr), (BitMask), (Data))
|
|
#define PHY_QueryRFReg(Adapter, eRFPath, RegAddr, BitMask) rtw_hal_read_rfreg((Adapter), (eRFPath), (RegAddr), (BitMask))
|
|
#define PHY_SetRFReg(Adapter, eRFPath, RegAddr, BitMask, Data) rtw_hal_write_rfreg((Adapter), (eRFPath), (RegAddr), (BitMask), (Data))
|
|
|
|
#define PHY_SetMacReg PHY_SetBBReg
|
|
#define PHY_QueryMacReg PHY_QueryBBReg
|
|
|
|
#if defined(CONFIG_PCI_HCI)
|
|
s32 rtw_hal_interrupt_handler(_adapter *padapter);
|
|
#endif
|
|
#if defined(CONFIG_USB_HCI) && defined(CONFIG_SUPPORT_USB_INT)
|
|
void rtw_hal_interrupt_handler(_adapter *padapter, u16 pkt_len, u8 *pbuf);
|
|
#endif
|
|
|
|
void rtw_hal_set_bwmode(_adapter *padapter, CHANNEL_WIDTH Bandwidth, u8 Offset);
|
|
void rtw_hal_set_chan(_adapter *padapter, u8 channel);
|
|
void rtw_hal_set_chnl_bw(_adapter *padapter, u8 channel, CHANNEL_WIDTH Bandwidth, u8 Offset40, u8 Offset80);
|
|
void rtw_hal_dm_watchdog(_adapter *padapter);
|
|
void rtw_hal_dm_watchdog_in_lps(_adapter *padapter);
|
|
|
|
void rtw_hal_set_tx_power_level(_adapter *padapter, u8 channel);
|
|
void rtw_hal_get_tx_power_level(_adapter *padapter, s32 *powerlevel);
|
|
|
|
#ifdef CONFIG_HOSTAPD_MLME
|
|
s32 rtw_hal_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt);
|
|
#endif
|
|
|
|
#ifdef DBG_CONFIG_ERROR_DETECT
|
|
void rtw_hal_sreset_init(_adapter *padapter);
|
|
void rtw_hal_sreset_reset(_adapter *padapter);
|
|
void rtw_hal_sreset_reset_value(_adapter *padapter);
|
|
void rtw_hal_sreset_xmit_status_check(_adapter *padapter);
|
|
void rtw_hal_sreset_linked_status_check (_adapter *padapter);
|
|
u8 rtw_hal_sreset_get_wifi_status(_adapter *padapter);
|
|
bool rtw_hal_sreset_inprogress(_adapter *padapter);
|
|
#endif
|
|
|
|
#ifdef CONFIG_IOL
|
|
int rtw_hal_iol_cmd(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt);
|
|
#endif
|
|
|
|
#ifdef CONFIG_XMIT_THREAD_MODE
|
|
s32 rtw_hal_xmit_thread_handler(_adapter *padapter);
|
|
#endif
|
|
|
|
void rtw_hal_notch_filter(_adapter * adapter, bool enable);
|
|
|
|
bool rtw_hal_c2h_valid(_adapter *adapter, u8 *buf);
|
|
s32 rtw_hal_c2h_evt_read(_adapter *adapter, u8 *buf);
|
|
s32 rtw_hal_c2h_handler(_adapter *adapter, u8 *c2h_evt);
|
|
c2h_id_filter rtw_hal_c2h_id_filter_ccx(_adapter *adapter);
|
|
|
|
s32 rtw_hal_is_disable_sw_channel_plan(PADAPTER padapter);
|
|
|
|
s32 rtw_hal_macid_sleep(PADAPTER padapter, u8 macid);
|
|
s32 rtw_hal_macid_wakeup(PADAPTER padapter, u8 macid);
|
|
|
|
s32 rtw_hal_fill_h2c_cmd(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer);
|
|
void rtw_hal_fill_fake_txdesc(_adapter *padapter, u8 *pDesc, u32 BufferLen,
|
|
u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame);
|
|
u8 rtw_hal_get_txbuff_rsvd_page_num(_adapter *adapter, bool wowlan);
|
|
|
|
#ifdef CONFIG_GPIO_API
|
|
void rtw_hal_update_hisr_hsisr_ind(_adapter *padapter, u32 flag);
|
|
#endif
|
|
|
|
void rtw_hal_fw_correct_bcn(_adapter *padapter);
|
|
s32 rtw_hal_fw_dl(_adapter *padapter, u8 wowlan);
|
|
|
|
#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
|
|
void rtw_hal_clear_interrupt(_adapter *padapter);
|
|
#endif
|
|
u8 rtw_hal_ops_check(_adapter *padapter);
|
|
|
|
#endif //__HAL_INTF_H__
|
|
|