mirror of
https://github.com/Mange/rtl8192eu-linux-driver
synced 2024-11-25 06:55:05 +00:00
555 lines
15 KiB
C
555 lines
15 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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#define _RTL8192E_XMIT_C_
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//#include <drv_types.h>
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#include <rtl8192e_hal.h>
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s32 rtl8192e_init_xmit_priv(_adapter *padapter)
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{
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
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struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
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#ifdef CONFIG_TX_EARLY_MODE
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pHalData->bEarlyModeEnable = padapter->registrypriv.early_mode;
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#endif
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pxmitpriv->hw_ssn_seq_no = rtw_get_hwseq_no(padapter);
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pxmitpriv->nqos_ssn = 0;
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return _SUCCESS;
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}
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void _dbg_dump_tx_info(_adapter *padapter,int frame_tag, u8 *ptxdesc)
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{
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u8 bDumpTxPkt;
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u8 bDumpTxDesc = _FALSE;
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rtw_hal_get_def_var(padapter, HAL_DEF_DBG_DUMP_TXPKT, &(bDumpTxPkt));
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if(bDumpTxPkt ==1){//dump txdesc for data frame
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DBG_871X("dump tx_desc for data frame\n");
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if((frame_tag&0x0f) == DATA_FRAMETAG){
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bDumpTxDesc = _TRUE;
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}
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}
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else if(bDumpTxPkt ==2){//dump txdesc for mgnt frame
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DBG_871X("dump tx_desc for mgnt frame\n");
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if((frame_tag&0x0f) == MGNT_FRAMETAG){
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bDumpTxDesc = _TRUE;
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}
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}
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else if(bDumpTxPkt ==3){//dump early info
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}
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if(bDumpTxDesc){
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// ptxdesc->txdw4 = cpu_to_le32(0x00001006);//RTS Rate=24M
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// ptxdesc->txdw6 = 0x6666f800;
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DBG_8192C("=====================================\n");
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DBG_8192C("Offset00(0x%08x)\n",*((u32 *)(ptxdesc)));
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DBG_8192C("Offset04(0x%08x)\n",*((u32 *)(ptxdesc+4)));
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DBG_8192C("Offset08(0x%08x)\n",*((u32 *)(ptxdesc+8)));
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DBG_8192C("Offset12(0x%08x)\n",*((u32 *)(ptxdesc+12)));
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DBG_8192C("Offset16(0x%08x)\n",*((u32 *)(ptxdesc+16)));
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DBG_8192C("Offset20(0x%08x)\n",*((u32 *)(ptxdesc+20)));
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DBG_8192C("Offset24(0x%08x)\n",*((u32 *)(ptxdesc+24)));
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DBG_8192C("Offset28(0x%08x)\n",*((u32 *)(ptxdesc+28)));
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DBG_8192C("Offset32(0x%08x)\n",*((u32 *)(ptxdesc+32)));
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DBG_8192C("Offset36(0x%08x)\n",*((u32 *)(ptxdesc+36)));
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DBG_8192C("=====================================\n");
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}
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}
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/*
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* Description:
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* Aggregation packets and send to hardware
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*
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* Return:
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* 0 Success
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* -1 Hardware resource(TX FIFO) not ready
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* -2 Software resource(xmitbuf) not ready
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*/
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#ifdef CONFIG_TX_EARLY_MODE
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//#define DBG_EMINFO
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#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1
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#define EARLY_MODE_MAX_PKT_NUM 10
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#else
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#define EARLY_MODE_MAX_PKT_NUM 5
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#endif
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struct EMInfo{
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u8 EMPktNum;
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u16 EMPktLen[EARLY_MODE_MAX_PKT_NUM];
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};
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void
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InsertEMContent_8192E(
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struct EMInfo *pEMInfo,
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IN pu1Byte VirtualAddress)
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{
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#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1
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u1Byte index=0;
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u4Byte dwtmp=0;
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#endif
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_rtw_memset(VirtualAddress, 0, EARLY_MODE_INFO_SIZE);
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if(pEMInfo->EMPktNum==0)
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return;
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#ifdef DBG_EMINFO
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{
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int i;
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DBG_8192C("\n%s ==> pEMInfo->EMPktNum =%d\n",__FUNCTION__,pEMInfo->EMPktNum);
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for(i=0;i< EARLY_MODE_MAX_PKT_NUM;i++){
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DBG_8192C("%s ==> pEMInfo->EMPktLen[%d] =%d\n",__FUNCTION__,i,pEMInfo->EMPktLen[i]);
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}
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}
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#endif
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#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1
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SET_EARLYMODE_PKTNUM(VirtualAddress, pEMInfo->EMPktNum);
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if(pEMInfo->EMPktNum == 1){
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dwtmp = pEMInfo->EMPktLen[0];
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}else{
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dwtmp = pEMInfo->EMPktLen[0];
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dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4;
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dwtmp += pEMInfo->EMPktLen[1];
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}
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SET_EARLYMODE_LEN0(VirtualAddress, dwtmp);
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if(pEMInfo->EMPktNum <= 3){
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dwtmp = pEMInfo->EMPktLen[2];
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}else{
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dwtmp = pEMInfo->EMPktLen[2];
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dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4;
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dwtmp += pEMInfo->EMPktLen[3];
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}
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SET_EARLYMODE_LEN1(VirtualAddress, dwtmp);
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if(pEMInfo->EMPktNum <= 5){
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dwtmp = pEMInfo->EMPktLen[4];
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}else{
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dwtmp = pEMInfo->EMPktLen[4];
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dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4;
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dwtmp += pEMInfo->EMPktLen[5];
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}
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SET_EARLYMODE_LEN2_1(VirtualAddress, dwtmp&0xF);
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SET_EARLYMODE_LEN2_2(VirtualAddress, dwtmp>>4);
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if(pEMInfo->EMPktNum <= 7){
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dwtmp = pEMInfo->EMPktLen[6];
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}else{
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dwtmp = pEMInfo->EMPktLen[6];
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dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4;
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dwtmp += pEMInfo->EMPktLen[7];
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}
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SET_EARLYMODE_LEN3(VirtualAddress, dwtmp);
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if(pEMInfo->EMPktNum <= 9){
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dwtmp = pEMInfo->EMPktLen[8];
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}else{
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dwtmp = pEMInfo->EMPktLen[8];
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dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4;
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dwtmp += pEMInfo->EMPktLen[9];
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}
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SET_EARLYMODE_LEN4(VirtualAddress, dwtmp);
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#else
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SET_EARLYMODE_PKTNUM(VirtualAddress, pEMInfo->EMPktNum);
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SET_EARLYMODE_LEN0(VirtualAddress, pEMInfo->EMPktLen[0]);
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SET_EARLYMODE_LEN1(VirtualAddress, pEMInfo->EMPktLen[1]);
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SET_EARLYMODE_LEN2_1(VirtualAddress, pEMInfo->EMPktLen[2]&0xF);
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SET_EARLYMODE_LEN2_2(VirtualAddress, pEMInfo->EMPktLen[2]>>4);
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SET_EARLYMODE_LEN3(VirtualAddress, pEMInfo->EMPktLen[3]);
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SET_EARLYMODE_LEN4(VirtualAddress, pEMInfo->EMPktLen[4]);
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#endif
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//RT_PRINT_DATA(COMP_SEND, DBG_LOUD, "EMHdr:", VirtualAddress, 8);
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}
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void UpdateEarlyModeInfo8192E(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmitbuf )
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{
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//_adapter *padapter, struct xmit_frame *pxmitframe,struct tx_servq *ptxservq
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int index,j;
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u16 offset,pktlen;
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PTXDESC_8192E ptxdesc;
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u8 *pmem,*pEMInfo_mem;
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s8 node_num_0=0,node_num_1=0;
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struct EMInfo eminfo;
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struct agg_pkt_info *paggpkt;
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struct xmit_frame *pframe = (struct xmit_frame*)pxmitbuf->priv_data;
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pmem= pframe->buf_addr;
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#ifdef DBG_EMINFO
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DBG_8192C("\n%s ==> agg_num:%d\n",__FUNCTION__, pframe->agg_num);
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for(index=0;index<pframe->agg_num;index++){
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offset = pxmitpriv->agg_pkt[index].offset;
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pktlen = pxmitpriv->agg_pkt[index].pkt_len;
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DBG_8192C("%s ==> agg_pkt[%d].offset=%d\n",__FUNCTION__,index,offset);
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DBG_8192C("%s ==> agg_pkt[%d].pkt_len=%d\n",__FUNCTION__,index,pktlen);
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}
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#endif
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if( pframe->agg_num > EARLY_MODE_MAX_PKT_NUM)
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{
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node_num_0 = pframe->agg_num;
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node_num_1= EARLY_MODE_MAX_PKT_NUM-1;
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}
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for(index=0;index<pframe->agg_num;index++){
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offset = pxmitpriv->agg_pkt[index].offset;
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pktlen = pxmitpriv->agg_pkt[index].pkt_len;
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_rtw_memset(&eminfo,0,sizeof(struct EMInfo));
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if( pframe->agg_num > EARLY_MODE_MAX_PKT_NUM){
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if(node_num_0 > EARLY_MODE_MAX_PKT_NUM){
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eminfo.EMPktNum = EARLY_MODE_MAX_PKT_NUM;
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node_num_0--;
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}
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else{
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eminfo.EMPktNum = node_num_1;
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node_num_1--;
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}
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}
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else{
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eminfo.EMPktNum = pframe->agg_num-(index+1);
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}
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for(j=0;j< eminfo.EMPktNum ;j++){
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eminfo.EMPktLen[j] = pxmitpriv->agg_pkt[index+1+j].pkt_len+4;// 4 bytes CRC
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}
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if(pmem){
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if(index==0){
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ptxdesc = (PTXDESC_8192E)(pmem);
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pEMInfo_mem = ((u8 *)ptxdesc)+TXDESC_SIZE;
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}
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else{
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pmem = pmem + pxmitpriv->agg_pkt[index-1].offset;
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ptxdesc = (PTXDESC_8192E)(pmem);
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pEMInfo_mem = ((u8 *)ptxdesc)+TXDESC_SIZE;
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}
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#ifdef DBG_EMINFO
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DBG_8192C("%s ==> desc.pkt_len=%d\n",__FUNCTION__,ptxdesc->pktlen);
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#endif
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InsertEMContent_8192E(&eminfo,pEMInfo_mem);
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}
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}
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_rtw_memset(pxmitpriv->agg_pkt,0,sizeof(struct agg_pkt_info)*MAX_AGG_PKT_NUM);
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}
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#endif
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#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) ||(DEV_BUS_TYPE == RT_SDIO_INTERFACE))
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void rtl8192e_cal_txdesc_chksum(u8 *ptxdesc)
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{
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u16 *usPtr = (u16*)ptxdesc;
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u32 count = 16; // (32 bytes / 2 bytes per XOR) => 16 times
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u32 index;
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u16 checksum = 0;
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//Clear first
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SET_TX_DESC_TX_DESC_CHECKSUM_92E(ptxdesc, 0);
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for(index = 0 ; index < count ; index++){
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checksum = checksum ^ le16_to_cpu(*(usPtr + index));
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}
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SET_TX_DESC_TX_DESC_CHECKSUM_92E(ptxdesc, checksum);
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}
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#endif
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void fill_txdesc_sectype(struct pkt_attrib *pattrib, u8 *ptxdesc)
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{
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if ((pattrib->encrypt > 0) && !pattrib->bswenc)
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{
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switch (pattrib->encrypt)
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{
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//SEC_TYPE : 0:NO_ENC,1:WEP40/TKIP,2:WAPI,3:AES
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case _WEP40_:
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case _WEP104_:
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case _TKIP_:
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case _TKIP_WTMIC_:
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SET_TX_DESC_SEC_TYPE_92E(ptxdesc, 0x1);
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break;
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#ifdef CONFIG_WAPI_SUPPORT
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case _SMS4_:
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SET_TX_DESC_SEC_TYPE_92E(ptxdesc, 0x2);
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break;
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#endif
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case _AES_:
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SET_TX_DESC_SEC_TYPE_92E(ptxdesc, 0x3);
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break;
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case _NO_PRIVACY_:
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default:
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SET_TX_DESC_SEC_TYPE_92E(ptxdesc, 0x0);
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break;
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}
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}
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}
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void fill_txdesc_vcs(struct pkt_attrib *pattrib, u8 *ptxdesc)
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{
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//DBG_8192C("cvs_mode=%d\n", pattrib->vcs_mode);
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SET_TX_DESC_HW_RTS_ENABLE_92E(ptxdesc, 0);
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switch(pattrib->vcs_mode)
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{
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case RTS_CTS:
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SET_TX_DESC_RTS_ENABLE_92E(ptxdesc, 1);
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break;
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case CTS_TO_SELF:
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SET_TX_DESC_CTS2SELF_92E(ptxdesc, 1);
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break;
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case NONE_VCS:
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default:
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break;
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}
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#if 0 //to do
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// Protection mode related
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if(pTcb->bRTSEnable || pTcb->bCTSEnable)
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{
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SET_TX_DESC_CCA_RTS_92E(pDesc, pTcb->RTSCCA);
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//SET_TX_DESC_RTS_ENABLE_92E(pDesc, ((pTcb->bRTSEnable && !pTcb->bCTSEnable) ? 1 : 0));
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//SET_TX_DESC_CTS2SELF_92E(pDesc, ((pTcb->bCTSEnable) ? 1 : 0));
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SET_TX_DESC_CTROL_STBC_92E(pDesc, ((pTcb->bRTSSTBC) ? 1 : 0));
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SET_TX_DESC_RTS_SHORT_92E(pDesc, pTcb->bRTSShort);
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SET_TX_DESC_RTS_RATE_92E(pDesc, MRateToHwRate((u1Byte)pTcb->RTSRate));
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if(pMgntInfo->ForcedProtectionMode == PROTECTION_MODE_FORCE_ENABLE)
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{
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SET_TX_DESC_RTS_RATE_FB_LIMIT_92E(pDesc, 1);
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}
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else
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{
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SET_TX_DESC_RTS_RATE_FB_LIMIT_92E(pDesc, 0xF);
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}
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}
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#endif
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}
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u8
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BWMapping_92E(
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IN PADAPTER Adapter,
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IN struct pkt_attrib *pattrib
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)
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{
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u8 BWSettingOfDesc = 0;
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PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
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//DBG_871X("BWMapping pHalData->CurrentChannelBW %d, pattrib->bwmode %d \n",pHalData->CurrentChannelBW,pattrib->bwmode);
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if(pHalData->CurrentChannelBW== CHANNEL_WIDTH_40)
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{
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if(pattrib->bwmode == CHANNEL_WIDTH_40)
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BWSettingOfDesc = 1;
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else
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BWSettingOfDesc = 0;
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}
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else
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BWSettingOfDesc = 0;
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//if(pTcb->bBTTxPacket)
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// BWSettingOfDesc = 0;
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return BWSettingOfDesc;
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}
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u8
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SCMapping_92E(
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IN PADAPTER Adapter,
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IN struct pkt_attrib *pattrib
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)
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{
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u8 SCSettingOfDesc = 0;
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PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
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//DBG_871X("SCMapping: pHalData->CurrentChannelBW %d, pHalData->nCur80MhzPrimeSC %d, pHalData->nCur40MhzPrimeSC %d \n",pHalData->CurrentChannelBW,pHalData->nCur80MhzPrimeSC,pHalData->nCur40MhzPrimeSC);
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if(pHalData->CurrentChannelBW == CHANNEL_WIDTH_80)
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{
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if(pattrib->bwmode == CHANNEL_WIDTH_80)
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{
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SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE;
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}
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else if(pattrib->bwmode == CHANNEL_WIDTH_40)
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{
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if(pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)
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SCSettingOfDesc = VHT_DATA_SC_40_LOWER_OF_80MHZ;
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else if(pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)
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SCSettingOfDesc = VHT_DATA_SC_40_UPPER_OF_80MHZ;
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else
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DBG_871X("%s- CurrentChannelBW:%d, SCMapping: DONOT CARE Mode Setting\n", __func__, pHalData->CurrentChannelBW);
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}
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else
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{
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if((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER))
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SCSettingOfDesc = VHT_DATA_SC_20_LOWEST_OF_80MHZ;
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else if((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER))
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SCSettingOfDesc = VHT_DATA_SC_20_LOWER_OF_80MHZ;
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else if((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER))
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SCSettingOfDesc = VHT_DATA_SC_20_UPPER_OF_80MHZ;
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else if((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER))
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SCSettingOfDesc = VHT_DATA_SC_20_UPPERST_OF_80MHZ;
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else
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DBG_871X("%s- CurrentChannelBW:%d, SCMapping: DONOT CARE Mode Setting\n", __func__, pHalData->CurrentChannelBW);
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}
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}
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else if(pHalData->CurrentChannelBW== CHANNEL_WIDTH_40)
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{
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//DBG_871X("SCMapping: HT Case: pHalData->CurrentChannelBW %d, pHalData->nCur40MhzPrimeSC %d \n",pHalData->CurrentChannelBW,pHalData->nCur40MhzPrimeSC);
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if(pattrib->bwmode == CHANNEL_WIDTH_40)
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{
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SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE;
|
|
}
|
|
else if(pattrib->bwmode == CHANNEL_WIDTH_20)
|
|
{
|
|
if(pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)
|
|
{
|
|
SCSettingOfDesc = VHT_DATA_SC_20_UPPER_OF_80MHZ;
|
|
}
|
|
else if(pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)
|
|
{
|
|
SCSettingOfDesc = VHT_DATA_SC_20_LOWER_OF_80MHZ;
|
|
}
|
|
else
|
|
{
|
|
SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE;
|
|
}
|
|
|
|
}
|
|
}
|
|
else
|
|
{
|
|
SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE;
|
|
}
|
|
|
|
return SCSettingOfDesc;
|
|
}
|
|
|
|
void fill_txdesc_phy(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc)
|
|
{
|
|
//DBG_8192C("bwmode=%d, ch_off=%d\n", pattrib->bwmode, pattrib->ch_offset);
|
|
|
|
if(pattrib->ht_en)
|
|
{
|
|
// Set Bandwidth and sub-channel settings.
|
|
SET_TX_DESC_DATA_BW_92E(ptxdesc, BWMapping_92E(padapter,pattrib));
|
|
|
|
SET_TX_DESC_DATA_SC_92E(ptxdesc, SCMapping_92E(padapter,pattrib));
|
|
}
|
|
}
|
|
|
|
void rtl8192e_fixed_rate(_adapter *padapter,u8 *ptxdesc)
|
|
{
|
|
if(padapter->fix_rate!= 0xFF){
|
|
|
|
SET_TX_DESC_USE_RATE_92E(ptxdesc, 1);
|
|
//if(pHalData->INIDATA_RATE[pattrib->mac_id] & BIT(7))
|
|
{
|
|
if(padapter->fix_rate & BIT(7))
|
|
SET_TX_DESC_DATA_SHORT_92E(ptxdesc, 1);
|
|
}
|
|
SET_TX_DESC_TX_RATE_92E(ptxdesc, (padapter->fix_rate & 0x7F));
|
|
//SET_TX_DESC_DISABLE_FB_92E(ptxdesc,1);
|
|
if (!padapter->data_fb)
|
|
SET_TX_DESC_DISABLE_FB_92E(ptxdesc,1);
|
|
|
|
//ptxdesc->datarate = padapter->fix_rate;
|
|
}
|
|
|
|
}
|
|
|
|
//
|
|
// Description: In normal chip, we should send some packet to Hw which will be used by Fw
|
|
// in FW LPS mode. The function is to fill the Tx descriptor of this packets, then
|
|
// Fw can tell Hw to send these packet derectly.
|
|
//
|
|
void rtl8192e_fill_fake_txdesc(
|
|
PADAPTER padapter,
|
|
u8* pDesc,
|
|
u32 BufferLen,
|
|
u8 IsPsPoll,
|
|
u8 IsBTQosNull,
|
|
u8 bDataFrame)
|
|
{
|
|
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
|
|
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
|
|
|
|
// Clear all status
|
|
_rtw_memset(pDesc, 0, TXDESC_SIZE);
|
|
|
|
SET_TX_DESC_OFFSET_92E(pDesc, (TXDESC_SIZE+OFFSET_SZ));
|
|
|
|
SET_TX_DESC_PKT_SIZE_92E(pDesc, BufferLen);
|
|
|
|
if (pmlmeext->cur_wireless_mode & WIRELESS_11B) {
|
|
SET_TX_DESC_RATE_ID_92E(pDesc, RATEID_IDX_B);
|
|
} else {
|
|
SET_TX_DESC_RATE_ID_92E(pDesc, RATEID_IDX_G);
|
|
}
|
|
|
|
SET_TX_DESC_QUEUE_SEL_92E(pDesc, QSLT_MGNT);
|
|
|
|
//Set NAVUSEHDR to prevent Ps-poll AId filed to be changed to error vlaue by Hw.
|
|
if (IsPsPoll)
|
|
{
|
|
SET_TX_DESC_NAV_USE_HDR_92E(pDesc, 1);
|
|
}
|
|
else
|
|
{
|
|
SET_TX_DESC_EN_HWSEQ_92E(pDesc, 1); // Hw set sequence number
|
|
SET_TX_DESC_HWSEQ_SEL_92E(pDesc, pxmitpriv->hw_ssn_seq_no);
|
|
}
|
|
|
|
SET_TX_DESC_USE_RATE_92E(pDesc, 1);
|
|
SET_TX_DESC_TX_RATE_92E(pDesc, MRateToHwRate(pmlmeext->tx_rate));
|
|
|
|
//
|
|
// Encrypt the data frame if under security mode excepct null data. Suggested by CCW.
|
|
//
|
|
if (_TRUE ==bDataFrame)
|
|
{
|
|
struct pkt_attrib pattrib;
|
|
pattrib.encrypt = padapter->securitypriv.dot11PrivacyAlgrthm;
|
|
pattrib.bswenc = _FALSE;
|
|
fill_txdesc_sectype(&pattrib, pDesc);
|
|
}
|
|
|
|
#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)
|
|
// USB interface drop packet if the checksum of descriptor isn't correct.
|
|
// Using this checksum can let hardware recovery from packet bulk out error (e.g. Cancel URC, Bulk out error.).
|
|
rtl8192e_cal_txdesc_chksum(pDesc);
|
|
#endif
|
|
}
|
|
|