diff --git a/core/efuse/rtw_efuse.c b/core/efuse/rtw_efuse.c
index 570414b..a703589 100644
--- a/core/efuse/rtw_efuse.c
+++ b/core/efuse/rtw_efuse.c
@@ -2097,7 +2097,7 @@ efuse_OneByteRead(
 	rtw_write8(pAdapter, EFUSE_CTRL + 3, (readbyte & 0x7f));
 
 	while (!(0x80 & rtw_read8(pAdapter, EFUSE_CTRL + 3)) && (tmpidx < 1000)) {
-		rtw_mdelay_os(1);
+		mdelay(1);
 		tmpidx++;
 	}
 	if (tmpidx < 100) {
@@ -2158,10 +2158,10 @@ efuse_OneByteWrite(
 	} else
 		rtw_write32(pAdapter, EFUSE_CTRL, efuseValue);
 
-	rtw_mdelay_os(1);
+	mdelay(1);
 
 	while ((0x80 &  rtw_read8(pAdapter, EFUSE_CTRL + 3)) && (tmpidx < 100)) {
-		rtw_mdelay_os(1);
+		mdelay(1);
 		tmpidx++;
 	}
 
diff --git a/core/rtw_mp.c b/core/rtw_mp.c
index f7d221a..9175f6a 100644
--- a/core/rtw_mp.c
+++ b/core/rtw_mp.c
@@ -2388,11 +2388,11 @@ static u32 rtw_GetPSDData(PADAPTER pAdapter, u32 point)
 	psd_val |= point;
 
 	rtw_write32(pAdapter, psd_reg, psd_val);
-	rtw_mdelay_os(1);
+	mdelay(1);
 	psd_val |= 0x00400000;
 
 	rtw_write32(pAdapter, psd_reg, psd_val);
-	rtw_mdelay_os(1);
+	mdelay(1);
 
 	psd_val = rtw_read32(pAdapter, psd_regL);
 #if defined(CONFIG_RTL8821C)
@@ -2457,7 +2457,7 @@ u32 mp_query_psd(PADAPTER pAdapter, u8 *data)
 #ifdef CONFIG_LONG_DELAY_ISSUE
 	msleep(100);
 #else
-	rtw_mdelay_os(100);
+	mdelay(100);
 #endif
 
 	if (psd_analysis)
diff --git a/core/rtw_pwrctrl.c b/core/rtw_pwrctrl.c
index e3445fd..7aeaf3a 100644
--- a/core/rtw_pwrctrl.c
+++ b/core/rtw_pwrctrl.c
@@ -781,7 +781,7 @@ void rtw_set_fw_in_ips_mode(PADAPTER padapter, u8 enable)
 			cnt++;
 			RTW_INFO("%s  polling REG_HMETFR=0x%x, cnt=%d\n",
 				 __func__, val8, cnt);
-			rtw_mdelay_os(10);
+			mdelay(10);
 		} while (cnt < 100 && (val8 != 0));
 
 #ifdef CONFIG_LPS_LCLK
@@ -806,7 +806,7 @@ void rtw_set_fw_in_ips_mode(PADAPTER padapter, u8 enable)
 						 __func__,
 						 rtw_read8(padapter, 0x08),
 						 rtw_read8(padapter, 0x03));
-					rtw_mdelay_os(10);
+					mdelay(10);
 				} while (cnt < 20 && (val8 != 0xEA));
 			}
 		}
@@ -832,7 +832,7 @@ void rtw_set_fw_in_ips_mode(PADAPTER padapter, u8 enable)
 		start_time = rtw_get_current_time();
 		do {
 
-			rtw_mdelay_os(1);
+			mdelay(1);
 
 			rtw_hal_get_hwreg(padapter, HW_VAR_CPWM, &cpwm_now);
 			if ((cpwm_orig ^ cpwm_now) & 0x80)
diff --git a/hal/btc/halbtc8192e2ant.c b/hal/btc/halbtc8192e2ant.c
index 8bc80d0..1465f2f 100644
--- a/hal/btc/halbtc8192e2ant.c
+++ b/hal/btc/halbtc8192e2ant.c
@@ -942,7 +942,7 @@ void halbtc8192e2ant_dac_swing(IN struct btc_coexist *btcoexist,
 		     coex_dm->cur_dac_swing_lvl))
 			return;
 	}
-	delay_ms(30);
+	mdelay(30);
 	halbtc8192e2ant_set_sw_full_time_dac_swing(btcoexist, dac_swing_on,
 			dac_swing_lvl);
 
@@ -1562,7 +1562,7 @@ void halbtc8192e2ant_ps_tdma(IN struct btc_coexist *btcoexist,
 			break;
 		case 1:  /* ANT2BT, 0x778=3 */
 			halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x0, 0x0, 0x0, 0x8, 0x0);
-			delay_ms(5);
+			mdelay(5);
 			halbtc8192e2ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, false, false);
 			break;
 		}
diff --git a/hal/btc/mp_precomp.h b/hal/btc/mp_precomp.h
index 35f5a9c..798d7df 100644
--- a/hal/btc/mp_precomp.h
+++ b/hal/btc/mp_precomp.h
@@ -29,8 +29,6 @@
 
 #define DCMD_Printf			DBG_BT_INFO
 
-#define delay_ms(ms)		rtw_mdelay_os(ms)
-
 #ifdef bEnable
 #undef bEnable
 #endif
diff --git a/hal/hal_com.c b/hal/hal_com.c
index 62454a1..cb6ddad 100644
--- a/hal/hal_com.c
+++ b/hal/hal_com.c
@@ -8770,7 +8770,7 @@ static void rtw_hal_gate_bb(_adapter *adapter, bool stop)
 			} else {
 				RTW_WARN("%s: MGQ_CPU is busy(%d)!\n",
 					 __func__, i);
-				rtw_mdelay_os(10);
+				mdelay(10);
 			}
 		}
 
diff --git a/hal/hal_com_phycfg.c b/hal/hal_com_phycfg.c
index d186310..7e89e64 100644
--- a/hal/hal_com_phycfg.c
+++ b/hal/hal_com_phycfg.c
@@ -4209,12 +4209,12 @@ phy_ConfigBBWithParaFile(
 #ifdef CONFIG_LONG_DELAY_ISSUE
 						msleep(50);
 #else
-						rtw_mdelay_os(50);
+						mdelay(50);
 #endif
 					} else if (u4bRegOffset == 0xfd)
-						rtw_mdelay_os(5);
+						mdelay(5);
 					else if (u4bRegOffset == 0xfc)
-						rtw_mdelay_os(1);
+						mdelay(1);
 					else if (u4bRegOffset == 0xfb)
 						rtw_udelay_os(50);
 					else if (u4bRegOffset == 0xfa)
@@ -4557,12 +4557,12 @@ phy_ConfigBBWithMpParaFile(
 #ifdef CONFIG_LONG_DELAY_ISSUE
 						msleep(50);
 #else
-						rtw_mdelay_os(50);
+						mdelay(50);
 #endif
 					} else if (u4bRegOffset == 0xfd)
-						rtw_mdelay_os(5);
+						mdelay(5);
 					else if (u4bRegOffset == 0xfc)
-						rtw_mdelay_os(1);
+						mdelay(1);
 					else if (u4bRegOffset == 0xfb)
 						rtw_udelay_os(50);
 					else if (u4bRegOffset == 0xfa)
@@ -4671,14 +4671,14 @@ PHY_ConfigRFWithParaFile(
 #ifdef CONFIG_LONG_DELAY_ISSUE
 						msleep(50);
 #else
-						rtw_mdelay_os(50);
+						mdelay(50);
 #endif
 					} else if (u4bRegOffset == 0xfd) {
-						/* delay_ms(5); */
+						/* mdelay(5); */
 						for (i = 0; i < 100; i++)
 							rtw_udelay_os(MAX_STALL_TIME);
 					} else if (u4bRegOffset == 0xfc) {
-						/* delay_ms(1); */
+						/* mdelay(1); */
 						for (i = 0; i < 20; i++)
 							rtw_udelay_os(MAX_STALL_TIME);
 					} else if (u4bRegOffset == 0xfb)
diff --git a/hal/hal_mp.c b/hal/hal_mp.c
index a6811a2..fab9814 100644
--- a/hal/hal_mp.c
+++ b/hal/hal_mp.c
@@ -2055,7 +2055,7 @@ static	VOID mpt_StopOfdmContTx(
 	else
 		phy_set_bb_reg(pAdapter, rOFDM1_LSTF, BIT30 | BIT29 | BIT28, OFDM_ALL_OFF);
 
-	rtw_mdelay_os(10);
+	mdelay(10);
 
 	if (!IS_HARDWARE_TYPE_JAGUAR(pAdapter) && !IS_HARDWARE_TYPE_JAGUAR2(pAdapter)) {
 		phy_set_bb_reg(pAdapter, 0xa14, 0x300, 0x0);			/* 0xa15[1:0] = 0*/
diff --git a/hal/phydm/halrf/halphyrf_ap.c b/hal/phydm/halrf/halphyrf_ap.c
index c4967e2..4df219e 100644
--- a/hal/phydm/halrf/halphyrf_ap.c
+++ b/hal/phydm/halrf/halphyrf_ap.c
@@ -300,7 +300,7 @@ odm_txpowertracking_callback_thermal_meter_92e(
 			reg0x18 = phy_query_rf_reg(priv, RF_PATH_A, 0x18, MASK20BITS, 1);
 			phy_set_rf_reg(priv, RF_PATH_A, 0xB4, BIT(14), 1);
 			phy_set_rf_reg(priv, RF_PATH_A, 0x18, BIT(15), 1);
-			delay_ms(1);
+			mdelay(1);
 			phy_set_rf_reg(priv, RF_PATH_A, 0xB4, BIT(14), 0);
 			phy_set_rf_reg(priv, RF_PATH_A, 0x18, MASK20BITS, reg0x18);
 			RTL_W8(0x522, 0x0);
@@ -1003,7 +1003,7 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series(
 			reg0x18 = phy_query_rf_reg(priv, RF_PATH_A, 0x18, MASK20BITS, 1);
 			phy_set_rf_reg(priv, RF_PATH_A, 0xB4, BIT(14), 1);
 			phy_set_rf_reg(priv, RF_PATH_A, 0x18, BIT(15), 1);
-			delay_ms(200); /* frequency deviation */
+			mdelay(200); /* frequency deviation */
 			phy_set_rf_reg(priv, RF_PATH_A, 0xB4, BIT(14), 0);
 			phy_set_rf_reg(priv, RF_PATH_A, 0x18, MASK20BITS, reg0x18);
 #ifdef CONFIG_RTL_8812_SUPPORT
diff --git a/hal/phydm/phydm_interface.c b/hal/phydm/phydm_interface.c
index c5f9799..bf5fb55 100644
--- a/hal/phydm/phydm_interface.c
+++ b/hal/phydm/phydm_interface.c
@@ -592,17 +592,17 @@ odm_is_work_item_scheduled(
 void ODM_delay_ms(u32 ms)
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
-	delay_ms(ms);
+	mdelay(ms);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
 	mdelay(ms);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
 	mdelay(ms);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
-	rtw_mdelay_os(ms);
+	mdelay(ms);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	delay_ms(ms);
+	mdelay(ms);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
-	rtw_mdelay_os(ms);
+	mdelay(ms);
 #endif
 }
 
@@ -626,7 +626,7 @@ void ODM_delay_us(u32 us)
 void ODM_sleep_ms(u32 ms)
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
-	delay_ms(ms);
+	mdelay(ms);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
 	msleep(ms);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
@@ -634,7 +634,7 @@ void ODM_sleep_ms(u32 ms)
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 	msleep(ms);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	delay_ms(ms);
+	mdelay(ms);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
 	msleep(ms);
 #endif
diff --git a/hal/phydm/txbf/haltxbf8822b.c b/hal/phydm/txbf/haltxbf8822b.c
index f25912a..a40316c 100644
--- a/hal/phydm/txbf/haltxbf8822b.c
+++ b/hal/phydm/txbf/haltxbf8822b.c
@@ -600,7 +600,7 @@ void hal_txbf_8822b_enter(
 		hal_txbf_8822b_rf_mode(dm, beamforming_info, bfee_idx);
 #if (SUPPORT_MU_BF == 1)
 		/*Special for plugfest*/
-		delay_ms(50); /* wait for 4-way handshake ending*/
+		mdelay(50); /* wait for 4-way handshake ending*/
 		send_sw_vht_gid_mgnt_frame(dm, p_beamformee_entry->mac_addr, bfee_idx);
 #endif
 
diff --git a/hal/rtl8192e/rtl8192e_cmd.c b/hal/rtl8192e/rtl8192e_cmd.c
index 6dbeaac..4c20be3 100644
--- a/hal/rtl8192e/rtl8192e_cmd.c
+++ b/hal/rtl8192e/rtl8192e_cmd.c
@@ -354,7 +354,7 @@ void rtl8192e_download_rsvd_page(PADAPTER padapter, u8 mstatus)
 			DLBcnCount++;
 			do {
 				yield();
-				/* rtw_mdelay_os(10); */
+				/* mdelay(10); */
 				/* check rsvd page download OK. */
 				rtw_hal_get_hwreg(padapter, HW_VAR_BCN_VALID, (u8 *)(&bcn_valid));
 				poll++;
diff --git a/hal/rtl8192e/rtl8192e_hal_init.c b/hal/rtl8192e/rtl8192e_hal_init.c
index c31564e..eb7d39f 100644
--- a/hal/rtl8192e/rtl8192e_hal_init.c
+++ b/hal/rtl8192e/rtl8192e_hal_init.c
@@ -3867,8 +3867,8 @@ u8 SetHwReg8192E(PADAPTER Adapter, u8 variable, u8 *val)
 			ulCommand = CAM_CONTENT_COUNT * ucIndex + i;
 			ulCommand = ulCommand | CAM_POLLINIG | CAM_WRITE;
 			/* write content 0 is equall to mark invalid */
-			rtw_write32(Adapter, WCAMI, ulContent);  /* delay_ms(40); */
-			rtw_write32(Adapter, RWCAM, ulCommand);  /* delay_ms(40); */
+			rtw_write32(Adapter, WCAMI, ulContent);  /* mdelay(40); */
+			rtw_write32(Adapter, RWCAM, ulCommand);  /* mdelay(40); */
 		}
 	}
 	break;
@@ -3994,7 +3994,7 @@ u8 SetHwReg8192E(PADAPTER Adapter, u8 variable, u8 *val)
 			/* RQPN Load 0 */
 			rtw_write16(Adapter, REG_RQPN_NPQ, 0x0);
 			rtw_write32(Adapter, REG_RQPN, 0x80000000);
-			rtw_mdelay_os(10);
+			mdelay(10);
 		}
 	}
 	break;
diff --git a/hal/rtl8192e/rtl8192e_phycfg.c b/hal/rtl8192e/rtl8192e_phycfg.c
index 6842de4..8dc9d3c 100644
--- a/hal/rtl8192e/rtl8192e_phycfg.c
+++ b/hal/rtl8192e/rtl8192e_phycfg.c
@@ -931,7 +931,7 @@ phy_SpurCalibration_8192E(
 		phy_set_bb_reg(Adapter, rFPGA0_PSDFunction, bMaskDWord, 0xfccd);
 		phy_set_bb_reg(Adapter, rFPGA0_PSDFunction, bMaskDWord, 0x40fccd);
 		/* msleep(30); */
-		rtw_mdelay_os(30);
+		mdelay(30);
 		PSDReport = phy_query_bb_reg(Adapter, rFPGA0_PSDReport, bMaskDWord);
 		/* RTW_INFO(" Path A== PSDReport = 0x%x (%d)\n",PSDReport,PSDReport); */
 		if (PSDReport < 0x16)
@@ -946,7 +946,7 @@ phy_SpurCalibration_8192E(
 		phy_set_bb_reg(Adapter, rFPGA0_PSDFunction, bMaskDWord, 0xfccd);
 		phy_set_bb_reg(Adapter, rFPGA0_PSDFunction, bMaskDWord, 0x40fccd);
 		/* msleep(30); */
-		rtw_mdelay_os(30);
+		mdelay(30);
 		PSDReport = phy_query_bb_reg(Adapter, rFPGA0_PSDReport, bMaskDWord);
 		/* RTW_INFO(" Path B== PSDReport = 0x%x (%d)\n",PSDReport,PSDReport); */
 		if (PSDReport < 0x16)
diff --git a/include/osdep_service.h b/include/osdep_service.h
index 093e405..1f2572a 100644
--- a/include/osdep_service.h
+++ b/include/osdep_service.h
@@ -369,12 +369,9 @@ extern void	rtw_usleep_os(int us);
 extern u32	rtw_atoi(u8 *s);
 
 #ifdef DBG_DELAY_OS
-#define rtw_mdelay_os(ms) _rtw_mdelay_os((ms), __FUNCTION__, __LINE__)
 #define rtw_udelay_os(ms) _rtw_udelay_os((ms), __FUNCTION__, __LINE__)
-extern void _rtw_mdelay_os(int ms, const char *func, const int line);
 extern void _rtw_udelay_os(int us, const char *func, const int line);
 #else
-extern void	rtw_mdelay_os(int ms);
 extern void	rtw_udelay_os(int us);
 #endif
 
diff --git a/os_dep/linux/rtw_android.c b/os_dep/linux/rtw_android.c
index d0780df..93c4f77 100644
--- a/os_dep/linux/rtw_android.c
+++ b/os_dep/linux/rtw_android.c
@@ -1186,7 +1186,7 @@ static void shutdown_card(void)
 			break;
 		}
 
-		rtw_mdelay_os(10);
+		mdelay(10);
 	} while (1);
 
 	/* unlock register I/O */
diff --git a/os_dep/osdep_service.c b/os_dep/osdep_service.c
index 3d35bf3..1aad193 100644
--- a/os_dep/osdep_service.c
+++ b/os_dep/osdep_service.c
@@ -1606,32 +1606,7 @@ void rtw_usleep_os(int us)
 
 }
 
-
 #ifdef DBG_DELAY_OS
-void _rtw_mdelay_os(int ms, const char *func, const int line)
-{
-#if 0
-	if (ms > 10)
-		RTW_INFO("%s:%d %s(%d)\n", func, line, __FUNCTION__, ms);
-	msleep(ms);
-	return;
-#endif
-
-
-	RTW_INFO("%s:%d %s(%d)\n", func, line, __FUNCTION__, ms);
-
-#if defined(PLATFORM_LINUX)
-
-	mdelay((unsigned long)ms);
-
-#elif defined(PLATFORM_WINDOWS)
-
-	NdisStallExecution(ms * 1000); /* (us)*1000=(ms) */
-
-#endif
-
-
-}
 void _rtw_udelay_os(int us, const char *func, const int line)
 {
 
@@ -1658,27 +1633,7 @@ void _rtw_udelay_os(int us, const char *func, const int line)
 #endif
 
 }
-#else
-void rtw_mdelay_os(int ms)
-{
 
-#ifdef PLATFORM_LINUX
-
-	mdelay((unsigned long)ms);
-
-#endif
-#ifdef PLATFORM_FREEBSD
-	DELAY(ms * 1000);
-	return ;
-#endif
-#ifdef PLATFORM_WINDOWS
-
-	NdisStallExecution(ms * 1000); /* (us)*1000=(ms) */
-
-#endif
-
-
-}
 void rtw_udelay_os(int us)
 {
 
diff --git a/platform/platform_sprd_sdio.c b/platform/platform_sprd_sdio.c
index 34061d0..035d00c 100644
--- a/platform/platform_sprd_sdio.c
+++ b/platform/platform_sprd_sdio.c
@@ -41,15 +41,15 @@ int platform_wifi_power_on(void)
 	/* Pull up BT reset pin. */
 	rtw_wifi_gpio_wlan_ctrl(WLAN_BT_PWDN_ON);
 #endif
-	rtw_mdelay_os(5);
+	mdelay(5);
 
 	sdhci_bus_scan();
 #ifdef CONFIG_RTL8723B
 	/* YJ,test,130305 */
-	rtw_mdelay_os(1000);
+	mdelay(1000);
 #endif
 #ifdef ANDROID_2X
-	rtw_mdelay_os(200);
+	mdelay(200);
 #else /* !ANDROID_2X */
 	if (1) {
 		int i = 0;
@@ -70,7 +70,7 @@ void platform_wifi_power_off(void)
 {
 	/* Pull down pwd pin, make wifi enter power down mode. */
 	rtw_wifi_gpio_wlan_ctrl(WLAN_PWDN_OFF);
-	rtw_mdelay_os(5);
+	mdelay(5);
 	rtw_wifi_gpio_deinit();
 
 #ifdef CONFIG_RTL8188E