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https://github.com/Mange/rtl8192eu-linux-driver
synced 2025-12-10 00:04:17 +00:00
Replace _rtw_memcpy with memcpy
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@@ -28,16 +28,16 @@ void interrupt_handler_8192eu(_adapter *padapter, u16 pkt_len, u8 *pbuf)
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}
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/* HISR */
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_rtw_memcpy(&(pHalData->IntArray[0]), &(pbuf[USB_INTR_CONTENT_HISR_OFFSET]), 4);
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_rtw_memcpy(&(pHalData->IntArray[1]), &(pbuf[USB_INTR_CONTENT_HISRE_OFFSET]), 4);
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memcpy(&(pHalData->IntArray[0]), &(pbuf[USB_INTR_CONTENT_HISR_OFFSET]), 4);
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memcpy(&(pHalData->IntArray[1]), &(pbuf[USB_INTR_CONTENT_HISRE_OFFSET]), 4);
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#if 0 /* DBG */
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{
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u32 hisr = 0 , hisr_ex = 0;
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_rtw_memcpy(&hisr, &(pHalData->IntArray[0]), 4);
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memcpy(&hisr, &(pHalData->IntArray[0]), 4);
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hisr = le32_to_cpu(hisr);
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_rtw_memcpy(&hisr_ex, &(pHalData->IntArray[1]), 4);
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memcpy(&hisr_ex, &(pHalData->IntArray[1]), 4);
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hisr_ex = le32_to_cpu(hisr_ex);
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if ((hisr != 0) || (hisr_ex != 0))
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@@ -68,8 +68,8 @@ void interrupt_handler_8192eu(_adapter *padapter, u16 pkt_len, u8 *pbuf)
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#ifdef CONFIG_LPS_LCLK
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if (pHalData->IntArray[0] & IMR_CPWM_88E) {
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_rtw_memcpy(&pwr_rpt.state, &(pbuf[USB_INTR_CONTENT_CPWM1_OFFSET]), 1);
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/* _rtw_memcpy(&pwr_rpt.state2, &(pbuf[USB_INTR_CONTENT_CPWM2_OFFSET]), 1); */
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memcpy(&pwr_rpt.state, &(pbuf[USB_INTR_CONTENT_CPWM1_OFFSET]), 1);
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/* memcpy(&pwr_rpt.state2, &(pbuf[USB_INTR_CONTENT_CPWM2_OFFSET]), 1); */
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/* 88e's cpwm value only change BIT0, so driver need to add PS_STATE_S2 for LPS flow. */
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pwr_rpt.state |= PS_STATE_S2;
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