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https://github.com/Mange/rtl8192eu-linux-driver
synced 2024-11-25 23:15:00 +00:00
remove HAL_{BB,MAC,RF,FW}_ENABLE macros
remove HAL_{BB,MAC,RF,FW}_ENABLE macros. They are used to turn on/off by hand some core capabilities we want to be always 'on'. port bb1c456d7f88b60b28b9f51e28031fc67cdb8d7b port b4e1882d750facd317ac2572d6bf36a05b0b0c36 Link: https://lore.kernel.org/r/04248acbd22f9be30d21891926e134490b34036a.1623756906.git.fabioaiuto83@gmail.com
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@ -760,9 +760,6 @@ void halrf_segment_iqk_trigger(void *dm_void, boolean clear,
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return;
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return;
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#endif
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#endif
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#if DISABLE_BB_RF
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return;
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#endif
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if (iqk_info->rfk_forbidden)
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if (iqk_info->rfk_forbidden)
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return;
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return;
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@ -1330,10 +1327,6 @@ void halrf_iqk_trigger(void *dm_void, boolean is_recovery)
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if (!(rf->rf_supportability & HAL_RF_IQK))
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if (!(rf->rf_supportability & HAL_RF_IQK))
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return;
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return;
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#if DISABLE_BB_RF
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return;
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#endif
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if (iqk_info->rfk_forbidden)
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if (iqk_info->rfk_forbidden)
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return;
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return;
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@ -1483,9 +1476,6 @@ void halrf_lck_trigger(void *dm_void)
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if (!(rf->rf_supportability & HAL_RF_LCK))
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if (!(rf->rf_supportability & HAL_RF_LCK))
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return;
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return;
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#if DISABLE_BB_RF
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return;
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#endif
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if (iqk_info->rfk_forbidden)
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if (iqk_info->rfk_forbidden)
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return;
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return;
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while (*dm->is_scan_in_process) {
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while (*dm->is_scan_in_process) {
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@ -1754,10 +1754,6 @@ void phy_set_rf_path_switch_8192e(
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HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
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HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
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#endif
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#endif
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#ifdef DISABLE_BB_RF
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return;
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#endif
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#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
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#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
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if (IS_92C_SERIAL(hal_data->version_id))
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if (IS_92C_SERIAL(hal_data->version_id))
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_phy_set_rf_path_switch_8192e(adapter, is_main, true);
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_phy_set_rf_path_switch_8192e(adapter, is_main, true);
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@ -1961,10 +1961,6 @@ void phy_set_rf_path_switch_8192e(
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HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
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HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
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#endif
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#endif
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#if DISABLE_BB_RF
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return;
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#endif
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#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
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#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
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#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
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#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
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_phy_set_rf_path_switch_8192e(dm, is_main, true);
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_phy_set_rf_path_switch_8192e(dm, is_main, true);
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@ -2012,9 +2008,6 @@ boolean phy_query_rf_path_switch_8192e(
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{
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{
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HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
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HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
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#if DISABLE_BB_RF
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return true;
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#endif
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#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
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#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
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if (IS_2T2R(hal_data->version_id))
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if (IS_2T2R(hal_data->version_id))
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return _phy_query_rf_path_switch_8192e(adapter, true);
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return _phy_query_rf_path_switch_8192e(adapter, true);
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@ -2070,10 +2070,6 @@ void phy_set_rf_path_switch_8192e(
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/* HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); */
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/* HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); */
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#endif
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#endif
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#if DISABLE_BB_RF
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return;
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#endif
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#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
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#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
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_phy_set_rf_path_switch_8192e(adapter, is_main, true);
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_phy_set_rf_path_switch_8192e(adapter, is_main, true);
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@ -2123,9 +2119,6 @@ boolean phy_query_rf_path_switch_8192e(
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{
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{
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HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
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HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
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#if DISABLE_BB_RF
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return true;
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#endif
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#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
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#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
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if (IS_2T2R(hal_data->VersionID))
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if (IS_2T2R(hal_data->VersionID))
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return _phy_query_rf_path_switch_8192e(adapter, true);
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return _phy_query_rf_path_switch_8192e(adapter, true);
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@ -3633,10 +3633,6 @@ VOID _InitBeaconMaxError_8192E(
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/* Set CCK and OFDM Block "ON" */
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/* Set CCK and OFDM Block "ON" */
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void _BBTurnOnBlock_8192E(PADAPTER padapter)
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void _BBTurnOnBlock_8192E(PADAPTER padapter)
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{
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{
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#if (DISABLE_BB_RF)
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return;
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#endif
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phy_set_bb_reg(padapter, rFPGA0_RFMOD, bCCKEn, 0x1);
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phy_set_bb_reg(padapter, rFPGA0_RFMOD, bCCKEn, 0x1);
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phy_set_bb_reg(padapter, rFPGA0_RFMOD, bOFDMEn, 0x1);
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phy_set_bb_reg(padapter, rFPGA0_RFMOD, bOFDMEn, 0x1);
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}
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}
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@ -3647,11 +3643,7 @@ hal_ReadRFType_8192E(
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{
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{
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
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#if DISABLE_BB_RF
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pHalData->rf_chip = RF_PSEUDO_11N;
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#else
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pHalData->rf_chip = RF_6052;
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pHalData->rf_chip = RF_6052;
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#endif
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pHalData->BandSet = BAND_ON_2_4G;
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pHalData->BandSet = BAND_ON_2_4G;
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@ -51,10 +51,6 @@ PHY_QueryBBReg8192E(
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{
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{
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u32 ReturnValue = 0, OriginalValue, BitShift;
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u32 ReturnValue = 0, OriginalValue, BitShift;
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#if (DISABLE_BB_RF == 1)
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return 0;
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#endif
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/* RTW_INFO("--->PHY_QueryBBReg8812(): RegAddr(%#x), BitMask(%#x)\n", RegAddr, BitMask); */
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/* RTW_INFO("--->PHY_QueryBBReg8812(): RegAddr(%#x), BitMask(%#x)\n", RegAddr, BitMask); */
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@ -77,10 +73,6 @@ PHY_SetBBReg8192E(
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{
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{
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u4Byte OriginalValue, BitShift;
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u4Byte OriginalValue, BitShift;
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#if (DISABLE_BB_RF == 1)
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return;
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#endif
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if (BitMask != bMaskDWord) {
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if (BitMask != bMaskDWord) {
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/* if not "double word" write */
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/* if not "double word" write */
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OriginalValue = rtw_read32(Adapter, RegAddr);
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OriginalValue = rtw_read32(Adapter, RegAddr);
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@ -230,10 +222,6 @@ PHY_QueryRFReg8192E(
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{
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{
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u32 Original_Value, Readback_Value, BitShift;
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u32 Original_Value, Readback_Value, BitShift;
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#if (DISABLE_BB_RF == 1)
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return 0;
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#endif
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Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr);
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Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr);
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BitShift = PHY_CalculateBitShift(BitMask);
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BitShift = PHY_CalculateBitShift(BitMask);
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@ -252,9 +240,6 @@ PHY_SetRFReg8192E(
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)
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)
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{
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{
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u32 Original_Value, BitShift;
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u32 Original_Value, BitShift;
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#if (DISABLE_BB_RF == 1)
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return;
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#endif
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if (BitMask == 0)
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if (BitMask == 0)
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return;
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return;
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@ -870,21 +870,17 @@ u32 rtl8192eu_hal_init(PADAPTER Adapter)
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pHalData->current_channel = 6;/* default set to 6 */
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pHalData->current_channel = 6;/* default set to 6 */
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HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MAC);
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HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MAC);
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#if (HAL_MAC_ENABLE == 1)
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status = PHY_MACConfig8192E(Adapter);
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status = PHY_MACConfig8192E(Adapter);
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if (status == _FAIL)
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if (status == _FAIL)
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goto exit;
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goto exit;
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#endif
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HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BB);
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HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BB);
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#if (HAL_BB_ENABLE == 1)
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status = PHY_BBConfig8192E(Adapter);
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status = PHY_BBConfig8192E(Adapter);
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if (status == _FAIL)
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if (status == _FAIL)
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goto exit;
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goto exit;
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#endif
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HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_RF);
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HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_RF);
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#if (HAL_RF_ENABLE == 1)
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status = PHY_RFConfig8192E(Adapter);
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status = PHY_RFConfig8192E(Adapter);
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if (status == _FAIL)
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if (status == _FAIL)
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goto exit;
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goto exit;
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@ -975,7 +971,6 @@ u32 rtl8192eu_hal_init(PADAPTER Adapter)
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#endif /* CONFIG_RTW_LED */
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#endif /* CONFIG_RTW_LED */
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_BBTurnOnBlock_8192E(Adapter);
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_BBTurnOnBlock_8192E(Adapter);
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#endif
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/* */
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/* */
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/* Joseph Note: Keep RfRegChnlVal for later use. */
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/* Joseph Note: Keep RfRegChnlVal for later use. */
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@ -237,8 +237,6 @@
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#define ENABLE_USB_DROP_INCORRECT_OUT
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#define ENABLE_USB_DROP_INCORRECT_OUT
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#define DISABLE_BB_RF 0
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#define RTW_CONFIG_RFREG18_WA
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#define RTW_CONFIG_RFREG18_WA
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/* #define RTL8191C_FPGA_NETWORKTYPE_ADHOC 0 */
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/* #define RTL8191C_FPGA_NETWORKTYPE_ADHOC 0 */
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@ -15,19 +15,6 @@
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#ifndef __HAL_PHY_H__
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#ifndef __HAL_PHY_H__
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#define __HAL_PHY_H__
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#define __HAL_PHY_H__
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#if DISABLE_BB_RF
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#define HAL_FW_ENABLE 0
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#define HAL_MAC_ENABLE 0
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#define HAL_BB_ENABLE 0
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#define HAL_RF_ENABLE 0
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#else /* FPGA_PHY and ASIC */
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#define HAL_FW_ENABLE 1
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#define HAL_MAC_ENABLE 1
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#define HAL_BB_ENABLE 1
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#define HAL_RF_ENABLE 1
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#endif
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#define RF6052_MAX_TX_PWR 0x3F
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#define RF6052_MAX_TX_PWR 0x3F
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#define RF6052_MAX_REG_88E 0xFF
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#define RF6052_MAX_REG_88E 0xFF
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#define RF6052_MAX_REG_92C 0x7F
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#define RF6052_MAX_REG_92C 0x7F
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