mirror of
https://github.com/Mange/rtl8192eu-linux-driver
synced 2025-12-10 00:04:17 +00:00
Add version v5.6.4
This commit is contained in:
Carlos Garces
@@ -1,115 +1,107 @@
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/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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#define _RTL8192E_SRESET_C_
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//#include <drv_types.h>
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#include <rtl8192e_hal.h>
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#ifdef DBG_CONFIG_ERROR_DETECT
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void rtl8192e_sreset_xmit_status_check(_adapter *padapter)
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{
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
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struct sreset_priv *psrtpriv = &pHalData->srestpriv;
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unsigned long current_time;
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struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
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unsigned int diff_time;
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u32 txdma_status;
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if( (txdma_status=rtw_read32(padapter, REG_TXDMA_STATUS)) !=0x00){
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DBG_871X("%s REG_TXDMA_STATUS:0x%08x\n", __FUNCTION__, txdma_status);
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rtw_hal_sreset_reset(padapter);
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}
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#ifdef CONFIG_USB_HCI
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//total xmit irp = 4
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//DBG_8192C("==>%s free_xmitbuf_cnt(%d),txirp_cnt(%d)\n",__FUNCTION__,pxmitpriv->free_xmitbuf_cnt,pxmitpriv->txirp_cnt);
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//if(pxmitpriv->txirp_cnt == NR_XMITBUFF+1)
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current_time = rtw_get_current_time();
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if (0 == pxmitpriv->free_xmitbuf_cnt || 0 == pxmitpriv->free_xmit_extbuf_cnt) {
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diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_time);
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if (diff_time > 2000) {
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if (psrtpriv->last_tx_complete_time == 0) {
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psrtpriv->last_tx_complete_time = current_time;
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}
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else{
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diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_complete_time);
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if (diff_time > 4000) {
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u32 ability = 0;
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//padapter->Wifi_Error_Status = WIFI_TX_HANG;
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ability = rtw_phydm_ability_get(padapter);
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DBG_871X("%s tx hang %s\n", __FUNCTION__,
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(ability & ODM_BB_ADAPTIVITY)? "ODM_BB_ADAPTIVITY" : "");
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if (!(ability & ODM_BB_ADAPTIVITY))
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rtw_hal_sreset_reset(padapter);
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}
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}
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}
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}
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#endif //CONFIG_USB_HCI
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if (psrtpriv->dbg_trigger_point == SRESET_TGP_XMIT_STATUS) {
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psrtpriv->dbg_trigger_point = SRESET_TGP_NULL;
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rtw_hal_sreset_reset(padapter);
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return;
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}
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}
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void rtl8192e_sreset_linked_status_check(_adapter *padapter)
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{
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
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struct sreset_priv *psrtpriv = &pHalData->srestpriv;
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u32 rx_dma_status = 0;
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rx_dma_status = rtw_read32(padapter,REG_RXDMA_STATUS);
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if(rx_dma_status!= 0x00){
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DBG_8192C("%s REG_RXDMA_STATUS:0x%08x\n",__FUNCTION__,rx_dma_status);
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}
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#if 0
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u32 regc50,regc58,reg824,reg800;
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regc50 = rtw_read32(padapter,0xc50);
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regc58 = rtw_read32(padapter,0xc58);
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reg824 = rtw_read32(padapter,0x824);
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reg800 = rtw_read32(padapter,0x800);
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if( ((regc50&0xFFFFFF00)!= 0x69543400)||
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((regc58&0xFFFFFF00)!= 0x69543400)||
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(((reg824&0xFFFFFF00)!= 0x00390000)&&(((reg824&0xFFFFFF00)!= 0x80390000)))||
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( ((reg800&0xFFFFFF00)!= 0x03040000)&&((reg800&0xFFFFFF00)!= 0x83040000)))
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{
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DBG_8192C("%s regc50:0x%08x, regc58:0x%08x, reg824:0x%08x, reg800:0x%08x,\n", __FUNCTION__,
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regc50, regc58, reg824, reg800);
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rtw_hal_sreset_reset(padapter);
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}
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#endif
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if (psrtpriv->dbg_trigger_point == SRESET_TGP_LINK_STATUS) {
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psrtpriv->dbg_trigger_point = SRESET_TGP_NULL;
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rtw_hal_sreset_reset(padapter);
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return;
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}
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}
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#endif
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/******************************************************************************
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*
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* Copyright(c) 2012 - 2017 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*****************************************************************************/
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#define _RTL8192E_SRESET_C_
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/* #include <drv_types.h> */
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#include <rtl8192e_hal.h>
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#ifdef DBG_CONFIG_ERROR_DETECT
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void rtl8192e_sreset_xmit_status_check(_adapter *padapter)
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{
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
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struct sreset_priv *psrtpriv = &pHalData->srestpriv;
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systime current_time;
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struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
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unsigned int diff_time;
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u32 txdma_status;
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txdma_status = rtw_read32(padapter, REG_TXDMA_STATUS);
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if (txdma_status != 0x00) {
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RTW_INFO("%s REG_TXDMA_STATUS:0x%08x\n", __FUNCTION__, txdma_status);
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rtw_hal_sreset_reset(padapter);
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}
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#ifdef CONFIG_USB_HCI
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/* total xmit irp = 4 */
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/* RTW_INFO("==>%s free_xmitbuf_cnt(%d),txirp_cnt(%d)\n",__FUNCTION__,pxmitpriv->free_xmitbuf_cnt,pxmitpriv->txirp_cnt); */
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/* if(pxmitpriv->txirp_cnt == NR_XMITBUFF+1) */
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current_time = rtw_get_current_time();
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if (0 == pxmitpriv->free_xmitbuf_cnt || 0 == pxmitpriv->free_xmit_extbuf_cnt) {
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diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_time);
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if (diff_time > 2000) {
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if (psrtpriv->last_tx_complete_time == 0)
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psrtpriv->last_tx_complete_time = current_time;
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else {
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diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_complete_time);
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if (diff_time > 4000) {
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u32 ability = 0;
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/* padapter->Wifi_Error_Status = WIFI_TX_HANG; */
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ability = rtw_phydm_ability_get(padapter);
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RTW_INFO("%s tx hang %s\n", __FUNCTION__,
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(ability & ODM_BB_ADAPTIVITY) ? "ODM_BB_ADAPTIVITY" : "");
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if (!(ability & ODM_BB_ADAPTIVITY))
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rtw_hal_sreset_reset(padapter);
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}
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}
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}
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}
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#endif /* CONFIG_USB_HCI */
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if (psrtpriv->dbg_trigger_point == SRESET_TGP_XMIT_STATUS) {
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psrtpriv->dbg_trigger_point = SRESET_TGP_NULL;
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rtw_hal_sreset_reset(padapter);
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return;
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}
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}
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void rtl8192e_sreset_linked_status_check(_adapter *padapter)
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{
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
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struct sreset_priv *psrtpriv = &pHalData->srestpriv;
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u32 rx_dma_status = 0;
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rx_dma_status = rtw_read32(padapter, REG_RXDMA_STATUS);
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if (rx_dma_status != 0x00)
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RTW_INFO("%s REG_RXDMA_STATUS:0x%08x\n", __FUNCTION__, rx_dma_status);
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#if 0
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u32 regc50, regc58, reg824, reg800;
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regc50 = rtw_read32(padapter, 0xc50);
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regc58 = rtw_read32(padapter, 0xc58);
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reg824 = rtw_read32(padapter, 0x824);
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reg800 = rtw_read32(padapter, 0x800);
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if (((regc50 & 0xFFFFFF00) != 0x69543400) ||
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((regc58 & 0xFFFFFF00) != 0x69543400) ||
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(((reg824 & 0xFFFFFF00) != 0x00390000) && (((reg824 & 0xFFFFFF00) != 0x80390000))) ||
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(((reg800 & 0xFFFFFF00) != 0x03040000) && ((reg800 & 0xFFFFFF00) != 0x83040000))) {
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RTW_INFO("%s regc50:0x%08x, regc58:0x%08x, reg824:0x%08x, reg800:0x%08x,\n", __FUNCTION__,
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regc50, regc58, reg824, reg800);
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rtw_hal_sreset_reset(padapter);
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}
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#endif
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if (psrtpriv->dbg_trigger_point == SRESET_TGP_LINK_STATUS) {
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psrtpriv->dbg_trigger_point = SRESET_TGP_NULL;
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rtw_hal_sreset_reset(padapter);
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return;
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}
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}
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#endif
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