mirror of
https://github.com/Mange/rtl8192eu-linux-driver
synced 2025-12-10 00:04:17 +00:00
Add version v5.6.4
This commit is contained in:
Carlos Garces
@@ -1,324 +1,123 @@
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/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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#ifndef __PHYDMPATHDIV_H__
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#define __PHYDMPATHDIV_H__
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/*#define PATHDIV_VERSION "2.0" //2014.11.04*/
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#define PATHDIV_VERSION "3.0" /*2015.01.13 Dino*/
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#if(defined(CONFIG_PATH_DIVERSITY))
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#define USE_PATH_A_AS_DEFAULT_ANT //for 8814 dynamic TX path selection
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#define NUM_RESET_DTP_PERIOD 5
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#define ANT_DECT_RSSI_TH 3
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#define PATH_A 1
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#define PATH_B 2
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#define PATH_C 3
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#define PATH_D 4
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#define PHYDM_AUTO_PATH 0
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#define PHYDM_FIX_PATH 1
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#define NUM_CHOOSE2_FROM4 6
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#define NUM_CHOOSE3_FROM4 4
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#define PHYDM_A BIT0
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#define PHYDM_B BIT1
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#define PHYDM_C BIT2
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#define PHYDM_D BIT3
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#define PHYDM_AB (BIT0 | BIT1) // 0
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#define PHYDM_AC (BIT0 | BIT2) // 1
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#define PHYDM_AD (BIT0 | BIT3) // 2
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#define PHYDM_BC (BIT1 | BIT2) // 3
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#define PHYDM_BD (BIT1 | BIT3) // 4
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#define PHYDM_CD (BIT2 | BIT3) // 5
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#define PHYDM_ABC (BIT0 | BIT1 | BIT2) /* 0*/
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#define PHYDM_ABD (BIT0 | BIT1 | BIT3) /* 1*/
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#define PHYDM_ACD (BIT0 | BIT2 | BIT3) /* 2*/
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#define PHYDM_BCD (BIT1 | BIT2 | BIT3) /* 3*/
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#define PHYDM_ABCD (BIT0 | BIT1 | BIT2 | BIT3)
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typedef enum dtp_state
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{
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PHYDM_DTP_INIT=1,
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PHYDM_DTP_RUNNING_1
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}PHYDM_DTP_STATE;
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typedef enum path_div_type
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{
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PHYDM_2R_PATH_DIV = 1,
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PHYDM_4R_PATH_DIV = 2
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}PHYDM_PATH_DIV_TYPE;
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VOID
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phydm_process_rssi_for_path_div(
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IN OUT PVOID pDM_VOID,
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IN PVOID p_phy_info_void,
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IN PVOID p_pkt_info_void
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);
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typedef struct _ODM_PATH_DIVERSITY_
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{
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u1Byte RespTxPath;
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u1Byte PathSel[ODM_ASSOCIATE_ENTRY_NUM];
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u4Byte PathA_Sum[ODM_ASSOCIATE_ENTRY_NUM];
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u4Byte PathB_Sum[ODM_ASSOCIATE_ENTRY_NUM];
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u2Byte PathA_Cnt[ODM_ASSOCIATE_ENTRY_NUM];
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u2Byte PathB_Cnt[ODM_ASSOCIATE_ENTRY_NUM];
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u1Byte path_div_type;
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#if RTL8814A_SUPPORT
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u4Byte path_a_sum_all;
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u4Byte path_b_sum_all;
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u4Byte path_c_sum_all;
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u4Byte path_d_sum_all;
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u4Byte path_a_cnt_all;
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u4Byte path_b_cnt_all;
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u4Byte path_c_cnt_all;
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u4Byte path_d_cnt_all;
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u1Byte dtp_period;
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BOOLEAN bBecomeLinked;
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BOOLEAN is_u3_mode;
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u1Byte num_tx_path;
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u1Byte default_path;
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u1Byte num_candidate;
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u1Byte ant_candidate_1;
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u1Byte ant_candidate_2;
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u1Byte ant_candidate_3;
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u1Byte dtp_state;
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u1Byte dtp_check_patha_counter;
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BOOLEAN fix_path_bfer;
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u1Byte search_space_2[NUM_CHOOSE2_FROM4];
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u1Byte search_space_3[NUM_CHOOSE3_FROM4];
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u1Byte pre_tx_path;
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u1Byte use_path_a_as_default_ant;
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BOOLEAN is_pathA_exist;
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#endif
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}PATHDIV_T, *pPATHDIV_T;
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#endif //#if(defined(CONFIG_PATH_DIVERSITY))
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VOID
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phydm_c2h_dtp_handler(
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IN PVOID pDM_VOID,
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IN pu1Byte CmdBuf,
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IN u1Byte CmdLen
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);
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VOID
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odm_PathDiversityInit(
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IN PVOID pDM_VOID
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);
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VOID
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odm_PathDiversity(
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IN PVOID pDM_VOID
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);
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VOID
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odm_pathdiv_debug(
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IN PVOID pDM_VOID,
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IN u4Byte *const dm_value,
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IN u4Byte *_used,
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OUT char *output,
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IN u4Byte *_out_len
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);
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//1 [OLD IC]--------------------------------------------------------------------------------
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#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN))
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//#define PATHDIV_ENABLE 1
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#define dm_PathDiv_RSSI_Check ODM_PathDivChkPerPktRssi
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#define PathDivCheckBeforeLink8192C ODM_PathDiversityBeforeLink92C
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typedef struct _PathDiv_Parameter_define_
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{
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u4Byte org_5g_RegE30;
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u4Byte org_5g_RegC14;
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u4Byte org_5g_RegCA0;
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u4Byte swt_5g_RegE30;
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u4Byte swt_5g_RegC14;
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u4Byte swt_5g_RegCA0;
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//for 2G IQK information
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u4Byte org_2g_RegC80;
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u4Byte org_2g_RegC4C;
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u4Byte org_2g_RegC94;
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u4Byte org_2g_RegC14;
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u4Byte org_2g_RegCA0;
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u4Byte swt_2g_RegC80;
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u4Byte swt_2g_RegC4C;
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u4Byte swt_2g_RegC94;
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u4Byte swt_2g_RegC14;
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u4Byte swt_2g_RegCA0;
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}PATHDIV_PARA,*pPATHDIV_PARA;
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VOID
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odm_PathDiversityInit_92C(
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IN PADAPTER Adapter
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);
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VOID
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odm_2TPathDiversityInit_92C(
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IN PADAPTER Adapter
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);
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VOID
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odm_1TPathDiversityInit_92C(
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IN PADAPTER Adapter
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);
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BOOLEAN
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odm_IsConnected_92C(
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IN PADAPTER Adapter
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);
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BOOLEAN
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ODM_PathDiversityBeforeLink92C(
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//IN PADAPTER Adapter
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IN PDM_ODM_T pDM_Odm
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);
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VOID
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odm_PathDiversityAfterLink_92C(
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IN PADAPTER Adapter
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);
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VOID
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odm_SetRespPath_92C(
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IN PADAPTER Adapter,
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IN u1Byte DefaultRespPath
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);
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VOID
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odm_OFDMTXPathDiversity_92C(
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IN PADAPTER Adapter
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);
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VOID
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odm_CCKTXPathDiversity_92C(
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IN PADAPTER Adapter
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);
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VOID
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odm_ResetPathDiversity_92C(
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IN PADAPTER Adapter
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);
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VOID
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odm_CCKTXPathDiversityCallback(
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PRT_TIMER pTimer
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);
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VOID
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odm_CCKTXPathDiversityWorkItemCallback(
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IN PVOID pContext
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);
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VOID
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odm_PathDivChkAntSwitchCallback(
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PRT_TIMER pTimer
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);
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VOID
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odm_PathDivChkAntSwitchWorkitemCallback(
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IN PVOID pContext
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);
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VOID
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odm_PathDivChkAntSwitch(
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PDM_ODM_T pDM_Odm
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);
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VOID
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ODM_CCKPathDiversityChkPerPktRssi(
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PADAPTER Adapter,
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BOOLEAN bIsDefPort,
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BOOLEAN bMatchBSSID,
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PRT_WLAN_STA pEntry,
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PRT_RFD pRfd,
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pu1Byte pDesc
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);
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VOID
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ODM_PathDivChkPerPktRssi(
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PADAPTER Adapter,
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BOOLEAN bIsDefPort,
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BOOLEAN bMatchBSSID,
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PRT_WLAN_STA pEntry,
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PRT_RFD pRfd
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);
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VOID
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ODM_PathDivRestAfterLink(
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IN PDM_ODM_T pDM_Odm
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);
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VOID
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ODM_FillTXPathInTXDESC(
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IN PADAPTER Adapter,
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IN PRT_TCB pTcb,
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IN pu1Byte pDesc
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);
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VOID
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odm_PathDivInit_92D(
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IN PDM_ODM_T pDM_Odm
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);
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u1Byte
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odm_SwAntDivSelectScanChnl(
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IN PADAPTER Adapter
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);
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VOID
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odm_SwAntDivConstructScanChnl(
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IN PADAPTER Adapter,
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IN u1Byte ScanChnl
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);
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#endif //#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN))
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#endif //#ifndef __ODMPATHDIV_H__
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/******************************************************************************
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*
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* Copyright(c) 2007 - 2017 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* wlanfae <wlanfae@realtek.com>
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* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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* Hsinchu 300, Taiwan.
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*
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* Larry Finger <Larry.Finger@lwfinger.net>
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*
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*****************************************************************************/
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#ifndef __PHYDMPATHDIV_H__
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#define __PHYDMPATHDIV_H__
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#ifdef CONFIG_PATH_DIVERSITY
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#define PATHDIV_VERSION "4.0"
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#define USE_PATH_A_AS_DEFAULT_ANT /* @for 8814 dynamic TX path selection */
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#define NUM_RESET_DTP_PERIOD 5
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#define ANT_DECT_RSSI_TH 3
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#define PATH_A 1
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#define PATH_B 2
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#define PATH_C 3
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#define PATH_D 4
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#define PHYDM_AUTO_PATH 0
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#define PHYDM_FIX_PATH 1
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#define NUM_CHOOSE2_FROM4 6
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#define NUM_CHOOSE3_FROM4 4
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enum phydm_dtp_state {
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PHYDM_DTP_INIT = 1,
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PHYDM_DTP_RUNNING_1
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};
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enum phydm_path_div_type {
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PHYDM_2R_PATH_DIV = 1,
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PHYDM_4R_PATH_DIV = 2
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};
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enum phydm_path_ctrl {
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TX_PATH_BY_REG = 0,
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TX_PATH_BY_DESC = 1
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};
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struct _ODM_PATH_DIVERSITY_ {
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enum bb_path default_tx_path;
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enum bb_path path_sel[ODM_ASSOCIATE_ENTRY_NUM];
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u32 path_a_sum[ODM_ASSOCIATE_ENTRY_NUM];
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u32 path_b_sum[ODM_ASSOCIATE_ENTRY_NUM];
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u16 path_a_cnt[ODM_ASSOCIATE_ENTRY_NUM];
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u16 path_b_cnt[ODM_ASSOCIATE_ENTRY_NUM];
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u8 phydm_path_div_type;
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#if RTL8814A_SUPPORT
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u32 path_a_sum_all;
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u32 path_b_sum_all;
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u32 path_c_sum_all;
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u32 path_d_sum_all;
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u32 path_a_cnt_all;
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u32 path_b_cnt_all;
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u32 path_c_cnt_all;
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u32 path_d_cnt_all;
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u8 dtp_period;
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boolean is_become_linked;
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boolean is_u3_mode;
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u8 num_tx_path;
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u8 default_path;
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u8 num_candidate;
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u8 ant_candidate_1;
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u8 ant_candidate_2;
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u8 ant_candidate_3;
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u8 phydm_dtp_state;
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u8 dtp_check_patha_counter;
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boolean fix_path_bfer;
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u8 search_space_2[NUM_CHOOSE2_FROM4];
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u8 search_space_3[NUM_CHOOSE3_FROM4];
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u8 pre_tx_path;
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u8 use_path_a_as_default_ant;
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boolean is_path_a_exist;
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#endif
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};
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void phydm_set_tx_path_by_bb_reg(void *dm_void, u8 path);
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u8 phydm_get_tx_path_txdesc(void *dm_void, u8 macid);
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void phydm_c2h_dtp_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len);
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void phydm_tx_path_diversity_init(void *dm_void);
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void phydm_tx_path_diversity(void *dm_void);
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void phydm_process_rssi_for_path_div(void *dm_void, void *phy_info_void,
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void *pkt_info_void);
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void phydm_pathdiv_debug(void *dm_void, char input[][16], u32 *_used,
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char *output, u32 *_out_len);
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#endif /* @#ifdef CONFIG_PATH_DIVERSITY */
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#endif /* @#ifndef __PHYDMPATHDIV_H__ */
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