Github/rtl8192eu-linux-driver
1
0
Fork 0
mirror of https://github.com/Mange/rtl8192eu-linux-driver synced 2025-12-10 00:04:17 +00:00
Code Issues Packages Projects Releases Wiki Activity

Add version v5.6.4

Browse Source
This commit is contained in:
Carlos Garces
2019-11-09 11:12:08 +01:00
parent e7361e951c
commit 1d807f14d8
597 changed files with 314256 additions and 256218 deletions
Download Patch File Download Diff File Expand all files Collapse all files

294
hal/phydm/phydm_adaptivity.h
View File

@@ -1,172 +1,122 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __PHYDMADAPTIVITY_H__
#define __PHYDMADAPTIVITY_H__
#define ADAPTIVITY_VERSION "9.0"
#define PwdBUpperBound 7
#define DFIRloss 5
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
typedef enum _tag_PhyDM_REGULATION_Type {
REGULATION_FCC = 0,
REGULATION_MKK = 1,
REGULATION_ETSI = 2,
REGULATION_WW = 3,
MAX_REGULATION_NUM = 4
} PhyDM_REGULATION_TYPE;
#endif
typedef enum tag_PhyDM_set_LNA {
PhyDM_disable_LNA = 0,
PhyDM_enable_LNA = 1,
} PhyDM_set_LNA;
typedef enum tag_PhyDM_TRx_MUX_Type
{
PhyDM_SHUTDOWN = 0,
PhyDM_STANDBY_MODE = 1,
PhyDM_TX_MODE = 2,
PhyDM_RX_MODE = 3
}PhyDM_Trx_MUX_Type;
typedef enum tag_PhyDM_MACEDCCA_Type
{
PhyDM_IGNORE_EDCCA = 0,
PhyDM_DONT_IGNORE_EDCCA = 1
}PhyDM_MACEDCCA_Type;
typedef struct _ADAPTIVITY_STATISTICS {
s1Byte TH_L2H_ini_backup;
s1Byte TH_EDCCA_HL_diff_backup;
s1Byte IGI_Base;
u1Byte IGI_target;
u1Byte NHMWait;
s1Byte H2L_lb;
s1Byte L2H_lb;
BOOLEAN bFirstLink;
BOOLEAN bCheck;
BOOLEAN DynamicLinkAdaptivity;
u1Byte APNumTH;
u1Byte AdajustIGILevel;
} ADAPTIVITY_STATISTICS, *PADAPTIVITY_STATISTICS;
VOID
Phydm_CheckAdaptivity(
IN PVOID pDM_VOID
);
VOID
Phydm_CheckEnvironment(
IN PVOID pDM_VOID
);
VOID
Phydm_NHMCounterStatisticsInit(
IN PVOID pDM_VOID
);
VOID
Phydm_NHMCounterStatistics(
IN PVOID pDM_VOID
);
VOID
Phydm_NHMCounterStatisticsReset(
IN PVOID pDM_VOID
);
VOID
Phydm_GetNHMCounterStatistics(
IN PVOID pDM_VOID
);
VOID
Phydm_MACEDCCAState(
IN PVOID pDM_VOID,
IN PhyDM_MACEDCCA_Type State
);
VOID
Phydm_SetEDCCAThreshold(
IN PVOID pDM_VOID,
IN s1Byte H2L,
IN s1Byte L2H
);
VOID
Phydm_SetTRxMux(
IN PVOID pDM_VOID,
IN PhyDM_Trx_MUX_Type txMode,
IN PhyDM_Trx_MUX_Type rxMode
);
BOOLEAN
Phydm_CalNHMcnt(
IN PVOID pDM_VOID
);
VOID
Phydm_SearchPwdBLowerBound(
IN PVOID pDM_VOID
);
VOID
Phydm_AdaptivityInit(
IN PVOID pDM_VOID
);
VOID
Phydm_Adaptivity(
IN PVOID pDM_VOID,
IN u1Byte IGI
);
VOID
phydm_setEDCCAThresholdAPI(
IN PVOID pDM_VOID,
IN u1Byte IGI
);
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
VOID
Phydm_DisableEDCCA(
IN PVOID pDM_VOID
);
VOID
Phydm_DynamicEDCCA(
IN PVOID pDM_VOID
);
VOID
Phydm_AdaptivityBSOD(
IN PVOID pDM_VOID
);
#endif
#endif
/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
*****************************************************************************/
#ifndef __PHYDMADAPTIVITY_H__
#define __PHYDMADAPTIVITY_H__
#define ADAPTIVITY_VERSION "9.6.01" /*@20180814 changed by Kevin,
*add phydm_edcca_abort func.
*/
#define PWDB_UPPER_BOUND 7
#define DFIR_LOSS 7
#define ADC_BACKOFF 12
#define ODM_IC_PWDB_EDCCA (ODM_RTL8188E | ODM_RTL8723B | ODM_RTL8192E |\
ODM_RTL8881A | ODM_RTL8821 | ODM_RTL8812)
#if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP))
#define ADAPT_DC_BACKOFF 2
#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
#define ADAPT_DC_BACKOFF 4
#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
#define ADAPT_DC_BACKOFF 0
#endif
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
enum phydm_regulation_type {
REGULATION_FCC = 0,
REGULATION_MKK = 1,
REGULATION_ETSI = 2,
REGULATION_WW = 3,
MAX_REGULATION_NUM = 4
};
#endif
enum phydm_adapinfo {
PHYDM_ADAPINFO_CARRIER_SENSE_ENABLE = 0,
PHYDM_ADAPINFO_TH_L2H_INI,
PHYDM_ADAPINFO_TH_EDCCA_HL_DIFF,
PHYDM_ADAPINFO_AP_NUM_TH,
PHYDM_ADAPINFO_DOMAIN_CODE_2G,
PHYDM_ADAPINFO_DOMAIN_CODE_5G
};
enum phydm_mac_edcca_type {
PHYDM_IGNORE_EDCCA = 0,
PHYDM_DONT_IGNORE_EDCCA = 1
};
enum phydm_adaptivity_mode {
PHYDM_ADAPT_MSG = 0,
PHYDM_ADAPT_DEBUG = 1,
PHYDM_ADAPT_RESUME = 2,
PHYDM_EDCCA_TH_PAUSE = 3,
PHYDM_EDCCA_TH_RESUME = 4
};
struct phydm_adaptivity_struct {
s8 th_l2h_ini_backup;
s8 th_edcca_hl_diff_backup;
s8 igi_base;
s8 h2l_lb;
s8 l2h_lb;
u8 ap_num_th;
u8 adajust_igi_level;
u32 adaptivity_dbg_port; /*N:0x208, AC:0x209*/
u8 debug_mode;
u16 igi_up_bound_lmt_cnt; /*@When igi_up_bound_lmt_cnt !=0, limit IGI upper bound to "adapt_igi_up"*/
u16 igi_up_bound_lmt_val; /*@max value of igi_up_bound_lmt_cnt*/
boolean igi_lmt_en;
u8 adapt_igi_up;
u32 rvrt_val[2];
s8 th_l2h;
s8 th_h2l;
u8 regulation_2g;
u8 regulation_5g;
boolean is_adapt_en;
boolean edcca_en;
s8 th_l2h_ini_mode2;
s8 th_edcca_hl_diff_mode2;
};
#ifdef PHYDM_SUPPORT_ADAPTIVITY
void phydm_adaptivity_debug(void *dm_void, char input[][16], u32 *_used,
char *output, u32 *_out_len);
void phydm_set_edcca_val(void *dm_void, u32 *val_buf, u8 val_len);
#endif
void phydm_set_edcca_threshold_api(void *dm_void, u8 IGI);
void phydm_adaptivity_info_init(void *dm_void, enum phydm_adapinfo cmn_info,
u32 value);
void phydm_adaptivity_info_update(void *dm_void, enum phydm_adapinfo cmn_info,
u32 value);
void phydm_adaptivity_init(void *dm_void);
void phydm_adaptivity(void *dm_void);
#endif