mirror of
https://github.com/Mange/rtl8192eu-linux-driver
synced 2025-12-08 07:14:03 +00:00
Add version v5.6.4
This commit is contained in:
Carlos Garces
1774
hal/phydm/halrf/rtl8192e/halrf_8192e_ap.c
Normal file
1774
hal/phydm/halrf/rtl8192e/halrf_8192e_ap.c
Normal file
File diff suppressed because it is too large
Load Diff
140
hal/phydm/halrf/rtl8192e/halrf_8192e_ap.h
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140
hal/phydm/halrf/rtl8192e/halrf_8192e_ap.h
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@@ -0,0 +1,140 @@
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/******************************************************************************
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*
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* Copyright(c) 2007 - 2017 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*****************************************************************************/
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#ifndef __HALRF_8192E_H__
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#define __HALRF_8192E_H__
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/*--------------------------Define Parameters-------------------------------*/
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#if (DM_ODM_SUPPORT_TYPE & ODM_CE)
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#define IQK_DELAY_TIME_92E 15 /* ms */
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#else
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#define IQK_DELAY_TIME_92E 10
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#endif
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#define index_mapping_NUM_92E 15
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#define AVG_THERMAL_NUM_92E 4
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#define RF_T_METER_92E 0x42
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#include "../halphyrf_ap.h"
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void configure_txpower_track_8192e(
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struct txpwrtrack_cfg *config
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);
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void
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get_delta_swing_table_8192e(
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void *dm_void,
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u8 **temperature_up_a,
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u8 **temperature_down_a,
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u8 **temperature_up_b,
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u8 **temperature_down_b
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);
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void do_iqk_8192e(
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void *dm_void,
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u8 delta_thermal_index,
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u8 thermal_value,
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u8 threshold
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);
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void
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odm_tx_pwr_track_set_pwr92_e(
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void *dm_void,
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enum pwrtrack_method method,
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u8 rf_path,
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u8 channel_mapped_index
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);
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/* 1 7. IQK */
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void
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phy_iq_calibrate_8192e(
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void *dm_void,
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boolean is_recovery);
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/*
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* LC calibrate
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* */
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void
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phy_lc_calibrate_8192e(
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void *dm_void
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);
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/*
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* AP calibrate
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* */
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void
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phy_ap_calibrate_8192e(
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#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
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struct dm_struct *dm,
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#else
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void *adapter,
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#endif
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s8 delta);
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void
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_phy_save_adda_registers_92e(
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#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
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struct dm_struct *dm,
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#else
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void *adapter,
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#endif
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u32 *adda_reg,
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u32 *adda_backup,
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u32 register_num
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);
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void
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_phy_path_adda_on_92e(
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#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
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struct dm_struct *dm,
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#else
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void *adapter,
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#endif
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u32 *adda_reg,
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boolean is_path_a_on,
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boolean is2T
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);
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void
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_phy_mac_setting_calibration_92e(
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#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
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struct dm_struct *dm,
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#else
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void *adapter,
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#endif
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u32 *mac_reg,
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u32 *mac_backup
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);
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#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
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void
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_phy_path_a_stand_by(
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struct dm_struct *dm
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);
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#endif
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void
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halrf_rf_lna_setting_8192e(
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struct dm_struct *dm,
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enum halrf_lna_set type
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);
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#endif /*#ifndef __HALRF_8192E_H__*/
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2029
hal/phydm/halrf/rtl8192e/halrf_8192e_ce.c
Normal file
2029
hal/phydm/halrf/rtl8192e/halrf_8192e_ce.c
Normal file
File diff suppressed because it is too large
Load Diff
68
hal/phydm/halrf/rtl8192e/halrf_8192e_ce.h
Normal file
68
hal/phydm/halrf/rtl8192e/halrf_8192e_ce.h
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@@ -0,0 +1,68 @@
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/******************************************************************************
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*
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* Copyright(c) 2007 - 2017 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*****************************************************************************/
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#ifndef __HALRF_8192E_H__
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#define __HALRF_8192E_H__
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/*--------------------------Define Parameters-------------------------------*/
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#if (DM_ODM_SUPPORT_TYPE & ODM_CE)
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#define IQK_DELAY_TIME_92E 15 /* ms */
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#else
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#define IQK_DELAY_TIME_92E 10
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#endif
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#define index_mapping_NUM_92E 15
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#define AVG_THERMAL_NUM_92E 4
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#define RF_T_METER_92E 0x42
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#include "../halphyrf_ce.h"
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void configure_txpower_track_8192e(struct txpwrtrack_cfg *config);
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void get_delta_swing_table_8192e(void *dm_void, u8 **temperature_up_a,
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u8 **temperature_down_a, u8 **temperature_up_b,
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u8 **temperature_down_b);
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void do_iqk_8192e(void *dm_void, u8 delta_thermal_index, u8 thermal_value,
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u8 threshold);
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void odm_tx_pwr_track_set_pwr92_e(void *dm_void, enum pwrtrack_method method,
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u8 rf_path, u8 channel_mapped_index);
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/* 1 7. IQK */
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void phy_iq_calibrate_8192e(void *dm_void, boolean is_recovery);
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/*
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* LC calibrate
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* */
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void phy_lc_calibrate_8192e(void *dm_void);
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void _phy_save_adda_registers_92e(struct dm_struct *dm, u32 *adda_reg,
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u32 *adda_backup, u32 register_num);
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void _phy_path_adda_on_92e(struct dm_struct *dm, u32 *adda_reg,
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boolean is_path_a_on, boolean is2T);
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void _phy_mac_setting_calibration_92e(struct dm_struct *dm, u32 *mac_reg,
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u32 *mac_backup);
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#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
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void _phy_path_a_stand_by(struct dm_struct *dm);
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#endif
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void halrf_rf_lna_setting_8192e(struct dm_struct *dm, enum halrf_lna_set type);
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#endif /*#ifndef __HALRF_8192E_H__*/
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2165
hal/phydm/halrf/rtl8192e/halrf_8192e_win.c
Normal file
2165
hal/phydm/halrf/rtl8192e/halrf_8192e_win.c
Normal file
File diff suppressed because it is too large
Load Diff
131
hal/phydm/halrf/rtl8192e/halrf_8192e_win.h
Normal file
131
hal/phydm/halrf/rtl8192e/halrf_8192e_win.h
Normal file
@@ -0,0 +1,131 @@
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/******************************************************************************
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*
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* Copyright(c) 2007 - 2017 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*****************************************************************************/
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#ifndef __HALRF_8192E_H__
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#define __HALRF_8192E_H__
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/*--------------------------Define Parameters-------------------------------*/
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#if (DM_ODM_SUPPORT_TYPE & ODM_CE)
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#define IQK_DELAY_TIME_92E 15 /* ms */
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#else
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#define IQK_DELAY_TIME_92E 10
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#endif
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#define index_mapping_NUM_92E 15
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#define AVG_THERMAL_NUM_92E 4
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#define RF_T_METER_92E 0x42
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#include "halrf/halphyrf_win.h"
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void configure_txpower_track_8192e(
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struct txpwrtrack_cfg *config
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);
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void
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get_delta_swing_table_8192e(
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void *dm_void,
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u8 **temperature_up_a,
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u8 **temperature_down_a,
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u8 **temperature_up_b,
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u8 **temperature_down_b
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);
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void do_iqk_8192e(
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void *dm_void,
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u8 delta_thermal_index,
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u8 thermal_value,
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u8 threshold
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);
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void
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odm_tx_pwr_track_set_pwr92_e(
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void *dm_void,
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enum pwrtrack_method method,
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u8 rf_path,
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u8 channel_mapped_index
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);
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/* 1 7. IQK */
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void
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phy_iq_calibrate_8192e(
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void *dm_void,
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boolean is_recovery);
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/*
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* LC calibrate
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* */
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void
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phy_lc_calibrate_8192e(
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void *dm_void
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);
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/*
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* AP calibrate
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* */
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#if 0
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void
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phy_ap_calibrate_8192e(
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#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
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struct dm_struct *dm,
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#else
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void *adapter,
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#endif
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s8 delta);
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void
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phy_digital_predistortion_8192e(void *adapter);
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#endif
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void
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_phy_save_adda_registers_92e(
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struct dm_struct *dm,
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u32 *adda_reg,
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u32 *adda_backup,
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u32 register_num
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);
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void
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_phy_path_adda_on_92e(
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struct dm_struct *dm,
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u32 *adda_reg,
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boolean is_path_a_on,
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boolean is2T
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);
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void
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_phy_mac_setting_calibration_92e(
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struct dm_struct *dm,
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u32 *mac_reg,
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u32 *mac_backup
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);
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#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
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void
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_phy_path_a_stand_by(
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struct dm_struct *dm
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);
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#endif
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void
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halrf_rf_lna_setting_8192e(
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struct dm_struct *dm,
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enum halrf_lna_set type
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);
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#endif /*#ifndef __HALRF_8192E_H__*/
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