mirror of
https://github.com/Mange/rtl8192eu-linux-driver
synced 2025-12-10 00:04:17 +00:00
The official RTL8192EU linux driver from D-Link Australia
Version information: 20140812_rtl8192EU_linux_v4.3.1.1_11320 2014-08-12 version 4.3.1.1_11320 Source: ftp://files.dlink.com.au/products/DWA-131/REV_E/Drivers/DWA-131_Linux_driver_v4.3.1.1.zip This version does not currently work on newer kernels, but it does contain USB ID 2001:3319, which a lot of other repos in GitHub does not.
This commit is contained in:
Magnus Bergmark
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include/rtl8192e_cmd.h
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215
include/rtl8192e_cmd.h
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/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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#ifndef __RTL8192E_CMD_H__
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#define __RTL8192E_CMD_H__
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typedef enum _RTL8192E_H2C_CMD
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{
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H2C_8192E_RSVDPAGE = 0x00,
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H2C_8192E_MSRRPT = 0x01,
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H2C_8192E_SCAN = 0x02,
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H2C_8192E_KEEP_ALIVE_CTRL = 0x03,
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H2C_8192E_DISCONNECT_DECISION = 0x04,
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H2C_8192E_INIT_OFFLOAD = 0x06,
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H2C_8192E_AP_OFFLOAD = 0x08,
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H2C_8192E_BCN_RSVDPAGE = 0x09,
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H2C_8192E_PROBERSP_RSVDPAGE = 0x0a,
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H2C_8192E_AP_WOW_GPIO_CTRL = 0x13,
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H2C_8192E_SETPWRMODE = 0x20,
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H2C_8192E_PS_TUNING_PARA = 0x21,
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H2C_8192E_PS_TUNING_PARA2 = 0x22,
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H2C_8192E_PS_LPS_PARA = 0x23,
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H2C_8192E_P2P_PS_OFFLOAD = 0x24,
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H2C_8192E_SAP_PS = 0x26,
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H2C_8192E_RA_MASK = 0x40,
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H2C_8192E_RSSI_REPORT = 0x42,
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H2C_8192E_WO_WLAN = 0x80,
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H2C_8192E_REMOTE_WAKE_CTRL = 0x81,
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H2C_8192E_AOAC_GLOBAL_INFO = 0x82,
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H2C_8192E_AOAC_RSVDPAGE = 0x83,
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//Not defined in new 88E H2C CMD Format
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H2C_8192E_SELECTIVE_SUSPEND_ROF_CMD,
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H2C_8192E_P2P_PS_MODE,
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H2C_8192E_PSD_RESULT,
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MAX_8192E_H2CCMD
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}RTL8192E_H2C_CMD;
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typedef enum _RTL8192E_C2H_EVT
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{
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C2H_8192E_DBG = 0,
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C2H_8192E_LB = 1,
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C2H_8192E_TXBF = 2,
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C2H_8192E_TX_REPORT = 3,
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C2H_8192E_BT_INFO = 9,
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C2H_8192E_FW_SWCHNL = 0x10,
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C2H_8192E_BT_MP = 11,
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C2H_8192E_RA_RPT=12,
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MAX_8192E_C2HEVENT
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}RTL8192E_C2H_EVT;
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struct cmd_msg_parm {
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u8 eid; //element id
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u8 sz; // sz
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u8 buf[6];
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};
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enum{
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PWRS
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};
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typedef struct _SETPWRMODE_PARM {
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u8 Mode;//0:Active,1:LPS,2:WMMPS
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//u8 RLBM:4;//0:Min,1:Max,2: User define
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u8 SmartPS_RLBM;//LPS=0:PS_Poll,1:PS_Poll,2:NullData,WMM=0:PS_Poll,1:NullData
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u8 AwakeInterval; // unit: beacon interval
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u8 bAllQueueUAPSD;
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u8 PwrState;//AllON(0x0c),RFON(0x04),RFOFF(0x00)
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} SETPWRMODE_PARM, *PSETPWRMODE_PARM;
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struct H2C_SS_RFOFF_PARAM{
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u8 ROFOn; // 1: on, 0:off
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u16 gpio_period; // unit: 1024 us
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}__attribute__ ((packed));
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typedef struct JOINBSSRPT_PARM_92E{
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u8 OpMode; // RT_MEDIA_STATUS
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#ifdef CONFIG_WOWLAN
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u8 MacID; // MACID
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#endif //CONFIG_WOWLAN
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}JOINBSSRPT_PARM_92E, *PJOINBSSRPT_PARM_92E;
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/* move to hal_com_h2c.h
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typedef struct _RSVDPAGE_LOC_92E {
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u8 LocProbeRsp;
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u8 LocPsPoll;
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u8 LocNullData;
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u8 LocQosNull;
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u8 LocBTQosNull;
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} RSVDPAGE_LOC_92E, *PRSVDPAGE_LOC_92E;
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*/
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//_SETPWRMODE_PARM
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#define SET_8192E_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd, 0, 8, __Value)
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#define SET_8192E_H2CCMD_PWRMODE_PARM_RLBM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 4, __Value)
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#define SET_8192E_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 4, 4, __Value)
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#define SET_8192E_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+2, 0, 8, __Value)
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#define SET_8192E_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+3, 0, 8, __Value)
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#define SET_8192E_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+4, 0, 8, __Value)
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#define SET_8192E_H2CCMD_PWRMODE_PARM_BYTE5(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+5, 0, 8, __Value)
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#define GET_8192E_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd) LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8)
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//_P2P_PS_OFFLOAD
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#define SET_8192E_H2CCMD_P2P_PS_OFFLOAD_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value)
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#define SET_8192E_H2CCMD_P2P_PS_OFFLOAD_ROLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value)
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#define SET_8192E_H2CCMD_P2P_PS_OFFLOAD_CTWINDOW_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value)
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#define SET_8192E_H2CCMD_P2P_PS_OFFLOAD_NOA0_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value)
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#define SET_8192E_H2CCMD_P2P_PS_OFFLOAD_NOA1_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value)
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#define SET_8192E_H2CCMD_P2P_PS_OFFLOAD_ALLSTASLEEP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 5, 1, __Value)
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// host message to firmware cmd
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void rtl8192e_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode);
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void rtl8192e_set_FwJoinBssReport_cmd(PADAPTER padapter, u8 mstatus);
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u8 rtl8192e_set_rssi_cmd(PADAPTER padapter, u8 *param);
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void rtl8192e_set_raid_cmd(PADAPTER padapter, u32 bitmap, u8* arg);
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void rtl8192e_Add_RateATid(PADAPTER padapter, u32 bitmap, u8 *arg, u8 rssi_level);
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//u8 rtl8192c_set_FwSelectSuspend_cmd(PADAPTER padapter, u8 bfwpoll, u16 period);
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#ifdef CONFIG_P2P_PS
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void rtl8192e_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state);
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//void rtl8723a_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state);
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#endif //CONFIG_P2P
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void CheckFwRsvdPageContent(PADAPTER padapter);
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void rtl8192e_set_FwMediaStatus_cmd(PADAPTER padapter, u16 mstatus_rpt );
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#ifdef CONFIG_TSF_RESET_OFFLOAD
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//u8 rtl8188e_reset_tsf(_adapter *padapter, u8 reset_port);
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int reset_tsf(PADAPTER Adapter, u8 reset_port );
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#endif // CONFIG_TSF_RESET_OFFLOAD
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#ifdef CONFIG_WOWLAN
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typedef struct _SETWOWLAN_PARM{
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u8 mode;
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u8 gpio_index;
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u8 gpio_duration;
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u8 second_mode;
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u8 reserve;
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}SETWOWLAN_PARM, *PSETWOWLAN_PARM;
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#define FW_WOWLAN_FUN_EN BIT(0)
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#define FW_WOWLAN_PATTERN_MATCH BIT(1)
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#define FW_WOWLAN_MAGIC_PKT BIT(2)
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#define FW_WOWLAN_UNICAST BIT(3)
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#define FW_WOWLAN_ALL_PKT_DROP BIT(4)
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#define FW_WOWLAN_GPIO_ACTIVE BIT(5)
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#define FW_WOWLAN_REKEY_WAKEUP BIT(6)
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#define FW_WOWLAN_DEAUTH_WAKEUP BIT(7)
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#define FW_WOWLAN_GPIO_WAKEUP_EN BIT(0)
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#define FW_FW_PARSE_MAGIC_PKT BIT(1)
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#define FW_REMOTE_WAKE_CTRL_EN BIT(0)
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#define FW_REALWOWLAN_EN BIT(5)
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#endif//CONFIG_WOWLAN
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#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
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void rtl8192e_set_wowlan_cmd(_adapter* padapter, u8 enable);
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void rtl8192e_set_ap_wowlan_cmd(_adapter* padapter, u8 enable);
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void rtl8192e_set_ap_ps_wowlan_cmd(_adapter* padapter, u8 enable);
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void SetFwRelatedForWoWLAN8192E(_adapter* padapter, u8 bHostIsGoingtoSleep);
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#endif
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/// TX Feedback Content
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#define USEC_UNIT_FOR_8192E_C2H_TX_RPT_QUEUE_TIME 256
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#define GET_8192E_C2H_TX_RPT_QUEUE_SELECT(_Header) LE_BITS_TO_1BYTE((_Header + 0), 0, 5)
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#define GET_8192E_C2H_TX_RPT_PKT_BROCAST(_Header) LE_BITS_TO_1BYTE((_Header + 0), 5, 1)
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#define GET_8192E_C2H_TX_RPT_LIFE_TIME_OVER(_Header) LE_BITS_TO_1BYTE((_Header + 0), 6, 1)
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#define GET_8192E_C2H_TX_RPT_RETRY_OVER(_Header) LE_BITS_TO_1BYTE((_Header + 0), 7, 1)
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#define GET_8192E_C2H_TX_RPT_MAC_ID(_Header) LE_BITS_TO_1BYTE((_Header + 1), 0, 8)
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#define GET_8192E_C2H_TX_RPT_DATA_RETRY_CNT(_Header) LE_BITS_TO_1BYTE((_Header + 2), 0, 6)
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#define GET_8192E_C2H_TX_RPT_QUEUE_TIME(_Header) LE_BITS_TO_2BYTE((_Header + 3), 0, 16) // In unit of 256 microseconds.
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#define GET_8192E_C2H_TX_RPT_FINAL_DATA_RATE(_Header) LE_BITS_TO_1BYTE((_Header + 5), 0, 8)
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void C2HContentParsing8192E(
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IN PADAPTER Adapter,
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IN u1Byte c2hCmdId,
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IN u1Byte c2hCmdLen,
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IN pu1Byte tmpBuf
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);
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VOID
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C2HPacketHandler_8192E(
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IN PADAPTER Adapter,
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IN pu1Byte Buffer,
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IN u1Byte Length
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);
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#endif//__RTL8188E_CMD_H__
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