mirror of
https://github.com/Mange/rtl8192eu-linux-driver
synced 2024-12-27 06:21:44 +00:00
285 lines
12 KiB
C
285 lines
12 KiB
C
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/******************************************************************************
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*
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* Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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#ifndef __RTL8192E_HAL_H__
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#define __RTL8192E_HAL_H__
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//#include "hal_com.h"
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#if 1
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#include "hal_data.h"
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#else
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#include "../hal/OUTSRC/odm_precomp.h"
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#endif
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//include HAL Related header after HAL Related compiling flags
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#include "rtl8192e_spec.h"
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#include "rtl8192e_rf.h"
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#include "rtl8192e_dm.h"
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#include "rtl8192e_recv.h"
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#include "rtl8192e_xmit.h"
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#include "rtl8192e_cmd.h"
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#include "rtl8192e_led.h"
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#include "Hal8192EPwrSeq.h"
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#include "Hal8192EPhyReg.h"
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#include "Hal8192EPhyCfg.h"
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#ifdef DBG_CONFIG_ERROR_DETECT
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#include "rtl8192e_sreset.h"
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#endif
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//---------------------------------------------------------------------
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// RTL8192E From header
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//---------------------------------------------------------------------
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#define RTL8192E_FW_IMG "rtl8192e/FW_NIC.bin"
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#define RTL8192E_FW_WW_IMG "rtl8192e/FW_WoWLAN.bin"
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#define RTL8192E_PHY_REG "rtl8192e/PHY_REG.txt"
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#define RTL8192E_PHY_RADIO_A "rtl8192e/RadioA.txt"
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#define RTL8192E_PHY_RADIO_B "rtl8192e/RadioB.txt"
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#define RTL8192E_TXPWR_TRACK "rtl8192e/TxPowerTrack.txt"
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#define RTL8192E_AGC_TAB "rtl8192e/AGC_TAB.txt"
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#define RTL8192E_PHY_MACREG "rtl8192e/MAC_REG.txt"
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#define RTL8192E_PHY_REG_PG "rtl8192e/PHY_REG_PG.txt"
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#define RTL8192E_PHY_REG_MP "rtl8192e/PHY_REG_MP.txt"
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#define RTL8192E_TXPWR_LMT "rtl8192e/TXPWR_LMT.txt"
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//---------------------------------------------------------------------
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// RTL8192E Power Configuration CMDs for PCIe interface
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//---------------------------------------------------------------------
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#define Rtl8192E_NIC_PWR_ON_FLOW rtl8192E_power_on_flow
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#define Rtl8192E_NIC_RF_OFF_FLOW rtl8192E_radio_off_flow
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#define Rtl8192E_NIC_DISABLE_FLOW rtl8192E_card_disable_flow
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#define Rtl8192E_NIC_ENABLE_FLOW rtl8192E_card_enable_flow
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#define Rtl8192E_NIC_SUSPEND_FLOW rtl8192E_suspend_flow
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#define Rtl8192E_NIC_RESUME_FLOW rtl8192E_resume_flow
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#define Rtl8192E_NIC_PDN_FLOW rtl8192E_hwpdn_flow
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#define Rtl8192E_NIC_LPS_ENTER_FLOW rtl8192E_enter_lps_flow
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#define Rtl8192E_NIC_LPS_LEAVE_FLOW rtl8192E_leave_lps_flow
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#if 1 // download firmware related data structure
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#define FW_SIZE_8192E 0x8000 // Compatible with RTL8192e Maximal RAM code size 32k
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#define FW_START_ADDRESS 0x1000
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#define FW_END_ADDRESS 0x5FFF
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#define IS_FW_HEADER_EXIST_8192E(_pFwHdr) ((GET_FIRMWARE_HDR_SIGNATURE_8192E(_pFwHdr) &0xFFF0) == 0x92E0)
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typedef struct _RT_FIRMWARE_8192E {
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FIRMWARE_SOURCE eFWSource;
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#ifdef CONFIG_EMBEDDED_FWIMG
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u8* szFwBuffer;
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#else
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u8 szFwBuffer[FW_SIZE_8192E];
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#endif
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u32 ulFwLength;
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} RT_FIRMWARE_8192E, *PRT_FIRMWARE_8192E;
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//
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// This structure must be cared byte-ordering
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//
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// Added by tynli. 2009.12.04.
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//=====================================================
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// Firmware Header(8-byte alinment required)
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//=====================================================
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//--- LONG WORD 0 ----
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#define GET_FIRMWARE_HDR_SIGNATURE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 0, 16) // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut
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#define GET_FIRMWARE_HDR_CATEGORY_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 16, 8) // AP/NIC and USB/PCI
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#define GET_FIRMWARE_HDR_FUNCTION_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 24, 8) // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions
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#define GET_FIRMWARE_HDR_VERSION_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 0, 16)// FW Version
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#define GET_FIRMWARE_HDR_SUB_VER_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 16, 8) // FW Subversion, default 0x00
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#define GET_FIRMWARE_HDR_RSVD1_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 24, 8)
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//--- LONG WORD 1 ----
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#define GET_FIRMWARE_HDR_MONTH_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 0, 8) // Release time Month field
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#define GET_FIRMWARE_HDR_DATE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 8, 8) // Release time Date field
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#define GET_FIRMWARE_HDR_HOUR_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 16, 8)// Release time Hour field
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#define GET_FIRMWARE_HDR_MINUTE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 24, 8)// Release time Minute field
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#define GET_FIRMWARE_HDR_ROMCODE_SIZE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 0, 16)// The size of RAM code
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#define GET_FIRMWARE_HDR_RSVD2_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 16, 16)
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//--- LONG WORD 2 ----
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#define GET_FIRMWARE_HDR_SVN_IDX_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+16, 0, 32)// The SVN entry index
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#define GET_FIRMWARE_HDR_RSVD3_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+20, 0, 32)
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//--- LONG WORD 3 ----
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#define GET_FIRMWARE_HDR_RSVD4_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 0, 32)
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#define GET_FIRMWARE_HDR_RSVD5_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+28, 0, 32)
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#endif // download firmware related data structure
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#define DRIVER_EARLY_INT_TIME_8192E 0x05
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#define BCN_DMA_ATIME_INT_TIME_8192E 0x02
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#define MAX_RX_DMA_BUFFER_SIZE_8192E 0x3d00 //0x3E80 //0x3FFF // RX 16K reserved for WOW ?
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#define TX_TOTAL_PAGE_NUMBER_8192E 243 //0x00~0xF3 totoal pages: F4
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#define TX_PAGE_BOUNDARY_8192E (TX_TOTAL_PAGE_NUMBER_8192E + 1)//0xF4 ~0xFF ,Rserved 12 pages for BCN/PS-POLL..
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#define TX_PAGE_LOAD_FW_BOUNDARY_8192E 0x47 //0xA5
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#define TX_PAGE_BOUNDARY_WOWLAN_8192E 0xE0
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// For Normal Chip Setting
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// (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_92C
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#define NORMAL_PAGE_NUM_LPQ_8192E 0x0C
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#define NORMAL_PAGE_NUM_HPQ_8192E 0x08
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#define NORMAL_PAGE_NUM_NPQ_8192E 0x00
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#define NORMAL_PAGE_NUM_EPQ_8192E 0x00
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//Note: For WMM Normal Chip Setting ,modify later
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#define WMM_NORMAL_PAGE_NUM_HPQ_8192E NORMAL_PAGE_NUM_HPQ_8192E
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#define WMM_NORMAL_PAGE_NUM_LPQ_8192E NORMAL_PAGE_NUM_LPQ_8192E
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#define WMM_NORMAL_PAGE_NUM_NPQ_8192E NORMAL_PAGE_NUM_NPQ_8192E
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//-------------------------------------------------------------------------
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// Chip specific
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//-------------------------------------------------------------------------
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//-------------------------------------------------------------------------
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// Channel Plan
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//-------------------------------------------------------------------------
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#define HWSET_MAX_SIZE_8192E 512
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#define EFUSE_REAL_CONTENT_LEN_8192E 512
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#define EFUSE_MAP_LEN_8192E 512
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#define EFUSE_MAX_SECTION_8192E 64
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#define EFUSE_MAX_WORD_UNIT_8192E 4
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#define EFUSE_IC_ID_OFFSET_8192E 506 //For some inferiority IC purpose. added by Roger, 2009.09.02.
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#define AVAILABLE_EFUSE_ADDR_8192E(addr) (addr < EFUSE_REAL_CONTENT_LEN_8192E)
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//
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// <Roger_Notes> To prevent out of boundary programming case, leave 1byte and program full section
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// 9bytes + 1byt + 5bytes and pre 1byte.
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// For worst case:
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// | 1byte|----8bytes----|1byte|--5bytes--|
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// | | Reserved(14bytes) |
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//
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#define EFUSE_OOB_PROTECT_BYTES_8192E 15 // PG data exclude header, dummy 6 bytes frome CP test and reserved 1byte.
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//========================================================
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// EFUSE for BT definition
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//========================================================
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#define EFUSE_BT_REAL_BANK_CONTENT_LEN_8192E 512
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#define EFUSE_BT_REAL_CONTENT_LEN_8192E 1024 // 512*2
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#define EFUSE_BT_MAP_LEN_8192E 1024 // 1k bytes
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#define EFUSE_BT_MAX_SECTION_8192E 128 // 1024/8
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#define EFUSE_PROTECT_BYTES_BANK_8192E 16
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#define EFUSE_MAX_BANK_8192E 3
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//===========================================================
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#define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT)
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#define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS)
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//#define IS_MULTI_FUNC_CHIP(_Adapter) (((((PHAL_DATA_TYPE)(_Adapter->HalData))->MultiFunc) & (RT_MULTI_FUNC_BT|RT_MULTI_FUNC_GPS)) ? _TRUE : _FALSE)
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//#define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) )
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#define GetDefaultAdapter(padapter) padapter
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// rtl8812_hal_init.c
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void _8051Reset8192E(PADAPTER padapter);
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s32 FirmwareDownload8192E(PADAPTER Adapter, BOOLEAN bUsedWoWLANFw);
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void InitializeFirmwareVars8192E(PADAPTER padapter);
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s32 InitLLTTable8192E(PADAPTER padapter, u8 txpktbuf_bndy);
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// EFuse
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u8 GetEEPROMSize8192E(PADAPTER padapter);
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void hal_InitPGData_8192E(PADAPTER padapter, u8* PROMContent);
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void Hal_EfuseParseIDCode8192E(PADAPTER padapter, u8 *hwinfo);
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void Hal_ReadPROMVersion8192E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail);
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void Hal_ReadPowerSavingMode8192E(PADAPTER padapter, u8* hwinfo, BOOLEAN AutoLoadFail);
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void Hal_ReadTxPowerInfo8192E(PADAPTER padapter,u8* hwinfo,BOOLEAN AutoLoadFail);
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void Hal_ReadBoardType8192E(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail);
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void Hal_ReadThermalMeter_8192E(PADAPTER Adapter,u8* PROMContent,BOOLEAN AutoloadFail);
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void Hal_ReadChannelPlan8192E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail);
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void Hal_EfuseParseXtal_8192E(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail);
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void Hal_ReadAntennaDiversity8192E(PADAPTER pAdapter,u8* PROMContent,BOOLEAN AutoLoadFail);
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void Hal_ReadPAType_8192E(PADAPTER Adapter,u8* PROMContent, BOOLEAN AutoloadFail);
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void Hal_EfuseParseBTCoexistInfo8192E(PADAPTER Adapter, u8* hwinfo, BOOLEAN AutoLoadFail);
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u8 Hal_CrystalAFEAdjust(_adapter * Adapter);
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BOOLEAN HalDetectPwrDownMode8192E(PADAPTER Adapter);
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#ifdef CONFIG_WOWLAN
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void Hal_DetectWoWMode(PADAPTER pAdapter);
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#endif //CONFIG_WOWLAN
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/***********************************************************/
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// RTL8192E-MAC Setting
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VOID _InitTxBufferBoundary_8192E(IN PADAPTER Adapter,IN u8 txpktbuf_bndy);
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VOID _InitPageBoundary_8192E(IN PADAPTER Adapter);
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//VOID _InitTransferPageSize_8192E(IN PADAPTER Adapter);
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VOID _InitDriverInfoSize_8192E(IN PADAPTER Adapter,IN u8 drvInfoSize);
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VOID _InitRxSetting_8192E(PADAPTER Adapter);
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VOID _InitRDGSetting_8192E(PADAPTER Adapter);
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void _InitID_8192E(IN PADAPTER Adapter);
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VOID _InitNetworkType_8192E(IN PADAPTER Adapter);
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VOID _InitWMACSetting_8192E(IN PADAPTER Adapter);
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VOID _InitAdaptiveCtrl_8192E(IN PADAPTER Adapter);
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VOID _InitEDCA_8192E( IN PADAPTER Adapter);
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VOID _InitRetryFunction_8192E( IN PADAPTER Adapter);
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VOID _InitBeaconParameters_8192E(IN PADAPTER Adapter);
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VOID _InitBeaconMaxError_8192E(
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IN PADAPTER Adapter,
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IN BOOLEAN InfraMode
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);
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void _BBTurnOnBlock_8192E(PADAPTER padapter);
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void SetBeaconRelatedRegisters8192E(PADAPTER padapter);
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VOID hal_ReadRFType_8192E(PADAPTER Adapter);
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// RTL8192E-MAC Setting
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/***********************************************************/
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void SetHwReg8192E(PADAPTER Adapter, u8 variable, u8* val);
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void GetHwReg8192E(PADAPTER Adapter, u8 variable, u8* val);
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u8
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SetHalDefVar8192E(
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IN PADAPTER Adapter,
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IN HAL_DEF_VARIABLE eVariable,
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IN PVOID pValue
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);
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u8
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GetHalDefVar8192E(
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IN PADAPTER Adapter,
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IN HAL_DEF_VARIABLE eVariable,
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IN PVOID pValue
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);
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void rtl8192e_set_hal_ops(struct hal_ops *pHalFunc);
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void rtl8192e_init_default_value(_adapter * padapter);
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// register
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void SetBcnCtrlReg(PADAPTER padapter, u8 SetBits, u8 ClearBits);
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void rtl8192e_start_thread(_adapter *padapter);
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void rtl8192e_stop_thread(_adapter *padapter);
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#endif //__RTL8192E_HAL_H__
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