mirror of
https://github.com/Mange/rtl8192eu-linux-driver
synced 2024-11-26 07:25:00 +00:00
104 lines
3.3 KiB
C
104 lines
3.3 KiB
C
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/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*******************************************************************************/
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#ifndef __RTL8723A_SPEC_H__
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#define __RTL8723A_SPEC_H__
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#include <rtl8192c_spec.h>
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//============================================================================
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// 8723A Regsiter offset definition
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//============================================================================
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//-----------------------------------------------------
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//
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// 0x0000h ~ 0x00FFh System Configuration
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//
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//-----------------------------------------------------
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//-----------------------------------------------------
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//
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// 0x0100h ~ 0x01FFh MACTOP General Configuration
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//
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//-----------------------------------------------------
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//-----------------------------------------------------
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//
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// 0x0200h ~ 0x027Fh TXDMA Configuration
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//
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//-----------------------------------------------------
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//-----------------------------------------------------
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//
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// 0x0280h ~ 0x02FFh RXDMA Configuration
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//
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//-----------------------------------------------------
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//-----------------------------------------------------
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//
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// 0x0300h ~ 0x03FFh PCIe
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//
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//-----------------------------------------------------
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//-----------------------------------------------------
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//
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// 0x0400h ~ 0x047Fh Protocol Configuration
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//
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//-----------------------------------------------------
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//-----------------------------------------------------
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//
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// 0x0500h ~ 0x05FFh EDCA Configuration
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//
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//-----------------------------------------------------
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//-----------------------------------------------------
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//
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// 0x0600h ~ 0x07FFh WMAC Configuration
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//
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//-----------------------------------------------------
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#define REG_BT_COEX_TABLE_1 0x06C0
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#define REG_BT_COEX_TABLE_2 0x06C4
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//============================================================================
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// 8723 Regsiter Bit and Content definition
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//============================================================================
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//2 HSISR
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// interrupt mask which needs to clear
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#define MASK_HSISR_CLEAR (HSISR_GPIO12_0_INT |\
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HSISR_SPS_OCP_INT |\
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HSISR_RON_INT |\
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HSISR_PDNINT |\
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HSISR_GPIO9_INT)
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//----------------------------------------------------------------------------
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// 8723 EFUSE
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//----------------------------------------------------------------------------
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//============================================================================
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// General definitions
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//============================================================================
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#endif
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